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escc: unify compatible and MacRISC addressing.
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@ -105,8 +105,7 @@ uint32_t AMIC::read(uint32_t reg_start, uint32_t offset, int size)
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case 1:
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return this->viacuda->read(offset >> 9);
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case 4: // SCC registers
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this->escc->read_compat((offset >> 1) & 0xF);
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return 0;
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return this->escc->read((offset >> 1) & 0xF);
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case 0xA: // MACE registers
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return this->mace->read((offset >> 4) & 0xF);
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case 0x10: // SCSI registers
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@ -186,7 +185,7 @@ void AMIC::write(uint32_t reg_start, uint32_t offset, uint32_t value, int size)
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this->viacuda->write(offset >> 9, value);
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return;
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case 4:
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this->escc->write_compat((offset >> 1) & 0xF, value);
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this->escc->write((offset >> 1) & 0xF, value);
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return;
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case 0xA: // MACE registers
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this->mace->write((offset >> 4) & 0xF, value);
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@ -134,9 +134,12 @@ uint32_t HeathrowIC::read(uint32_t reg_start, uint32_t offset, int size) {
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case 0x10:
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res = this->mesh->read((offset >> 4) & 0xF);
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break;
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case 0x12: // ESCC compatible
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return this->escc->read_compat((offset >> 4) & 0xF);
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case 0x13: // ESCC MacRISC
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case 0x12: // ESCC compatible addressing
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if ((offset & 0xFF) < 16) {
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return this->escc->read((offset >> 1) & 0xF);
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}
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// fallthrough
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case 0x13: // ESCC MacRISC addressing
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return this->escc->read((offset >> 4) & 0xF);
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case 0x14:
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res = this->screamer->snd_ctrl_read(offset - 0x14000, size);
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@ -173,10 +176,13 @@ void HeathrowIC::write(uint32_t reg_start, uint32_t offset, uint32_t value, int
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case 0x10:
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this->mesh->write((offset >> 4) & 0xF, value);
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break;
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case 0x12: // ESCC compatible
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this->escc->write_compat((offset >> 4) & 0xF, value);
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break;
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case 0x13: // ESCC MacRISC
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case 0x12: // ESCC compatible addressing
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if ((offset & 0xFF) < 16) {
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this->escc->write((offset >> 1) & 0xF, value);
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break;
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}
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// fallthrough
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case 0x13: // ESCC MacRISC addressing
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this->escc->write((offset >> 4) & 0xF, value);
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break;
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case 0x14:
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@ -67,38 +67,6 @@ void EsccController::write(uint8_t reg_offset, uint8_t value)
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}
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}
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uint8_t EsccController::read_compat(uint8_t reg_offset)
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{
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switch(reg_offset) {
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case Compat::EsccReg::Port_B_Cmd:
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LOG_F(9, "ESCC: reading Port B register RR%d", this->reg_ptr);
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this->reg_ptr = 0;
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break;
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case Compat::EsccReg::Port_A_Cmd:
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LOG_F(9, "ESCC: reading Port A register RR%d", this->reg_ptr);
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this->reg_ptr = 0;
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break;
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default:
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LOG_F(INFO, "ESCC: reading register %d", reg_offset);
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}
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return 0;
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}
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void EsccController::write_compat(uint8_t reg_offset, uint8_t value)
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{
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switch(reg_offset) {
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case Compat::EsccReg::Port_B_Cmd:
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this->write_internal(this->ch_b.get(), value);
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break;
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case Compat::EsccReg::Port_A_Cmd:
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this->write_internal(this->ch_a.get(), value);
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break;
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default:
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LOG_F(INFO, "ESCC: writing 0x%X to register %d", value, reg_offset);
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}
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}
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void EsccController::write_internal(EsccChannel *ch, uint8_t value)
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{
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if (this->reg_ptr) {
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@ -28,19 +28,7 @@ along with this program. If not, see <https://www.gnu.org/licenses/>.
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#include <memory>
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#include <string>
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/** ESCC compatible (aka Macintosh legacy) register addressing */
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namespace Compat {
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enum EsccReg : uint8_t {
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Port_B_Cmd = 0,
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Port_A_Cmd = 1,
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Port_B_Data = 2,
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Port_A_Data = 3,
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Enh_Reg_B = 4,
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Enh_Reg_A = 5,
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};
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};
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/** ESCC MacRISC style register addressing */
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/** ESCC register addresses */
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enum EsccReg : uint8_t {
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Port_B_Cmd = 0,
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Port_B_Data = 1,
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@ -50,7 +38,7 @@ enum EsccReg : uint8_t {
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Enh_Reg_A = 5,
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};
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/** LocalTalk registers (same in both addressing schemes) */
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/** LocalTalk LTPC registers */
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enum LocalTalkReg : uint8_t {
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Rec_Count = 8,
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Start_A = 9,
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@ -81,14 +69,10 @@ public:
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EsccController();
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~EsccController() = default;
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// ESCC MacRISC registers access
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// ESCC registers access
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uint8_t read(uint8_t reg_offset);
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void write(uint8_t reg_offset, uint8_t value);
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// ESCC compatible registers access
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uint8_t read_compat(uint8_t reg_offset);
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void write_compat(uint8_t reg_offset, uint8_t value);
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private:
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void write_internal(EsccChannel* ch, uint8_t value);
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