From cd77e361ab9296eae933ab8f40874170d6e1282c Mon Sep 17 00:00:00 2001 From: joevt Date: Wed, 20 Mar 2024 01:29:44 -0700 Subject: [PATCH] ppcexceptions: Use MSR enums. --- cpu/ppc/ppcexceptions.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/cpu/ppc/ppcexceptions.cpp b/cpu/ppc/ppcexceptions.cpp index 5e7a588..b5c5e3f 100644 --- a/cpu/ppc/ppcexceptions.cpp +++ b/cpu/ppc/ppcexceptions.cpp @@ -115,7 +115,7 @@ void ppc_exception_handler(Except_Type exception_type, uint32_t srr1_bits) { ppc_state.spr[SPR::SRR1] = (ppc_state.msr & 0x0000FF73) | srr1_bits; ppc_state.msr &= 0xFFFB1041; /* copy MSR[ILE] to MSR[LE] */ - ppc_state.msr = (ppc_state.msr & 0xFFFFFFFE) | ((ppc_state.msr >> 16) & 1); + ppc_state.msr = (ppc_state.msr & ~MSR::LE) | !!(ppc_state.msr & MSR::ILE); if (ppc_state.msr & MSR::IP) { ppc_next_instruction_address |= 0xFFF00000;