mirror of
https://github.com/dingusdev/dingusppc.git
synced 2025-01-10 13:29:38 +00:00
Fix integer multiplications.
Add a couple of tests for verifying XER[OV] updating code for mullwo[.].
This commit is contained in:
parent
a72e2fd67d
commit
d0f1a34c02
@ -139,10 +139,7 @@ extern uint64_t timebase_counter; //used for storing time base value
|
||||
extern int32_t add_result;
|
||||
extern int32_t simult_result;
|
||||
extern uint32_t uiadd_result;
|
||||
extern uint32_t uidiv_result;
|
||||
extern uint32_t uimult_result;
|
||||
extern uint64_t uiproduct;
|
||||
extern int64_t siproduct;
|
||||
|
||||
extern int32_t word_copy_location;
|
||||
extern uint32_t strwrd_replace_value;
|
||||
|
@ -41,10 +41,6 @@ uint32_t ppc_result_b = 0;
|
||||
uint32_t ppc_result_c = 0;
|
||||
uint32_t ppc_result_d = 0;
|
||||
|
||||
uint32_t uidiv_result;
|
||||
uint64_t uiproduct;
|
||||
int64_t siproduct;
|
||||
|
||||
uint32_t strwrd_replace_value;
|
||||
|
||||
/**
|
||||
@ -835,77 +831,78 @@ void ppc_cntlzwdot() {
|
||||
|
||||
void ppc_mulhwu() {
|
||||
ppc_grab_regsdab();
|
||||
uiproduct = (uint64_t)ppc_result_a * (uint64_t)ppc_result_b;
|
||||
ppc_result_d = (uint32_t)(uiproduct >> 32);
|
||||
uint64_t product = (uint64_t)ppc_result_a * (uint64_t)ppc_result_b;
|
||||
ppc_result_d = (uint32_t)(product >> 32);
|
||||
ppc_store_result_regd();
|
||||
}
|
||||
|
||||
void ppc_mulhwudot() {
|
||||
ppc_grab_regsdab();
|
||||
uiproduct = (uint64_t)ppc_result_a * (uint64_t)ppc_result_b;
|
||||
ppc_result_d = (uint32_t)(uiproduct >> 32);
|
||||
uint64_t product = (uint64_t)ppc_result_a * (uint64_t)ppc_result_b;
|
||||
ppc_result_d = (uint32_t)(product >> 32);
|
||||
ppc_changecrf0(ppc_result_d);
|
||||
ppc_store_result_regd();
|
||||
}
|
||||
|
||||
void ppc_mulhw() {
|
||||
ppc_grab_regsdab();
|
||||
siproduct = (int64_t)(int32_t)ppc_result_a * (int64_t)(int32_t)ppc_result_b;
|
||||
ppc_result_d = siproduct >> 32;
|
||||
int64_t product = (int64_t)(int32_t)ppc_result_a * (int64_t)(int32_t)ppc_result_b;
|
||||
ppc_result_d = product >> 32;
|
||||
ppc_store_result_regd();
|
||||
}
|
||||
|
||||
void ppc_mulhwdot() {
|
||||
ppc_grab_regsdab();
|
||||
siproduct = (int64_t)(int32_t)ppc_result_a * (int64_t)(int32_t)ppc_result_b;
|
||||
ppc_result_d = siproduct >> 32;
|
||||
int64_t product = (int64_t)(int32_t)ppc_result_a * (int64_t)(int32_t)ppc_result_b;
|
||||
ppc_result_d = product >> 32;
|
||||
ppc_changecrf0(ppc_result_d);
|
||||
ppc_store_result_regd();
|
||||
}
|
||||
|
||||
void ppc_mullw() {
|
||||
ppc_grab_regsdab();
|
||||
siproduct = (int64_t)(int32_t)ppc_result_a * (int64_t)(int32_t)ppc_result_b;
|
||||
siproduct &= 4294967295;
|
||||
ppc_result_d = (uint32_t)siproduct;
|
||||
int64_t product = (int64_t)(int32_t)ppc_result_a * (int64_t)(int32_t)ppc_result_b;
|
||||
ppc_result_d = (uint32_t)product;
|
||||
ppc_store_result_regd();
|
||||
}
|
||||
|
||||
void ppc_mullwdot() {
|
||||
ppc_grab_regsdab();
|
||||
siproduct = (int64_t)(int32_t)ppc_result_a * (int64_t)(int32_t)ppc_result_b;
|
||||
siproduct &= 4294967295;
|
||||
ppc_result_d = (uint32_t)siproduct;
|
||||
int64_t product = (int64_t)(int32_t)ppc_result_a * (int64_t)(int32_t)ppc_result_b;
|
||||
ppc_result_d = (uint32_t)product;
|
||||
ppc_changecrf0(ppc_result_d);
|
||||
ppc_store_result_regd();
|
||||
}
|
||||
|
||||
void ppc_mullwo() {
|
||||
ppc_grab_regsdab();
|
||||
siproduct = (int64_t)(int32_t)ppc_result_a * (int64_t)(int32_t)ppc_result_b;
|
||||
if ((siproduct > 0xFFFFFFFFUL) || (siproduct > 0x7FFFFFFFUL)) {
|
||||
int64_t product = (int64_t)(int32_t)ppc_result_a * (int64_t)(int32_t)ppc_result_b;
|
||||
if (product != (int64_t)(int32_t)product) {
|
||||
ppc_state.ppc_spr[SPR::XER] |= 0xC0000000;
|
||||
} else {
|
||||
ppc_state.ppc_spr[SPR::XER] &= 0xBFFFFFFFUL;
|
||||
}
|
||||
ppc_result_d = (uint32_t)siproduct;
|
||||
ppc_result_d = (uint32_t)product;
|
||||
ppc_store_result_regd();
|
||||
}
|
||||
|
||||
void ppc_mullwodot() {
|
||||
ppc_grab_regsdab();
|
||||
siproduct = (int64_t)(int32_t)ppc_result_a * (int64_t)(int32_t)ppc_result_b;
|
||||
if ((siproduct > 0xFFFFFFFFUL) || (siproduct > 0x7FFFFFFFUL)) {
|
||||
int64_t product = (int64_t)(int32_t)ppc_result_a * (int64_t)(int32_t)ppc_result_b;
|
||||
if (product != (int64_t)(int32_t)product) {
|
||||
ppc_state.ppc_spr[SPR::XER] |= 0xC0000000;
|
||||
} else {
|
||||
ppc_state.ppc_spr[SPR::XER] &= 0xBFFFFFFFUL;
|
||||
}
|
||||
ppc_result_d = (uint32_t)siproduct;
|
||||
ppc_result_d = (uint32_t)product;
|
||||
ppc_changecrf0(ppc_result_d);
|
||||
ppc_store_result_regd();
|
||||
}
|
||||
|
||||
void ppc_mulli() {
|
||||
ppc_grab_regsdasimm();
|
||||
int64_t siproduct = (int64_t)(int32_t)ppc_result_a * (int64_t)(int32_t)simm;
|
||||
siproduct &= 4294967295;
|
||||
ppc_result_d = (uint32_t)siproduct;
|
||||
int64_t product = (int64_t)(int32_t)ppc_result_a * (int64_t)(int32_t)simm;
|
||||
ppc_result_d = (uint32_t)product;
|
||||
ppc_store_result_regd();
|
||||
}
|
||||
|
||||
|
@ -475,15 +475,19 @@ mullwo :: rD 0x000009C4 | rA 0x00000032 | rB 0x00000032 | XER: 0x00000000 | CR
|
||||
mullwo :: rD 0x3FFF0001 | rA 0x00007FFF | rB 0x00007FFF | XER: 0x00000000 | CR: 0x00000000
|
||||
mullwo :: rD 0xFFFE0001 | rA 0x0000FFFF | rB 0x0000FFFF | XER: 0xC0000000 | CR: 0x00000000
|
||||
mullwo :: rD 0x00000001 | rA 0x7FFFFFFF | rB 0x7FFFFFFF | XER: 0xC0000000 | CR: 0x00000000
|
||||
mullwo :: rD 0x00000002 | rA 0x7FFFFFFF | rB 0xFFFFFFFE | XER: 0xC0000000 | CR: 0x00000000
|
||||
mullwo :: rD 0x00000000 | rA 0x80000000 | rB 0x80000000 | XER: 0xC0000000 | CR: 0x00000000
|
||||
mullwo :: rD 0x00000001 | rA 0xFFFFFFFF | rB 0xFFFFFFFF | XER: 0x00000000 | CR: 0x00000000
|
||||
mullwo :: rD 0x80000001 | rA 0xFFFFFFFF | rB 0x7FFFFFFF | XER: 0x00000000 | CR: 0x00000000
|
||||
mullwo. :: rD 0x00000000 | rA 0x00000000 | rB 0x00000000 | XER: 0x00000000 | CR: 0x20000000
|
||||
mullwo. :: rD 0x000009C4 | rA 0x00000032 | rB 0x00000032 | XER: 0x00000000 | CR: 0x40000000
|
||||
mullwo. :: rD 0x3FFF0001 | rA 0x00007FFF | rB 0x00007FFF | XER: 0x00000000 | CR: 0x40000000
|
||||
mullwo. :: rD 0xFFFE0001 | rA 0x0000FFFF | rB 0x0000FFFF | XER: 0xC0000000 | CR: 0x90000000
|
||||
mullwo. :: rD 0x00000001 | rA 0x7FFFFFFF | rB 0x7FFFFFFF | XER: 0xC0000000 | CR: 0x50000000
|
||||
mullwo. :: rD 0x00000002 | rA 0x7FFFFFFF | rB 0xFFFFFFFE | XER: 0xC0000000 | CR: 0x50000000
|
||||
mullwo. :: rD 0x00000000 | rA 0x80000000 | rB 0x80000000 | XER: 0xC0000000 | CR: 0x30000000
|
||||
mullwo. :: rD 0x00000001 | rA 0xFFFFFFFF | rB 0xFFFFFFFF | XER: 0x00000000 | CR: 0x40000000
|
||||
mullwo. :: rD 0x80000001 | rA 0xFFFFFFFF | rB 0x7FFFFFFF | XER: 0x00000000 | CR: 0x80000000
|
||||
nand :: rD 0xFFFFFFFF | rA 0x00000000 | rB 0x00000000 | XER: 0x00000000 | CR: 0x00000000
|
||||
nand :: rD 0xFFFFFFFF | rA 0x00000000 | rB 0x00000001 | XER: 0x00000000 | CR: 0x00000000
|
||||
nand :: rD 0xFFFFFFFF | rA 0x00000001 | rB 0x00000000 | XER: 0x00000000 | CR: 0x00000000
|
||||
|
@ -475,15 +475,19 @@ MULLWO,0x7C6325D6,rD=0x000009C4,rA=0x00000032,rB=0x00000032,XER=0x00000000,CR=0x
|
||||
MULLWO,0x7C6325D6,rD=0x3FFF0001,rA=0x00007FFF,rB=0x00007FFF,XER=0x00000000,CR=0x00000000
|
||||
MULLWO,0x7C6325D6,rD=0xFFFE0001,rA=0x0000FFFF,rB=0x0000FFFF,XER=0xC0000000,CR=0x00000000
|
||||
MULLWO,0x7C6325D6,rD=0x00000001,rA=0x7FFFFFFF,rB=0x7FFFFFFF,XER=0xC0000000,CR=0x00000000
|
||||
MULLWO,0x7C6325D6,rD=0x00000002,rA=0x7FFFFFFF,rB=0xFFFFFFFE,XER=0xC0000000,CR=0x00000000
|
||||
MULLWO,0x7C6325D6,rD=0x00000000,rA=0x80000000,rB=0x80000000,XER=0xC0000000,CR=0x00000000
|
||||
MULLWO,0x7C6325D6,rD=0x00000001,rA=0xFFFFFFFF,rB=0xFFFFFFFF,XER=0x00000000,CR=0x00000000
|
||||
MULLWO,0x7C6325D6,rD=0x80000001,rA=0xFFFFFFFF,rB=0x7FFFFFFF,XER=0x00000000,CR=0x00000000
|
||||
MULLWO.,0x7C6325D7,rD=0x00000000,rA=0x00000000,rB=0x00000000,XER=0x00000000,CR=0x20000000
|
||||
MULLWO.,0x7C6325D7,rD=0x000009C4,rA=0x00000032,rB=0x00000032,XER=0x00000000,CR=0x40000000
|
||||
MULLWO.,0x7C6325D7,rD=0x3FFF0001,rA=0x00007FFF,rB=0x00007FFF,XER=0x00000000,CR=0x40000000
|
||||
MULLWO.,0x7C6325D7,rD=0xFFFE0001,rA=0x0000FFFF,rB=0x0000FFFF,XER=0xC0000000,CR=0x90000000
|
||||
MULLWO.,0x7C6325D7,rD=0x00000001,rA=0x7FFFFFFF,rB=0x7FFFFFFF,XER=0xC0000000,CR=0x50000000
|
||||
MULLWO.,0x7C6325D7,rD=0x00000002,rA=0x7FFFFFFF,rB=0xFFFFFFFE,XER=0xC0000000,CR=0x50000000
|
||||
MULLWO.,0x7C6325D7,rD=0x00000000,rA=0x80000000,rB=0x80000000,XER=0xC0000000,CR=0x30000000
|
||||
MULLWO.,0x7C6325D7,rD=0x00000001,rA=0xFFFFFFFF,rB=0xFFFFFFFF,XER=0x00000000,CR=0x40000000
|
||||
MULLWO.,0x7C6325D7,rD=0x80000001,rA=0xFFFFFFFF,rB=0x7FFFFFFF,XER=0x00000000,CR=0x80000000
|
||||
NAND,0x7C6323B8,rD=0xFFFFFFFF,rA=0x00000000,rB=0x00000000,XER=0x00000000,CR=0x00000000
|
||||
NAND,0x7C6323B8,rD=0xFFFFFFFF,rA=0x00000000,rB=0x00000001,XER=0x00000000,CR=0x00000000
|
||||
NAND,0x7C6323B8,rD=0xFFFFFFFF,rA=0x00000001,rB=0x00000000,XER=0x00000000,CR=0x00000000
|
||||
|
Can't render this file because it has a wrong number of fields in line 85.
|
Loading…
x
Reference in New Issue
Block a user