mirror of
https://github.com/dingusdev/dingusppc.git
synced 2024-12-24 12:30:05 +00:00
Fixed comparison instructions, 603 instructions, mnemonics
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eda9454f66
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d4239c5aa1
@ -381,19 +381,15 @@ void opc_rlwnm(PPCDisasmContext* ctx)
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void opc_cmp_i_li(PPCDisasmContext* ctx)
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void opc_cmp_i_li(PPCDisasmContext* ctx)
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{
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{
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auto ls = (ctx->instr_code >> 21) & 0x1;
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auto ra = (ctx->instr_code >> 16) & 0x1F;
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auto ra = (ctx->instr_code >> 16) & 0x1F;
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auto crfd = (ctx->instr_code >> 23) & 0x07;
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auto crfd = (ctx->instr_code >> 23) & 0x07;
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auto imm = ctx->instr_code & 0xFFFF;
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auto imm = ctx->instr_code & 0xFFFF;
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if (ctx->instr_code & 0x200000) {
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opc_illegal(ctx);
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}
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else {
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if ((ctx->instr_code >> 26) & 0x1)
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if ((ctx->instr_code >> 26) & 0x1)
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fmt_threeop_uimm(ctx->instr_str, "cmpi", crfd, ra, imm);
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ctx->instr_str = my_sprintf("%-8scr%d, %d, r%d, 0x%04X", "cmpi", crfd, ls, ra, imm);
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else
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else
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fmt_threeop_simm(ctx->instr_str, "cmpli", crfd, ra, imm);
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ctx->instr_str = my_sprintf("%-8scr%d, %d, r%d, 0x%04X", "cmpli", crfd, ls, ra, imm);
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}
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}
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}
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void opc_bool_im(PPCDisasmContext* ctx)
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void opc_bool_im(PPCDisasmContext* ctx)
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@ -690,7 +686,7 @@ void opc_group19(PPCDisasmContext* ctx)
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switch (ext_opc) {
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switch (ext_opc) {
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case 0:
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case 0:
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ctx->instr_str = my_sprintf("%-8scrf%d, crf%d", "mcrf", (rs >> 2), (ra >> 2));
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ctx->instr_str = my_sprintf("%-8scr%d, cr%d", "mcrf", (rs >> 2), (ra >> 2));
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return;
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return;
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case 16:
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case 16:
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opc_bclrx(ctx);
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opc_bclrx(ctx);
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@ -836,6 +832,18 @@ void opc_group31(PPCDisasmContext* ctx)
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else
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else
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ctx->instr_str = my_sprintf("%-8sr%s", "tlbie", rb);
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ctx->instr_str = my_sprintf("%-8sr%s", "tlbie", rb);
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}
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}
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else if (index == 30) { /* tlbld - 603 only */
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if (!rs & !ra)
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opc_illegal(ctx);
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else
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ctx->instr_str = my_sprintf("%-8sr%s", "tlbld", rb);
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}
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else if (index == 30) { /* tlbli - 603 only */
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if (!rs & !ra)
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opc_illegal(ctx);
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else
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ctx->instr_str = my_sprintf("%-8sr%s", "tlbli", rb);
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}
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return;
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return;
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case 0x18: /* Shifting instructions */
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case 0x18: /* Shifting instructions */
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@ -1090,6 +1098,9 @@ void opc_group31(PPCDisasmContext* ctx)
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case 339: /* mfspr */
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case 339: /* mfspr */
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if (ctx->simplified) {
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if (ctx->simplified) {
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switch (ref_spr) {
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switch (ref_spr) {
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case 0: //case 0 is 601 only
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ctx->instr_str = my_sprintf("%-8sr%d", "mfmq", rs);
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return;
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case 1:
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case 1:
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ctx->instr_str = my_sprintf("%-8sr%d", "mfxer", rs);
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ctx->instr_str = my_sprintf("%-8sr%d", "mfxer", rs);
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return;
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return;
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@ -1099,6 +1110,15 @@ void opc_group31(PPCDisasmContext* ctx)
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case 9:
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case 9:
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ctx->instr_str = my_sprintf("%-8sr%d", "mfctr", rs);
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ctx->instr_str = my_sprintf("%-8sr%d", "mfctr", rs);
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return;
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return;
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case 18:
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ctx->instr_str = my_sprintf("%-8sr%d", "mfdsisr", rs);
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return;
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case 19:
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ctx->instr_str = my_sprintf("%-8sr%d", "mfdar", rs);
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return;
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case 22:
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ctx->instr_str = my_sprintf("%-8sr%d", "mfdec", rs);
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return;
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}
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}
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}
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}
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fmt_twoop_fromspr(ctx->instr_str, "mfspr", rs, ref_spr);
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fmt_twoop_fromspr(ctx->instr_str, "mfspr", rs, ref_spr);
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@ -1109,6 +1129,9 @@ void opc_group31(PPCDisasmContext* ctx)
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case 467: /* mtspr */
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case 467: /* mtspr */
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if (ctx->simplified) {
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if (ctx->simplified) {
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switch (ref_spr) {
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switch (ref_spr) {
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case 0: //case 0 is 601 only
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ctx->instr_str = my_sprintf("%-8sr%d", "mtmq", rs);
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return;
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case 1:
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case 1:
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ctx->instr_str = my_sprintf("%-8sr%d", "mtxer", rs);
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ctx->instr_str = my_sprintf("%-8sr%d", "mtxer", rs);
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return;
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return;
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@ -1118,12 +1141,21 @@ void opc_group31(PPCDisasmContext* ctx)
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case 9:
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case 9:
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ctx->instr_str = my_sprintf("%-8sr%d", "mtctr", rs);
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ctx->instr_str = my_sprintf("%-8sr%d", "mtctr", rs);
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return;
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return;
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case 18:
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ctx->instr_str = my_sprintf("%-8sr%d", "mtdsisr", rs);
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return;
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case 19:
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ctx->instr_str = my_sprintf("%-8sr%d", "mtdar", rs);
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return;
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case 27:
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ctx->instr_str = my_sprintf("%-8sr%d", "mtdec", rs);
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return;
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}
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}
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}
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}
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fmt_twoop_tospr(ctx->instr_str, "mtspr", ref_spr, rs);
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fmt_twoop_tospr(ctx->instr_str, "mtspr", ref_spr, rs);
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break;
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break;
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case 512: /* mcrxr */
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case 512: /* mcrxr */
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ctx->instr_str = my_sprintf("%-8scrf%d", "mcrxr", (rs >> 2));
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ctx->instr_str = my_sprintf("%-8scr%d", "mcrxr", (rs >> 2));
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break;
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break;
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case 531: /* clcs */
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case 531: /* clcs */
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strcpy(opcode, "clcs");
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strcpy(opcode, "clcs");
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@ -1204,7 +1236,6 @@ void opc_group59(PPCDisasmContext* ctx)
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auto rs = (ctx->instr_code >> 21) & 0x1F;
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auto rs = (ctx->instr_code >> 21) & 0x1F;
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int ext_opc = (ctx->instr_code >> 1) & 0x3FF; /* extract extended opcode */
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int ext_opc = (ctx->instr_code >> 1) & 0x3FF; /* extract extended opcode */
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int index = ext_opc >> 5;
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bool rc_set = ctx->instr_code & 1;
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bool rc_set = ctx->instr_code & 1;
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switch (ext_opc & 0x1F) {
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switch (ext_opc & 0x1F) {
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@ -1348,7 +1379,6 @@ void opc_group63(PPCDisasmContext* ctx)
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auto rs = (ctx->instr_code >> 21) & 0x1F;
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auto rs = (ctx->instr_code >> 21) & 0x1F;
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int ext_opc = (ctx->instr_code >> 1) & 0x3FF; /* extract extended opcode */
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int ext_opc = (ctx->instr_code >> 1) & 0x3FF; /* extract extended opcode */
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int index = ext_opc >> 5;
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bool rc_set = ctx->instr_code & 1;
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bool rc_set = ctx->instr_code & 1;
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switch (ext_opc & 0x1F) {
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switch (ext_opc & 0x1F) {
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@ -1491,7 +1521,7 @@ void opc_group63(PPCDisasmContext* ctx)
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if (rs & 3)
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if (rs & 3)
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opc_illegal(ctx);
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opc_illegal(ctx);
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else
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else
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ctx->instr_str = my_sprintf("%-8scrf%d, r%d, r%d,", "fcmpu", (rs >> 2), ra, rb);
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ctx->instr_str = my_sprintf("%-8scr%d, r%d, r%d,", "fcmpu", (rs >> 2), ra, rb);
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break;
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break;
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case 12: /* frsp */
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case 12: /* frsp */
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if (ra != 0)
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if (ra != 0)
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@ -1515,7 +1545,7 @@ void opc_group63(PPCDisasmContext* ctx)
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if (rs & 3)
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if (rs & 3)
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opc_illegal(ctx);
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opc_illegal(ctx);
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else
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else
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ctx->instr_str = my_sprintf("%-8scrf%d, r%d, r%d,", "fcmpo", (rs >> 2), ra, rb);
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ctx->instr_str = my_sprintf("%-8scr%d, r%d, r%d,", "fcmpo", (rs >> 2), ra, rb);
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break;
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break;
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case 38: /* mtfsb1 */
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case 38: /* mtfsb1 */
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strcpy(opcode, "mtfsb1");
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strcpy(opcode, "mtfsb1");
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@ -1539,7 +1569,7 @@ void opc_group63(PPCDisasmContext* ctx)
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case 64:
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case 64:
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strcpy(opcode, "mcrfs");
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strcpy(opcode, "mcrfs");
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ctx->instr_str = my_sprintf("%-8scrf%d, crf%d", opcode, (rs >> 2), (ra >> 2));
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ctx->instr_str = my_sprintf("%-8scr%d, cr%d", opcode, (rs >> 2), (ra >> 2));
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break;
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break;
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case 70: /* mtfsb0 */
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case 70: /* mtfsb0 */
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strcpy(opcode, "mtfsb0");
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strcpy(opcode, "mtfsb0");
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@ -1559,7 +1589,7 @@ void opc_group63(PPCDisasmContext* ctx)
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if (ra != 0)
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if (ra != 0)
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opc_illegal(ctx);
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opc_illegal(ctx);
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else
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else
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ctx->instr_str = my_sprintf("%-8scrf%d, r%d", "mtfsfi", (rs >> 2), (rb >> 1));
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ctx->instr_str = my_sprintf("%-8scr%d, r%d", "mtfsfi", (rs >> 2), (rb >> 1));
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break;
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break;
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case 136: /* fnabs */
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case 136: /* fnabs */
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if (ra != 0)
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if (ra != 0)
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@ -193,7 +193,7 @@
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0xFFF00100,0x7E007120,mtcrf,0x07,r16
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0xFFF00100,0x7E007120,mtcrf,0x07,r16
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# rotation instructions
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# rotation instructions
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0xFFF00100,0x5400EFFE,rlwinm,r0,r0,0x1D,0x1F,0x1F
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0xFFF00100,0x5400EFFE,rlwinm,r0,r0,29,31,31
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# shift instructions, primary opcode 0x1F
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# shift instructions, primary opcode 0x1F
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0xFFF00100,0x7C65FE70,srawi,r5,r3,0x1F
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0xFFF00100,0x7C65FE70,srawi,r5,r3,0x1F
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@ -267,6 +267,9 @@
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0xFFF00100,0xBC410008,stmw,r2,0x8(r1)
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0xFFF00100,0xBC410008,stmw,r2,0x8(r1)
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0xFFF00100,0xBFC1FFF8,stmw,r30,-0x8(r1)
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0xFFF00100,0xBFC1FFF8,stmw,r30,-0x8(r1)
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#compare instructions
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0xFFF00100,0x2AA3FFFF,cmpli,cr5,1,r3,0xFFFF
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# misc instructions
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# misc instructions
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0xFFF00100,0x7D453D2A,stswx,r10,r5,r7
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0xFFF00100,0x7D453D2A,stswx,r10,r5,r7
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0xFFF00100,0x7D604828,lwarx,r11,0,r9
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0xFFF00100,0x7D604828,lwarx,r11,0,r9
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Can't render this file because it contains an unexpected character in line 4 and column 24.
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