Macintosh-Tools/dingusppc
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Fixed comparison instructions, 603 instructions, mnemonics

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This commit is contained in:
dingusdev 2020-02-13 08:00:36 -07:00
parent eda9454f66
commit d4239c5aa1
2 changed files with 51 additions and 18 deletions
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64
cpu/ppc/ppcdisasm.cpp
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@ -381,19 +381,15 @@ void opc_rlwnm(PPCDisasmContext* ctx)
void opc_cmp_i_li(PPCDisasmContext* ctx) void opc_cmp_i_li(PPCDisasmContext* ctx)
{ {
auto ls = (ctx->instr_code >> 21) & 0x1;
auto ra = (ctx->instr_code >> 16) & 0x1F; auto ra = (ctx->instr_code >> 16) & 0x1F;
auto crfd = (ctx->instr_code >> 23) & 0x07; auto crfd = (ctx->instr_code >> 23) & 0x07;
auto imm = ctx->instr_code & 0xFFFF; auto imm = ctx->instr_code & 0xFFFF;
if (ctx->instr_code & 0x200000) { if ((ctx->instr_code >> 26) & 0x1)
opc_illegal(ctx); ctx->instr_str = my_sprintf("%-8scr%d, %d, r%d, 0x%04X", "cmpi", crfd, ls, ra, imm);
} else
else { ctx->instr_str = my_sprintf("%-8scr%d, %d, r%d, 0x%04X", "cmpli", crfd, ls, ra, imm);
if ((ctx->instr_code >> 26) & 0x1)
fmt_threeop_uimm(ctx->instr_str, "cmpi", crfd, ra, imm);
else
fmt_threeop_simm(ctx->instr_str, "cmpli", crfd, ra, imm);
}
} }
void opc_bool_im(PPCDisasmContext* ctx) void opc_bool_im(PPCDisasmContext* ctx)
@ -690,7 +686,7 @@ void opc_group19(PPCDisasmContext* ctx)
switch (ext_opc) { switch (ext_opc) {
case 0: case 0:
ctx->instr_str = my_sprintf("%-8scrf%d, crf%d", "mcrf", (rs >> 2), (ra >> 2)); ctx->instr_str = my_sprintf("%-8scr%d, cr%d", "mcrf", (rs >> 2), (ra >> 2));
return; return;
case 16: case 16:
opc_bclrx(ctx); opc_bclrx(ctx);
@ -836,6 +832,18 @@ void opc_group31(PPCDisasmContext* ctx)
else else
ctx->instr_str = my_sprintf("%-8sr%s", "tlbie", rb); ctx->instr_str = my_sprintf("%-8sr%s", "tlbie", rb);
} }
else if (index == 30) { /* tlbld - 603 only */
if (!rs & !ra)
opc_illegal(ctx);
else
ctx->instr_str = my_sprintf("%-8sr%s", "tlbld", rb);
}
else if (index == 30) { /* tlbli - 603 only */
if (!rs & !ra)
opc_illegal(ctx);
else
ctx->instr_str = my_sprintf("%-8sr%s", "tlbli", rb);
}
return; return;
case 0x18: /* Shifting instructions */ case 0x18: /* Shifting instructions */
@ -1090,6 +1098,9 @@ void opc_group31(PPCDisasmContext* ctx)
case 339: /* mfspr */ case 339: /* mfspr */
if (ctx->simplified) { if (ctx->simplified) {
switch (ref_spr) { switch (ref_spr) {
case 0: //case 0 is 601 only
ctx->instr_str = my_sprintf("%-8sr%d", "mfmq", rs);
return;
case 1: case 1:
ctx->instr_str = my_sprintf("%-8sr%d", "mfxer", rs); ctx->instr_str = my_sprintf("%-8sr%d", "mfxer", rs);
return; return;
@ -1099,6 +1110,15 @@ void opc_group31(PPCDisasmContext* ctx)
case 9: case 9:
ctx->instr_str = my_sprintf("%-8sr%d", "mfctr", rs); ctx->instr_str = my_sprintf("%-8sr%d", "mfctr", rs);
return; return;
case 18:
ctx->instr_str = my_sprintf("%-8sr%d", "mfdsisr", rs);
return;
case 19:
ctx->instr_str = my_sprintf("%-8sr%d", "mfdar", rs);
return;
case 22:
ctx->instr_str = my_sprintf("%-8sr%d", "mfdec", rs);
return;
} }
} }
fmt_twoop_fromspr(ctx->instr_str, "mfspr", rs, ref_spr); fmt_twoop_fromspr(ctx->instr_str, "mfspr", rs, ref_spr);
@ -1109,6 +1129,9 @@ void opc_group31(PPCDisasmContext* ctx)
case 467: /* mtspr */ case 467: /* mtspr */
if (ctx->simplified) { if (ctx->simplified) {
switch (ref_spr) { switch (ref_spr) {
case 0: //case 0 is 601 only
ctx->instr_str = my_sprintf("%-8sr%d", "mtmq", rs);
return;
case 1: case 1:
ctx->instr_str = my_sprintf("%-8sr%d", "mtxer", rs); ctx->instr_str = my_sprintf("%-8sr%d", "mtxer", rs);
return; return;
@ -1118,12 +1141,21 @@ void opc_group31(PPCDisasmContext* ctx)
case 9: case 9:
ctx->instr_str = my_sprintf("%-8sr%d", "mtctr", rs); ctx->instr_str = my_sprintf("%-8sr%d", "mtctr", rs);
return; return;
case 18:
ctx->instr_str = my_sprintf("%-8sr%d", "mtdsisr", rs);
return;
case 19:
ctx->instr_str = my_sprintf("%-8sr%d", "mtdar", rs);
return;
case 27:
ctx->instr_str = my_sprintf("%-8sr%d", "mtdec", rs);
return;
} }
} }
fmt_twoop_tospr(ctx->instr_str, "mtspr", ref_spr, rs); fmt_twoop_tospr(ctx->instr_str, "mtspr", ref_spr, rs);
break; break;
case 512: /* mcrxr */ case 512: /* mcrxr */
ctx->instr_str = my_sprintf("%-8scrf%d", "mcrxr", (rs >> 2)); ctx->instr_str = my_sprintf("%-8scr%d", "mcrxr", (rs >> 2));
break; break;
case 531: /* clcs */ case 531: /* clcs */
strcpy(opcode, "clcs"); strcpy(opcode, "clcs");
@ -1204,7 +1236,6 @@ void opc_group59(PPCDisasmContext* ctx)
auto rs = (ctx->instr_code >> 21) & 0x1F; auto rs = (ctx->instr_code >> 21) & 0x1F;
int ext_opc = (ctx->instr_code >> 1) & 0x3FF; /* extract extended opcode */ int ext_opc = (ctx->instr_code >> 1) & 0x3FF; /* extract extended opcode */
int index = ext_opc >> 5;
bool rc_set = ctx->instr_code & 1; bool rc_set = ctx->instr_code & 1;
switch (ext_opc & 0x1F) { switch (ext_opc & 0x1F) {
@ -1348,7 +1379,6 @@ void opc_group63(PPCDisasmContext* ctx)
auto rs = (ctx->instr_code >> 21) & 0x1F; auto rs = (ctx->instr_code >> 21) & 0x1F;
int ext_opc = (ctx->instr_code >> 1) & 0x3FF; /* extract extended opcode */ int ext_opc = (ctx->instr_code >> 1) & 0x3FF; /* extract extended opcode */
int index = ext_opc >> 5;
bool rc_set = ctx->instr_code & 1; bool rc_set = ctx->instr_code & 1;
switch (ext_opc & 0x1F) { switch (ext_opc & 0x1F) {
@ -1491,7 +1521,7 @@ void opc_group63(PPCDisasmContext* ctx)
if (rs & 3) if (rs & 3)
opc_illegal(ctx); opc_illegal(ctx);
else else
ctx->instr_str = my_sprintf("%-8scrf%d, r%d, r%d,", "fcmpu", (rs >> 2), ra, rb); ctx->instr_str = my_sprintf("%-8scr%d, r%d, r%d,", "fcmpu", (rs >> 2), ra, rb);
break; break;
case 12: /* frsp */ case 12: /* frsp */
if (ra != 0) if (ra != 0)
@ -1515,7 +1545,7 @@ void opc_group63(PPCDisasmContext* ctx)
if (rs & 3) if (rs & 3)
opc_illegal(ctx); opc_illegal(ctx);
else else
ctx->instr_str = my_sprintf("%-8scrf%d, r%d, r%d,", "fcmpo", (rs >> 2), ra, rb); ctx->instr_str = my_sprintf("%-8scr%d, r%d, r%d,", "fcmpo", (rs >> 2), ra, rb);
break; break;
case 38: /* mtfsb1 */ case 38: /* mtfsb1 */
strcpy(opcode, "mtfsb1"); strcpy(opcode, "mtfsb1");
@ -1539,7 +1569,7 @@ void opc_group63(PPCDisasmContext* ctx)
case 64: case 64:
strcpy(opcode, "mcrfs"); strcpy(opcode, "mcrfs");
ctx->instr_str = my_sprintf("%-8scrf%d, crf%d", opcode, (rs >> 2), (ra >> 2)); ctx->instr_str = my_sprintf("%-8scr%d, cr%d", opcode, (rs >> 2), (ra >> 2));
break; break;
case 70: /* mtfsb0 */ case 70: /* mtfsb0 */
strcpy(opcode, "mtfsb0"); strcpy(opcode, "mtfsb0");
@ -1559,7 +1589,7 @@ void opc_group63(PPCDisasmContext* ctx)
if (ra != 0) if (ra != 0)
opc_illegal(ctx); opc_illegal(ctx);
else else
ctx->instr_str = my_sprintf("%-8scrf%d, r%d", "mtfsfi", (rs >> 2), (rb >> 1)); ctx->instr_str = my_sprintf("%-8scr%d, r%d", "mtfsfi", (rs >> 2), (rb >> 1));
break; break;
case 136: /* fnabs */ case 136: /* fnabs */
if (ra != 0) if (ra != 0)

5
cpu/ppc/test/ppcdisasmtest.csv
View File

@ -193,7 +193,7 @@
0xFFF00100,0x7E007120,mtcrf,0x07,r16 0xFFF00100,0x7E007120,mtcrf,0x07,r16
# rotation instructions # rotation instructions
0xFFF00100,0x5400EFFE,rlwinm,r0,r0,0x1D,0x1F,0x1F 0xFFF00100,0x5400EFFE,rlwinm,r0,r0,29,31,31
# shift instructions, primary opcode 0x1F # shift instructions, primary opcode 0x1F
0xFFF00100,0x7C65FE70,srawi,r5,r3,0x1F 0xFFF00100,0x7C65FE70,srawi,r5,r3,0x1F
@ -267,6 +267,9 @@
0xFFF00100,0xBC410008,stmw,r2,0x8(r1) 0xFFF00100,0xBC410008,stmw,r2,0x8(r1)
0xFFF00100,0xBFC1FFF8,stmw,r30,-0x8(r1) 0xFFF00100,0xBFC1FFF8,stmw,r30,-0x8(r1)
#compare instructions
0xFFF00100,0x2AA3FFFF,cmpli,cr5,1,r3,0xFFFF
# misc instructions # misc instructions
0xFFF00100,0x7D453D2A,stswx,r10,r5,r7 0xFFF00100,0x7D453D2A,stswx,r10,r5,r7
0xFFF00100,0x7D604828,lwarx,r11,0,r9 0xFFF00100,0x7D604828,lwarx,r11,0,r9

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