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Fix next instruction address after external exceptions.

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This commit is contained in:
Maxim Poliakovski 2022-01-20 01:32:45 +01:00
parent 604b4bc2e5
commit d8c3cfc38e
3 changed files with 11 additions and 6 deletions
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4
cpu/ppc/ppcemu.h
View File

@ -327,8 +327,8 @@ extern uint64_t exceptions_processed;
extern void ppc_cpu_init(MemCtrlBase* mem_ctrl, uint32_t cpu_version);
extern void ppc_mmu_init(uint32_t cpu_version);
[[noreturn]] void ppc_illegalop();
[[noreturn]] void ppc_fpu_off();
void ppc_illegalop();
void ppc_fpu_off();
void ppc_ext_int();
//void ppc_opcode4();

9
cpu/ppc/ppcexceptions.cpp
View File

@ -33,7 +33,6 @@ void ppc_exception_handler(Except_Type exception_type, uint32_t srr1_bits) {
#ifdef CPU_PROFILING
exceptions_processed++;
#endif
bb_kind = BB_end_kind::BB_EXCEPTION;
switch (exception_type) {
case Except_Type::EXC_SYSTEM_RESET:
@ -60,7 +59,11 @@ void ppc_exception_handler(Except_Type exception_type, uint32_t srr1_bits) {
break;
case Except_Type::EXC_EXT_INT:
ppc_state.spr[SPR::SRR0] = ppc_state.pc & 0xFFFFFFFC;
if (bb_kind != BB_end_kind::BB_NONE) {
ppc_state.spr[SPR::SRR0] = ppc_next_instruction_address;
} else {
ppc_state.spr[SPR::SRR0] = (ppc_state.pc & 0xFFFFFFFCUL) + 4;
}
ppc_next_instruction_address = 0x0500;
break;
@ -109,6 +112,8 @@ void ppc_exception_handler(Except_Type exception_type, uint32_t srr1_bits) {
ppc_next_instruction_address |= 0xFFF00000;
}
bb_kind = BB_end_kind::BB_EXCEPTION;
// perform context synchronization for recoverable exceptions
if (exception_type != Except_Type::EXC_MACHINE_CHECK &&
exception_type != Except_Type::EXC_SYSTEM_RESET) {

4
cpu/ppc/ppcexec.cpp
View File

@ -178,11 +178,11 @@ PPCOpcode SubOpcode63Grabber[1024] = { ppc_illegalop };
/** Exception helpers. */
[[noreturn]] void ppc_illegalop() {
void ppc_illegalop() {
ppc_exception_handler(Except_Type::EXC_PROGRAM, Exc_Cause::ILLEGAL_OP);
}
[[noreturn]] void ppc_fpu_off() {
void ppc_fpu_off() {
ppc_exception_handler(Except_Type::EXC_PROGRAM, Exc_Cause::FPU_OFF);
}