From e3a4539b02e53e3ace887d819fc026b44392d722 Mon Sep 17 00:00:00 2001 From: Maxim Poliakovski Date: Tue, 3 Aug 2021 16:03:03 +0200 Subject: [PATCH 1/7] WIP: Improve MMU emulation documentation. --- zdocs/cpu/powerpc/mmu.md | 23 +++++++++++++++++++++++ zdocs/cpu/powerpc/mmuemu.md | 12 ++++++++++++ 2 files changed, 35 insertions(+) create mode 100644 zdocs/cpu/powerpc/mmu.md create mode 100644 zdocs/cpu/powerpc/mmuemu.md diff --git a/zdocs/cpu/powerpc/mmu.md b/zdocs/cpu/powerpc/mmu.md new file mode 100644 index 0000000..399ac36 --- /dev/null +++ b/zdocs/cpu/powerpc/mmu.md @@ -0,0 +1,23 @@ +## Disabling BAT translation + +BAT translation can be disabled by invalidating BAT registers. This is somewhat CPU specific. +MPC601 implements its own format for BAT registers that differs from the PowerPC specification. + +MPC601-specific lower BAT registers has the "V" bit. If it's cleared, the corresponding BAT pair +is invalid and won't be used for address translation. To invalidate BATs on MPC601, it's enough +to write NULL to lower BAT registers. That's exactly what PowerMac 6100 ROM does: + ``` +li r0, 0 +mtspr ibat0l, r0 +mtspr ibat1l, r0 +mtspr ibat2l, r0 +``` + +PowerPC CPUs starting with 603 uses the BAT register format described in the PowerPC specification. +The upper BAT registers contain two bits: Vs (supervisor state valid bit) and Vp (problem/user state valid bit). +PowerPC Architecture First Edition from 1993 gives the following code: + +```BAT_entry_valid = (Vs & ~MSR_PR) | (Vp & MSR_PR)``` + +If neither Vs nor Vp is set, the corresponding BAT pair isn't valid and doesn't participate in address translation. +To invalidate BATs on non-601, it's sufficient to set the upper BAT register to 0x00000000. diff --git a/zdocs/cpu/powerpc/mmuemu.md b/zdocs/cpu/powerpc/mmuemu.md new file mode 100644 index 0000000..1aa93bb --- /dev/null +++ b/zdocs/cpu/powerpc/mmuemu.md @@ -0,0 +1,12 @@ +# PowerPC Memory Management Unit Emulation + +Emulation of a [memory management unit](https://en.wikipedia.org/wiki/Memory_management_unit) +(MMU) in a full system emulator is considered a hard task. The biggest challenge is to do it fast. + +In this article, I'm going to describe a solution for a reasonably fast emulation +of the PowerPC MMU. + +This article is based on ideas presented in the paper "Optimizing Memory Emulation +in Full System Emulators" by Xin Tong and Motohiro Kawahito (IBM Research Laboratory). + +## PowerPC MMU operation From 9ce15be10645bfa72702aac7717972798f0e9779 Mon Sep 17 00:00:00 2001 From: Maxim Poliakovski Date: Thu, 19 Aug 2021 13:31:13 +0200 Subject: [PATCH 2/7] ppcmmu.c: restructure and clean up. --- cpu/ppc/ppcmmu.cpp | 94 +++++++----------------------------------- cpu/ppc/ppcmmu.h | 10 ++--- cpu/ppc/ppcopcodes.cpp | 1 - 3 files changed, 18 insertions(+), 87 deletions(-) diff --git a/cpu/ppc/ppcmmu.cpp b/cpu/ppc/ppcmmu.cpp index 395de91..6763602 100644 --- a/cpu/ppc/ppcmmu.cpp +++ b/cpu/ppc/ppcmmu.cpp @@ -19,7 +19,7 @@ You should have received a copy of the GNU General Public License along with this program. If not, see . */ -/** @file PowerPC Memory management unit emulation. */ +/** @file PowerPC Memory Management Unit emulation. */ /* TODO: - implement TLB @@ -181,13 +181,6 @@ public: }; #endif -/** Temporary TLB test variables. */ -bool MemAccessType; // true - memory, false - I/O -bool Unaligned_crosspage = false; -uint64_t MemAddr = 0; -MMIODevice *Device = 0; -uint32_t DevOffset = 0; - /** remember recently used physical memory regions for quicker translation. */ AddressMapEntry last_read_area = {0xFFFFFFFF, 0xFFFFFFFF}; @@ -215,16 +208,6 @@ static inline T read_phys_mem(AddressMapEntry *mru_rgn, uint32_t addr) dmem_reads_total++; #endif - if (!MemAccessType) { - LOG_F(ERROR, "TLB real memory access expected!"); - } - - if ((mru_rgn->mem_ptr + (addr - mru_rgn->start)) != (uint8_t *)MemAddr) { - LOG_F(ERROR, "TLB address mismatch! Expected: 0x%llx, got: 0x%llx", - (uint64_t)(mru_rgn->mem_ptr + (addr - mru_rgn->start)), - (uint64_t)MemAddr); - } - switch(sizeof(T)) { case 1: return *(mru_rgn->mem_ptr + (addr - mru_rgn->start)); @@ -252,14 +235,6 @@ static inline T read_phys_mem(AddressMapEntry *mru_rgn, uint32_t addr) #ifdef MMU_PROFILING iomem_reads_total++; #endif - if (MemAccessType) { - LOG_F(ERROR, "TLB I/O memory access expected!"); - } - - if (mru_rgn->devobj != Device || (addr - mru_rgn->start) != DevOffset) { - LOG_F(ERROR, "TLB MMIO access mismatch! Expected: 0x%X, got: 0x%X", - addr - mru_rgn->start, DevOffset); - } return (mru_rgn->devobj->read(mru_rgn->start, addr - mru_rgn->start, sizeof(T))); @@ -287,20 +262,6 @@ static inline void write_phys_mem(AddressMapEntry *mru_rgn, uint32_t addr, T val dmem_writes_total++; #endif -#if 1 - if (!MemAccessType) { - LOG_F(ERROR, "TLB real memory access expected!"); - } - - if (!is_aligned && Unaligned_crosspage) { - LOG_F(WARNING, "Unaligned cross-page access ignored!"); - } else if ((mru_rgn->mem_ptr + (addr - mru_rgn->start)) != (uint8_t *)MemAddr) { - LOG_F(ERROR, "TLB address mismatch! Expected: 0x%llx, got: 0x%llx", - (uint64_t)(mru_rgn->mem_ptr + (addr - mru_rgn->start)), - (uint64_t)MemAddr); - } -#endif - switch(sizeof(T)) { case 1: *(mru_rgn->mem_ptr + (addr - mru_rgn->start)) = value; @@ -333,17 +294,6 @@ static inline void write_phys_mem(AddressMapEntry *mru_rgn, uint32_t addr, T val iomem_writes_total++; #endif -#if 1 - if (MemAccessType) { - LOG_F(ERROR, "TLB I/O memory access expected!"); - } - - if (mru_rgn->devobj != Device || (addr - mru_rgn->start) != DevOffset) { - LOG_F(ERROR, "TLB MMIO access mismatch! Expected: 0x%X, got: 0x%X", - addr - mru_rgn->start, DevOffset); - } -#endif - mru_rgn->devobj->write(mru_rgn->start, addr - mru_rgn->start, value, sizeof(T)); } else { @@ -375,6 +325,10 @@ void ppc_set_cur_instruction(const uint8_t* ptr) { bool gTLBFlushBatEntries = false; bool gTLBFlushPatEntries = false; +// Forward declarations. +void tlb_flush_bat_entries(); +void tlb_flush_pat_entries(); + void ibat_update(uint32_t bat_reg) { int upper_reg_num; uint32_t bl, hi_mask; @@ -527,7 +481,7 @@ static bool search_pteg( return false; } -static PATResult page_address_translate(uint32_t la, bool is_instr_fetch, +static PATResult page_address_translation(uint32_t la, bool is_instr_fetch, unsigned msr_pr, int is_write) { uint32_t sr_val, page_index, pteg_hash1, vsid, pte_word2; @@ -598,7 +552,7 @@ static PATResult page_address_translate(uint32_t la, bool is_instr_fetch, } /** PowerPC-style MMU instruction address translation. */ -static uint32_t ppc_mmu_instr_translate(uint32_t la) { +static uint32_t mmu_instr_translation(uint32_t la) { uint32_t pa; /* translated physical address */ bool bat_hit = false; @@ -631,7 +585,7 @@ static uint32_t ppc_mmu_instr_translate(uint32_t la) { /* page address translation */ if (!bat_hit) { - PATResult pat_res = page_address_translate(la, true, msr_pr, 0); + PATResult pat_res = page_address_translation(la, true, msr_pr, 0); pa = pat_res.phys; #ifdef MMU_PROFILING @@ -678,7 +632,7 @@ static uint32_t ppc_mmu_addr_translate(uint32_t la, int is_write) { /* page address translation */ if (!bat_hit) { - PATResult pat_res = page_address_translate(la, false, msr_pr, is_write); + PATResult pat_res = page_address_translation(la, false, msr_pr, is_write); pa = pat_res.phys; #ifdef MMU_PROFILING @@ -812,7 +766,7 @@ static TLBEntry* tlb2_target_entry(uint32_t gp_va) tlb_entry[2].lru_bits = 0x2; tlb_entry[3].lru_bits = 0x3; return &tlb_entry[3]; - } else { // no invalid blocks, replace an existing one according with the hLRU policy + } else { // no free entries, replace an existing one according with the hLRU policy #ifdef TLB_PROFILING num_entry_replacements++; #endif @@ -880,7 +834,7 @@ static TLBEntry* tlb2_refill(uint32_t guest_va, int is_write) } } else { // page address translation - PATResult pat_res = page_address_translate(guest_va, false, + PATResult pat_res = page_address_translation(guest_va, false, !!(ppc_state.msr & 0x4000), is_write); phys_addr = pat_res.phys; flags = TLBFlags::TLBE_FROM_PAT; // tell the world we come from @@ -1018,8 +972,6 @@ static inline uint64_t tlb_translate_addr(uint32_t guest_va) // look up address in the primary TLB tlb1_entry = &pCurTLB1[(guest_va >> PAGE_SIZE_BITS) & tlb_size_mask]; if (tlb1_entry->tag == tag) { // primary TLB hit -> fast path - MemAccessType = true; - MemAddr = tlb1_entry->host_va_offset + guest_va; return tlb1_entry->host_va_offset + guest_va; } else { // primary TLB miss -> look up address in the secondary TLB tlb2_entry = &pCurTLB2[((guest_va >> PAGE_SIZE_BITS) & tlb_size_mask) * TLB2_WAYS]; @@ -1060,13 +1012,8 @@ static inline uint64_t tlb_translate_addr(uint32_t guest_va) tlb1_entry->tag = tag; tlb1_entry->flags = tlb2_entry->flags; tlb1_entry->host_va_offset = tlb2_entry->host_va_offset; - MemAccessType = true; - MemAddr = tlb1_entry->host_va_offset + guest_va; return tlb1_entry->host_va_offset + guest_va; } else { // an attempt to access a memory-mapped device - MemAccessType = false; - Device = tlb2_entry->reg_desc->devobj; - DevOffset = guest_va - tlb2_entry->reg_desc->start; return guest_va - tlb2_entry->reg_desc->start; } } @@ -1236,7 +1183,6 @@ inline T mmu_read_vmem(uint32_t guest_va) { } // explicitely instantiate all required mmu_read_vmem variants -// to avoid linking errors template uint8_t mmu_read_vmem(uint32_t guest_va); template uint16_t mmu_read_vmem(uint32_t guest_va); template uint32_t mmu_read_vmem(uint32_t guest_va); @@ -1262,7 +1208,7 @@ inline void mmu_write_vmem(uint32_t guest_va, T value) { } if (!(tlb1_entry->flags & TLBFlags::PTE_SET_C)) { // perform full page address translation to update PTE.C bit - PATResult pat_res = page_address_translate(guest_va, false, + PATResult pat_res = page_address_translation(guest_va, false, !!(ppc_state.msr & 0x4000), true); tlb1_entry->flags |= TLBFlags::PTE_SET_C; @@ -1273,8 +1219,6 @@ inline void mmu_write_vmem(uint32_t guest_va, T value) { } } host_va = (uint8_t *)(tlb1_entry->host_va_offset + guest_va); - MemAccessType = true; - MemAddr = (uint64_t)host_va; } else { // primary TLB miss -> look up address in the secondary TLB tlb2_entry = lookup_secondary_tlb(guest_va, tag); @@ -1293,8 +1237,6 @@ inline void mmu_write_vmem(uint32_t guest_va, T value) { #endif if (!(tlb2_entry->flags & TLBFlags::PAGE_WRITABLE)) { - LOG_F(WARNING, "DSI Exception in mmu_write_vmem! PC=0x%08X", ppc_state.pc); - //return; ppc_state.spr[SPR::DSISR] = 0x08000000 | (1 << 25); ppc_state.spr[SPR::DAR] = guest_va; mmu_exception_handler(Except_Type::EXC_DSI, 0); @@ -1302,7 +1244,7 @@ inline void mmu_write_vmem(uint32_t guest_va, T value) { if (!(tlb2_entry->flags & TLBFlags::PTE_SET_C)) { // perform full page address translation to update PTE.C bit - PATResult pat_res = page_address_translate(guest_va, false, + PATResult pat_res = page_address_translation(guest_va, false, !!(ppc_state.msr & 0x4000), true); tlb2_entry->flags |= TLBFlags::PTE_SET_C; } @@ -1313,17 +1255,12 @@ inline void mmu_write_vmem(uint32_t guest_va, T value) { tlb1_entry->flags = tlb2_entry->flags; tlb1_entry->host_va_offset = tlb2_entry->host_va_offset; host_va = (uint8_t *)(tlb1_entry->host_va_offset + guest_va); - //MemAccessType = true; - //MemAddr = (uint64_t)host_va; } else { // otherwise, it's an access to a memory-mapped device #ifdef MMU_PROFILING iomem_writes_total++; #endif tlb2_entry->reg_desc->devobj->write(tlb2_entry->reg_desc->start, guest_va - tlb2_entry->reg_desc->start, value, sizeof(T)); - //MemAccessType = false; - //Device = tlb2_entry->reg_desc->devobj; - //DevOffset = guest_va - tlb2_entry->reg_desc->start; return; } } @@ -1338,7 +1275,6 @@ inline void mmu_write_vmem(uint32_t guest_va, T value) { return; } -#if 1 // handle aligned memory accesses switch(sizeof(T)) { case 1: @@ -1354,11 +1290,9 @@ inline void mmu_write_vmem(uint32_t guest_va, T value) { WRITE_QWORD_BE_A(host_va, value); break; } -#endif } // explicitely instantiate all required mmu_write_vmem variants -// to avoid linking errors template void mmu_write_vmem(uint32_t guest_va, uint8_t value); template void mmu_write_vmem(uint32_t guest_va, uint16_t value); template void mmu_write_vmem(uint32_t guest_va, uint32_t value); @@ -1556,7 +1490,7 @@ uint8_t* quickinstruction_translate(uint32_t addr) { /* perform instruction address translation if enabled */ if (ppc_state.msr & 0x20) { - addr = ppc_mmu_instr_translate(addr); + addr = mmu_instr_translation(addr); } if (addr >= last_exec_area.start && addr <= last_exec_area.end) { diff --git a/cpu/ppc/ppcmmu.h b/cpu/ppc/ppcmmu.h index 80ae209..6fcb8f2 100644 --- a/cpu/ppc/ppcmmu.h +++ b/cpu/ppc/ppcmmu.h @@ -19,10 +19,10 @@ You should have received a copy of the GNU General Public License along with this program. If not, see . */ -// The opcodes for the processor - ppcopcodes.cpp +/** @file PowerPC Memory Management Unit definitions. */ -#ifndef PPCMEMORY_H -#define PPCMEMORY_H +#ifndef PPCMMU_H +#define PPCMMU_H #include #include @@ -93,8 +93,6 @@ extern uint8_t* mmu_get_dma_mem(uint32_t addr, uint32_t size); extern void mmu_change_mode(void); extern void mmu_pat_ctx_changed(); extern void tlb_flush_entry(uint32_t ea); -extern void tlb_flush_bat_entries(); -extern void tlb_flush_pat_entries(); extern void ppc_set_cur_instruction(const uint8_t* ptr); extern void mem_write_byte(uint32_t addr, uint8_t value); @@ -113,4 +111,4 @@ extern T mmu_read_vmem(uint32_t guest_va); template extern void mmu_write_vmem(uint32_t guest_va, T value); -#endif // PPCMEMORY_H +#endif // PPCMMU_H diff --git a/cpu/ppc/ppcopcodes.cpp b/cpu/ppc/ppcopcodes.cpp index 71e8572..5283b99 100644 --- a/cpu/ppc/ppcopcodes.cpp +++ b/cpu/ppc/ppcopcodes.cpp @@ -873,7 +873,6 @@ void dppc_interpreter::ppc_mtspr() { } if (ref_spr == SPR::SDR1) { - LOG_F(INFO, "SDR1 changed to 0x%08X", ppc_state.spr[SPR::SDR1]); mmu_pat_ctx_changed(); } From ea5b0d9f5245213e474c7a204aa392a045aabb71 Mon Sep 17 00:00:00 2001 From: Maxim Poliakovski Date: Sat, 11 Sep 2021 21:02:46 +0200 Subject: [PATCH 3/7] atirage: framebuffer rendering and various improvements. --- CMakeLists.txt | 1 + devices/CMakeLists.txt | 3 +- devices/atirage.cpp | 156 ++++++++++++++++++++++++++++++++++++----- devices/atirage.h | 10 ++- devices/displayid.cpp | 69 ++++++++++++++++++ devices/displayid.h | 9 ++- main.cpp | 15 ++-- 7 files changed, 236 insertions(+), 27 deletions(-) diff --git a/CMakeLists.txt b/CMakeLists.txt index 5e0dd84..9e956b1 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -82,6 +82,7 @@ include_directories("${PROJECT_SOURCE_DIR}" "${PROJECT_SOURCE_DIR}/devices" "${PROJECT_SOURCE_DIR}/debugger" "${PROJECT_SOURCE_DIR}/utils" "${PROJECT_SOURCE_DIR}/thirdparty/loguru/" +# ${SDL2_INCLUDE_DIRS}) "${PROJECT_SOURCE_DIR}/thirdparty/SDL2/") # "${PROJECT_SOURCE_DIR}/thirdparty/cubeb/include") # ${LIBSOUNDIO_HEADERS}) diff --git a/devices/CMakeLists.txt b/devices/CMakeLists.txt index 21193b6..b289569 100644 --- a/devices/CMakeLists.txt +++ b/devices/CMakeLists.txt @@ -1,4 +1,5 @@ -include_directories("${PROJECT_SOURCE_DIR}") +include_directories("${PROJECT_SOURCE_DIR}" + "${PROJECT_SOURCE_DIR}/thirdparty/SDL2/") file(GLOB SOURCES "${CMAKE_CURRENT_SOURCE_DIR}/*.cpp") diff --git a/devices/atirage.cpp b/devices/atirage.cpp index 0a68d11..8e226bf 100644 --- a/devices/atirage.cpp +++ b/devices/atirage.cpp @@ -24,6 +24,7 @@ along with this program. If not, see . #include "memaccess.h" #include "pcidevice.h" #include +#include #include #include #include @@ -75,6 +76,12 @@ static const std::map mach64_reg_names = { {0x01FC, "SCALE_3D_CNTL"}, {0x0310, "FIFO_STAT"}, {0x0338, "GUI_STAT"}, + {0x04C0, "MPP_CONFIG"}, + {0x04C4, "MPP_STROBE_SEQ"}, + {0x04C8, "MPP_ADDR"}, + {0x04CC, "MPP_DATA"}, + {0x0500, "TVO_CNTL"}, + {0x0704, "SETUP_CNTL"}, }; @@ -89,6 +96,9 @@ ATIRage::ATIRage(uint16_t dev_id, uint32_t mem_amount) : PCIDevice("ati-rage") { /* ATI Rage driver needs to know ASIC ID (manufacturer's internal chip code) to operate properly */ switch (dev_id) { + case ATI_RAGE_GT_DEV_ID: + asic_id = 0x9A; // GT-B2U3 fabricated by UMC + break; case ATI_RAGE_PRO_DEV_ID: asic_id = 0x5C; // R3B/D/P-A4 fabricated by UMC break; @@ -108,10 +118,14 @@ ATIRage::ATIRage(uint16_t dev_id, uint32_t mem_amount) : PCIDevice("ati-rage") { /* initialize display identification */ this->disp_id = new DisplayID(); + + //this->surface = new uint8_t[640 * 480]; } ATIRage::~ATIRage() { + //delete (this->surface); + if (this->vram_ptr) { delete this->vram_ptr; } @@ -163,11 +177,6 @@ uint32_t ATIRage::read_reg(uint32_t offset, uint32_t size) { read_mem(&this->block_io_regs[offset], size)); } - if (offset > sizeof(this->block_io_regs)) { - LOG_F(WARNING, "ATI Rage: register offset 0x%04X out of bounds!", offset); - return 0; - } - res = read_mem(&this->block_io_regs[offset], size); return res; @@ -177,21 +186,30 @@ void ATIRage::write_reg(uint32_t offset, uint32_t value, uint32_t size) { uint32_t gpio_val; uint16_t gpio_dir; - if (offset > sizeof(this->block_io_regs)) { - LOG_F(WARNING, "ATI Rage: register offset 0x%04X out of bounds!", offset); - return; - } - /* size-dependent endian conversion */ write_mem(&this->block_io_regs[offset], value, size); switch (offset & ~3) { + case ATI_CRTC_OFF_PITCH: + LOG_F(INFO, "ATI Rage: CRTC_OFF_PITCH=0x%08X", READ_DWORD_LE_A(&this->block_io_regs[ATI_CRTC_OFF_PITCH])); + break; case ATI_CRTC_GEN_CNTL: if (this->block_io_regs[ATI_CRTC_GEN_CNTL+3] & 2) { this->crtc_enable(); } else { this->crtc_on = false; } + LOG_F(INFO, "ATI Rage: CRTC_GEN_CNTL:CRTC_ENABLE=%d", !!(this->block_io_regs[ATI_CRTC_GEN_CNTL+3] & 2)); + LOG_F(INFO, "ATI Rage: CRTC_GEN_CNTL:CRTC_DISPLAY_DIS=%d", !!(this->block_io_regs[ATI_CRTC_GEN_CNTL] & 0x40)); + break; + case ATI_CUR_OFFSET: + LOG_F(INFO, "ATI Rage: CUR_OFFSET=0x%08X", READ_DWORD_LE_A(&this->block_io_regs[ATI_CUR_OFFSET])); + break; + case ATI_CUR_HORZ_VERT_POSN: + LOG_F(INFO, "ATI Rage: CUR_HORZ_VERT_POSN=0x%08X", READ_DWORD_LE_A(&this->block_io_regs[ATI_CUR_HORZ_VERT_POSN])); + break; + case ATI_CUR_HORZ_VERT_OFF: + LOG_F(INFO, "ATI Rage: CUR_HORZ_VERT_OFF=0x%08X", READ_DWORD_LE_A(&this->block_io_regs[ATI_CUR_HORZ_VERT_OFF])); break; case ATI_GP_IO: if (offset < (ATI_GP_IO + 2)) { @@ -239,6 +257,9 @@ void ATIRage::write_reg(uint32_t offset, uint32_t value, uint32_t size) { } } break; + case ATI_GEN_TEST_CNTL: + LOG_F(INFO, "HW cursor: %s", this->block_io_regs[ATI_GEN_TEST_CNTL] & 0x80 ? "on" : "off"); + break; default: LOG_F( INFO, @@ -247,6 +268,11 @@ void ATIRage::write_reg(uint32_t offset, uint32_t value, uint32_t size) { offset & ~3, READ_DWORD_LE_A(&this->block_io_regs[offset & ~3])); } + + if ((this->block_io_regs[ATI_CRTC_GEN_CNTL+3] & 2) && + !(this->block_io_regs[ATI_CRTC_GEN_CNTL] & 0x40)) { + this->update_screen(); + } } @@ -373,9 +399,17 @@ uint32_t ATIRage::read(uint32_t reg_start, uint32_t offset, int size) /* read from little-endian VRAM region */ return read_mem(this->vram_ptr + offset, size); } - else if (offset >= MEMMAP_OFFSET) { - /* read from memory-mapped registers */ - return this->read_reg(offset - MEMMAP_OFFSET, size); + else if (offset >= BE_FB_OFFSET) { + /* read from big-endian VRAM region */ + return read_mem_rev(this->vram_ptr + (offset - BE_FB_OFFSET), size); + } + else if (offset >= MM_REGS_0_OFF) { + /* read from memory-mapped registers, block 0 */ + return this->read_reg(offset - MM_REGS_0_OFF, size); + } + else if (offset >= MM_REGS_1_OFF) { + /* read from memory-mapped registers, block 1 */ + return this->read_reg(offset - MM_REGS_1_OFF + 0x400, size); } else { LOG_F(WARNING, "ATI Rage: read attempt from unmapped aperture region at 0x%08X", offset); @@ -396,9 +430,18 @@ void ATIRage::write(uint32_t reg_start, uint32_t offset, uint32_t value, int siz if (offset < this->vram_size) { /* write to little-endian VRAM region */ write_mem(this->vram_ptr + offset, value, size); - } else if (offset >= MEMMAP_OFFSET) { - /* write to memory-mapped registers */ - this->write_reg(offset - MEMMAP_OFFSET, value, size); + } + else if (offset >= BE_FB_OFFSET) { + /* write to big-endian VRAM region */ + write_mem_rev(this->vram_ptr + (offset - BE_FB_OFFSET), value, size); + } + else if (offset >= MM_REGS_0_OFF) { + /* write to memory-mapped registers, block 0 */ + this->write_reg(offset - MM_REGS_0_OFF, value, size); + } + else if (offset >= MM_REGS_1_OFF) { + /* write to memory-mapped registers, block 1 */ + this->write_reg(offset - MM_REGS_1_OFF + 0x400, value, size); } else { LOG_F(WARNING, "ATI Rage: write attempt to unmapped aperture region at 0x%08X", offset); @@ -497,3 +540,84 @@ void ATIRage::crtc_enable() { this->crtc_on = true; } + +void ATIRage::draw_hw_cursor(uint8_t *dst_buf, int dst_pitch) { + uint8_t *src_buf, *src_row, *dst_row, px4; + + int horz_offset = READ_DWORD_LE_A(&this->block_io_regs[ATI_CUR_HORZ_VERT_OFF]) & 0x3F; + int vert_offset = (READ_DWORD_LE_A(&this->block_io_regs[ATI_CUR_HORZ_VERT_OFF]) >> 16) & 0x3F; + + src_buf = this->vram_ptr + (READ_DWORD_LE_A(&this->block_io_regs[ATI_CUR_OFFSET]) * 8); + + int cur_height = 64 - vert_offset; + + uint32_t color0 = READ_DWORD_LE_A(&this->block_io_regs[ATI_CUR_CLR0]) | 0x000000FFUL; + uint32_t color1 = READ_DWORD_LE_A(&this->block_io_regs[ATI_CUR_CLR1]) | 0x000000FFUL; + + for (int h = 0; h < cur_height; h++) { + dst_row = &dst_buf[h * dst_pitch]; + src_row = &src_buf[h * 16]; + + for (int x = 0; x < 16; x++) { + px4 = src_row[x]; + + for (int p = 0; p < 4; p++, px4 >>= 2, dst_row += 4) { + switch(px4 & 3) { + case 0: // cursor color 0 + WRITE_DWORD_BE_A(dst_row, color0); + break; + case 1: // cursor color 1 + WRITE_DWORD_BE_A(dst_row, color1); + break; + case 2: // transparent + break; + case 3: // 1's complement of display pixel + break; + } + } + } + } +} + +void ATIRage::update_screen() { + uint8_t *src_buf, *dst_buf, *src_row, *dst_row, pix; + int src_pitch, dst_pitch; + + //auto start_time = std::chrono::steady_clock::now(); + + this->disp_id->get_disp_texture((void **)&dst_buf, &dst_pitch); + + uint32_t src_offset = (READ_DWORD_LE_A(&this->block_io_regs[ATI_CRTC_OFF_PITCH]) & 0xFFFF) * 8; + + src_pitch = ((READ_DWORD_LE_A(&this->block_io_regs[ATI_CRTC_OFF_PITCH])) >> 19) & 0x1FF8; + + src_buf = this->vram_ptr + src_offset; + + for (int h = 0; h < this->active_height; h++) { + src_row = &src_buf[h * src_pitch]; + dst_row = &dst_buf[h * dst_pitch]; + + for (int x = 0; x < this->active_width; x++) { + pix = src_row[x]; + dst_row[0] = this->palette[pix][2]; // B + dst_row[1] = this->palette[pix][1]; // G + dst_row[2] = this->palette[pix][0]; // R + dst_row[3] = 255; // A + dst_row += 4; + } + } + + // HW cursor data is stored at the beginning of the video memory + // HACK: use src_offset to recognize cursor data being ready + // Normally, we should check GEN_CUR_ENABLE bit in the GEN_TEST_CNTL register + if (src_offset > 0x400 && READ_DWORD_LE_A(&this->block_io_regs[ATI_CUR_OFFSET])) { + this->draw_hw_cursor(dst_buf + dst_pitch * 20 + 120, dst_pitch); + } + + this->disp_id->update_screen(); + + //auto end_time = std::chrono::steady_clock::now(); + //auto time_elapsed = std::chrono::duration_cast(end_time - start_time); + //LOG_F(INFO, "Display uodate took: %lld ns", time_elapsed.count()); + SDL_Delay(15); +} diff --git a/devices/atirage.h b/devices/atirage.h index d1c8c1c..05c421c 100644 --- a/devices/atirage.h +++ b/devices/atirage.h @@ -169,6 +169,7 @@ enum { ATI_MPP_ADDR = 0x04C8, ATI_MPP_DATA = 0x04CC, ATI_TVO_CNTL = 0x0500, + ATI_SETUP_CNTL = 0x0704, }; /* Mach64 PLL register indices. */ @@ -184,7 +185,9 @@ enum { }; constexpr auto APERTURE_SIZE = 0x01000000UL; /* Mach64 aperture size */ -constexpr auto MEMMAP_OFFSET = 0x007FFC00UL; /* offset to memory mapped registers */ +constexpr auto MM_REGS_0_OFF = 0x007FFC00UL; /* offset to memory mapped registers, block 0 */ +constexpr auto MM_REGS_1_OFF = 0x007FF800UL; /* offset to memory mapped registers, block 1 */ +constexpr auto BE_FB_OFFSET = 0x00800000UL; /* Offset to the big-endian frame buffer */ constexpr auto ATI_XTAL = 14318180.0f; // external crystal oscillator frequency @@ -221,9 +224,11 @@ protected: float calc_pll_freq(int scale, int fb_div); void verbose_pixel_format(int crtc_index); void crtc_enable(); + void draw_hw_cursor(uint8_t *dst_buf, int dst_pitch); + void update_screen(); private: - uint8_t block_io_regs[512] = {0}; + uint8_t block_io_regs[2048] = {0}; uint8_t pci_cfg[256] = {0}; /* PCI configuration space */ @@ -246,5 +251,6 @@ private: uint8_t palette[256][4]; /* internal DAC palette in RGBA format */ int comp_index; /* color component index for DAC palette access */ + uint8_t *surface; }; #endif /* ATI_RAGE_H */ diff --git a/devices/displayid.cpp b/devices/displayid.cpp index 06437b4..99a5898 100644 --- a/devices/displayid.cpp +++ b/devices/displayid.cpp @@ -21,6 +21,7 @@ along with this program. If not, see . #include "displayid.h" #include +#include "SDL.h" DisplayID::DisplayID() { /* Initialize Apple monitor codes */ @@ -37,8 +38,76 @@ DisplayID::DisplayID() { /* DDC sense mode is on by default */ this->i2c_on = true; + + LOG_F(INFO, "Create display window..."); + + // Create display window + this->display_wnd = SDL_CreateWindow( + "DingusPPC Display", + SDL_WINDOWPOS_UNDEFINED, + SDL_WINDOWPOS_UNDEFINED, + 640, + 480, + SDL_WINDOW_OPENGL + ); + + if (this->display_wnd == NULL) { + LOG_F(ERROR, "Display: SDL_CreateWindow failed with %s\n", SDL_GetError()); + } + + this->renderer = SDL_CreateRenderer(this->display_wnd, -1, SDL_RENDERER_ACCELERATED); + if (this->renderer == NULL) { + LOG_F(ERROR, "Display: SDL_CreateRenderer failed with %s\n", SDL_GetError()); + } + + SDL_SetRenderDrawColor(this->renderer, 0, 0, 0, 255); + SDL_RenderClear(this->renderer); + SDL_RenderPresent(this->renderer); + + // Stupidly poll for 10 events. + // Otherwise no window will be shown on mac OS! + SDL_Event e; + for (int i = 0; i < 10; i++) { + SDL_PollEvent(&e); + } + + this->disp_texture = SDL_CreateTexture( + this->renderer, + SDL_PIXELFORMAT_ARGB8888, + SDL_TEXTUREACCESS_STREAMING, + 640, 480 + ); + + if (this->disp_texture == NULL) { + LOG_F(ERROR, "Display: SDL_CreateTexture failed with %s\n", SDL_GetError()); + } } +DisplayID::~DisplayID() { + if (this->disp_texture) { + SDL_DestroyTexture(this->disp_texture); + } + + if (this->renderer) { + SDL_DestroyRenderer(this->renderer); + } + + if (this->display_wnd) { + SDL_DestroyWindow(this->display_wnd); + } +} + +void DisplayID::get_disp_texture(void **pix_buf, int *pitch) { + SDL_LockTexture(this->disp_texture, NULL, pix_buf, pitch); +} + +void DisplayID::update_screen() { + SDL_UnlockTexture(this->disp_texture); + //SDL_SetRenderDrawColor(this->renderer, 255, 255, 255, 255); + SDL_RenderClear(this->renderer); + SDL_RenderCopy(this->renderer, this->disp_texture, NULL, NULL); + SDL_RenderPresent(this->renderer); +} uint16_t DisplayID::set_result(uint8_t sda, uint8_t scl) { this->last_sda = sda; diff --git a/devices/displayid.h b/devices/displayid.h index 8283ab6..e3aef6f 100644 --- a/devices/displayid.h +++ b/devices/displayid.h @@ -33,6 +33,7 @@ along with this program. If not, see . #ifndef DISPLAY_ID_H #define DISPLAY_ID_H +#include "SDL.h" #include /** I2C bus states. */ @@ -50,15 +51,21 @@ enum I2CState : uint8_t { class DisplayID { public: DisplayID(); - ~DisplayID() = default; + ~DisplayID(); uint16_t read_monitor_sense(uint16_t data, uint16_t dirs); + void get_disp_texture(void **pix_buf, int *pitch); + void update_screen(void); protected: uint16_t set_result(uint8_t sda, uint8_t scl); uint16_t update_ddc_i2c(uint8_t sda, uint8_t scl); private: + SDL_Window *display_wnd; + SDL_Renderer *renderer; + SDL_Texture *disp_texture; + bool i2c_on; uint8_t std_sense_code; diff --git a/main.cpp b/main.cpp index 915a894..328cfc9 100644 --- a/main.cpp +++ b/main.cpp @@ -47,6 +47,7 @@ void sigint_handler(int signum) { LOG_F(INFO, "Shutting down..."); delete gMachineObj.release(); + SDL_Quit(); exit(0); } @@ -164,6 +165,11 @@ int main(int argc, char** argv) { cout << "BootROM path: " << bootrom_path << endl; cout << "Execution mode: " << execution_mode << endl; + if (SDL_Init(SDL_INIT_VIDEO)) { + LOG_F(ERROR, "SDL_Init error: %s", SDL_GetError()); + return 0; + } + // initialize global profiler object gProfilerObj.reset(new Profiler()); @@ -174,13 +180,6 @@ int main(int argc, char** argv) { // redirect SIGINT to our own handler signal(SIGINT, sigint_handler); -#ifdef SDL - if (SDL_Init(SDL_INIT_AUDIO)){ - LOG_F(ERROR, "SDL_Init error: %s", SDL_GetError()); - return 0; - } -#endif - switch (execution_mode) { case 0: interpreter_main_loop(); @@ -198,5 +197,7 @@ bail: delete gMachineObj.release(); + SDL_Quit(); + return 0; } From 738e2d3bd1490e76ef2bb663cd2a41e65c35d77e Mon Sep 17 00:00:00 2001 From: dingusdev Date: Sat, 11 Sep 2021 22:55:24 -0700 Subject: [PATCH 4/7] Fixed compiling for Visual Studio 2019 --- devices/displayid.cpp | 2 +- devices/displayid.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/devices/displayid.cpp b/devices/displayid.cpp index 99a5898..c7047e6 100644 --- a/devices/displayid.cpp +++ b/devices/displayid.cpp @@ -21,7 +21,7 @@ along with this program. If not, see . #include "displayid.h" #include -#include "SDL.h" +#include "thirdparty/SDL2/include/SDL.h" DisplayID::DisplayID() { /* Initialize Apple monitor codes */ diff --git a/devices/displayid.h b/devices/displayid.h index e3aef6f..203cbfb 100644 --- a/devices/displayid.h +++ b/devices/displayid.h @@ -33,7 +33,7 @@ along with this program. If not, see . #ifndef DISPLAY_ID_H #define DISPLAY_ID_H -#include "SDL.h" +#include "thirdparty/SDL2/include/SDL.h" #include /** I2C bus states. */ From 1c77057860aaf9b60320ea403ae8292f059f74b4 Mon Sep 17 00:00:00 2001 From: dingusdev Date: Sun, 12 Sep 2021 08:08:22 -0700 Subject: [PATCH 5/7] Fixed building through CMake --- CMakeLists.txt | 2 ++ devices/displayid.cpp | 2 +- devices/displayid.h | 2 +- 3 files changed, 4 insertions(+), 2 deletions(-) diff --git a/CMakeLists.txt b/CMakeLists.txt index 9e956b1..dbe08b9 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -11,6 +11,8 @@ set(LIBRARY_OUTPUT_PATH ${CMAKE_BINARY_DIR}/lib) if (NOT WIN32) find_package(SDL2 REQUIRED) include_directories(${SDL2_INCLUDE_DIRS}) +else() +include_directories("${PROJECT_SOURCE_DIR}/thirdparty/SDL2/include/") if (UNIX AND NOT APPLE) find_package (Threads) endif() diff --git a/devices/displayid.cpp b/devices/displayid.cpp index c7047e6..99a5898 100644 --- a/devices/displayid.cpp +++ b/devices/displayid.cpp @@ -21,7 +21,7 @@ along with this program. If not, see . #include "displayid.h" #include -#include "thirdparty/SDL2/include/SDL.h" +#include "SDL.h" DisplayID::DisplayID() { /* Initialize Apple monitor codes */ diff --git a/devices/displayid.h b/devices/displayid.h index 203cbfb..e3aef6f 100644 --- a/devices/displayid.h +++ b/devices/displayid.h @@ -33,7 +33,7 @@ along with this program. If not, see . #ifndef DISPLAY_ID_H #define DISPLAY_ID_H -#include "thirdparty/SDL2/include/SDL.h" +#include "SDL.h" #include /** I2C bus states. */ From 84e111290f3773b0999cad109c9d0aa037253334 Mon Sep 17 00:00:00 2001 From: Maxim Poliakovski Date: Thu, 16 Sep 2021 00:46:38 +0200 Subject: [PATCH 6/7] Fix includes for loguru and SDL. --- cpu/ppc/CMakeLists.txt | 3 ++- cpu/ppc/poweropcodes.cpp | 2 +- cpu/ppc/ppcexec.cpp | 2 +- cpu/ppc/ppcfpopcodes.cpp | 2 +- cpu/ppc/ppcmmu.cpp | 2 +- cpu/ppc/ppcopcodes.cpp | 2 +- debugger/CMakeLists.txt | 1 + debugger/debugger.cpp | 2 +- devices/CMakeLists.txt | 1 + devices/adb.cpp | 2 +- devices/atirage.cpp | 2 +- devices/awacs.cpp | 2 +- devices/awacs.h | 1 - devices/dbdma.cpp | 2 +- devices/displayid.cpp | 2 +- devices/heathrow.cpp | 2 +- devices/i2c.h | 2 +- devices/mpc106.cpp | 2 +- devices/nvram.cpp | 2 +- devices/soundserver.cpp | 2 +- devices/spdram.h | 2 +- devices/viacuda.cpp | 2 +- execution/CMakeLists.txt | 3 ++- execution/interpreter_loop.cpp | 4 ++-- machines/CMakeLists.txt | 3 ++- machines/machinebase.cpp | 2 +- machines/machinefactory.cpp | 2 +- machines/machinegossamer.cpp | 2 +- machines/machineproperties.h | 4 ++-- main.cpp | 6 +++--- memaccess.h | 2 +- 31 files changed, 37 insertions(+), 33 deletions(-) diff --git a/cpu/ppc/CMakeLists.txt b/cpu/ppc/CMakeLists.txt index 02905d7..ce7b3c4 100644 --- a/cpu/ppc/CMakeLists.txt +++ b/cpu/ppc/CMakeLists.txt @@ -1,4 +1,5 @@ -include_directories("${PROJECT_SOURCE_DIR}") +include_directories("${PROJECT_SOURCE_DIR}" + "${PROJECT_SOURCE_DIR}/thirdparty/loguru/") file(GLOB SOURCES "${CMAKE_CURRENT_SOURCE_DIR}/*.cpp") diff --git a/cpu/ppc/poweropcodes.cpp b/cpu/ppc/poweropcodes.cpp index 3ce0e2c..73b61b9 100644 --- a/cpu/ppc/poweropcodes.cpp +++ b/cpu/ppc/poweropcodes.cpp @@ -30,7 +30,7 @@ along with this program. If not, see . #include #include #include -#include +#include // Affects the XER register's SO and OV Bits diff --git a/cpu/ppc/ppcexec.cpp b/cpu/ppc/ppcexec.cpp index 124f16f..a5afe38 100644 --- a/cpu/ppc/ppcexec.cpp +++ b/cpu/ppc/ppcexec.cpp @@ -26,7 +26,7 @@ along with this program. If not, see . #include #include #include -#include +#include #include #include "ppcemu.h" diff --git a/cpu/ppc/ppcfpopcodes.cpp b/cpu/ppc/ppcfpopcodes.cpp index b4d6d43..bb202a7 100644 --- a/cpu/ppc/ppcfpopcodes.cpp +++ b/cpu/ppc/ppcfpopcodes.cpp @@ -33,7 +33,7 @@ along with this program. If not, see . #include #include #include -#include +#include // Used for FP calcs uint64_t ppc_result64_b; diff --git a/cpu/ppc/ppcmmu.cpp b/cpu/ppc/ppcmmu.cpp index 6763602..a866199 100644 --- a/cpu/ppc/ppcmmu.cpp +++ b/cpu/ppc/ppcmmu.cpp @@ -37,7 +37,7 @@ along with this program. If not, see . #include #include #include -#include +#include /* pointer to exception handler to be called when a MMU exception is occured. */ void (*mmu_exception_handler)(Except_Type exception_type, uint32_t srr1_bits); diff --git a/cpu/ppc/ppcopcodes.cpp b/cpu/ppc/ppcopcodes.cpp index 5283b99..ca632f3 100644 --- a/cpu/ppc/ppcopcodes.cpp +++ b/cpu/ppc/ppcopcodes.cpp @@ -31,7 +31,7 @@ along with this program. If not, see . #include #include #include -#include +#include #include #include diff --git a/debugger/CMakeLists.txt b/debugger/CMakeLists.txt index 50d4d11..b8ae0a7 100644 --- a/debugger/CMakeLists.txt +++ b/debugger/CMakeLists.txt @@ -1,4 +1,5 @@ include_directories("${PROJECT_SOURCE_DIR}" + "${PROJECT_SOURCE_DIR}/thirdparty/loguru/" "${PROJECT_SOURCE_DIR}/thirdparty/capstone/include") file(GLOB SOURCES "${CMAKE_CURRENT_SOURCE_DIR}/*.cpp") diff --git a/debugger/debugger.cpp b/debugger/debugger.cpp index 983d824..763979d 100644 --- a/debugger/debugger.cpp +++ b/debugger/debugger.cpp @@ -27,7 +27,7 @@ along with this program. If not, see . #include #include #include -#include +#include #include "../cpu/ppc/ppcdisasm.h" #include "../cpu/ppc/ppcemu.h" #include "../cpu/ppc/ppcmmu.h" diff --git a/devices/CMakeLists.txt b/devices/CMakeLists.txt index b289569..7913765 100644 --- a/devices/CMakeLists.txt +++ b/devices/CMakeLists.txt @@ -1,4 +1,5 @@ include_directories("${PROJECT_SOURCE_DIR}" + "${PROJECT_SOURCE_DIR}/thirdparty/loguru/" "${PROJECT_SOURCE_DIR}/thirdparty/SDL2/") file(GLOB SOURCES "${CMAKE_CURRENT_SOURCE_DIR}/*.cpp") diff --git a/devices/adb.cpp b/devices/adb.cpp index 42ce4ee..842c3eb 100644 --- a/devices/adb.cpp +++ b/devices/adb.cpp @@ -37,7 +37,7 @@ along with this program. If not, see . #include #endif -#include +#include using namespace std; diff --git a/devices/atirage.cpp b/devices/atirage.cpp index 8e226bf..3772cd7 100644 --- a/devices/atirage.cpp +++ b/devices/atirage.cpp @@ -27,7 +27,7 @@ along with this program. If not, see . #include #include #include -#include +#include /* Mach64 post dividers. */ static const int mach64_post_div[8] = { diff --git a/devices/awacs.cpp b/devices/awacs.cpp index d5e2422..78ef3ce 100644 --- a/devices/awacs.cpp +++ b/devices/awacs.cpp @@ -30,7 +30,7 @@ along with this program. If not, see . #include "machines/machinebase.h" #include "soundserver.h" #include -#include +#include static int awac_freqs[8] = {44100, 29400, 22050, 17640, 14700, 11025, 8820, 7350}; diff --git a/devices/awacs.h b/devices/awacs.h index a0bce25..4522e30 100644 --- a/devices/awacs.h +++ b/devices/awacs.h @@ -32,7 +32,6 @@ along with this program. If not, see . #include "i2c.h" #include "soundserver.h" #include -#include /** AWAC registers offsets. */ enum { diff --git a/devices/dbdma.cpp b/devices/dbdma.cpp index bfd1b6c..a654f26 100644 --- a/devices/dbdma.cpp +++ b/devices/dbdma.cpp @@ -26,7 +26,7 @@ along with this program. If not, see . #include "endianswap.h" #include #include -#include +#include void DMAChannel::get_next_cmd(uint32_t cmd_addr, DMACmd* p_cmd) { /* load DMACmd from physical memory */ diff --git a/devices/displayid.cpp b/devices/displayid.cpp index 99a5898..e7c02d0 100644 --- a/devices/displayid.cpp +++ b/devices/displayid.cpp @@ -20,7 +20,7 @@ along with this program. If not, see . */ #include "displayid.h" -#include +#include #include "SDL.h" DisplayID::DisplayID() { diff --git a/devices/heathrow.cpp b/devices/heathrow.cpp index bbb28a9..8398960 100644 --- a/devices/heathrow.cpp +++ b/devices/heathrow.cpp @@ -26,7 +26,7 @@ along with this program. If not, see . #include "viacuda.h" #include #include -#include +#include #include /** Heathrow Mac I/O device emulation. diff --git a/devices/i2c.h b/devices/i2c.h index 7320d7c..50a2b67 100644 --- a/devices/i2c.h +++ b/devices/i2c.h @@ -30,7 +30,7 @@ along with this program. If not, see . #include #include #include -#include +#include /** Base class for I2C devices */ class I2CDevice { diff --git a/devices/mpc106.cpp b/devices/mpc106.cpp index 5efdfc3..41e2281 100644 --- a/devices/mpc106.cpp +++ b/devices/mpc106.cpp @@ -27,7 +27,7 @@ along with this program. If not, see . #include #include #include -#include +#include #include "hwcomponent.h" #include "memctrlbase.h" diff --git a/devices/nvram.cpp b/devices/nvram.cpp index 9829304..cd88e9a 100644 --- a/devices/nvram.cpp +++ b/devices/nvram.cpp @@ -24,7 +24,7 @@ along with this program. If not, see . #include #include #include -#include +#include /** @file Non-volatile RAM implementation. */ diff --git a/devices/soundserver.cpp b/devices/soundserver.cpp index 106da46..fb58c2c 100644 --- a/devices/soundserver.cpp +++ b/devices/soundserver.cpp @@ -21,7 +21,7 @@ along with this program. If not, see . #include "soundserver.h" //#include -#include +#include #include #ifdef _WIN32 #include diff --git a/devices/spdram.h b/devices/spdram.h index be49849..dacb84a 100644 --- a/devices/spdram.h +++ b/devices/spdram.h @@ -52,7 +52,7 @@ along with this program. If not, see . #include #include #include -#include +#include enum RAMType : int { SDRAM = 4 }; diff --git a/devices/viacuda.cpp b/devices/viacuda.cpp index 8a2f2ef..13d329e 100644 --- a/devices/viacuda.cpp +++ b/devices/viacuda.cpp @@ -27,7 +27,7 @@ along with this program. If not, see . #include "viacuda.h" #include "adb.h" #include -#include +#include using namespace std; diff --git a/execution/CMakeLists.txt b/execution/CMakeLists.txt index 7e5ac0d..f3aca83 100644 --- a/execution/CMakeLists.txt +++ b/execution/CMakeLists.txt @@ -1,4 +1,5 @@ -include_directories("${PROJECT_SOURCE_DIR}") +include_directories("${PROJECT_SOURCE_DIR}" + "${PROJECT_SOURCE_DIR}/thirdparty/loguru/") file(GLOB SOURCES "${CMAKE_CURRENT_SOURCE_DIR}/*.cpp") diff --git a/execution/interpreter_loop.cpp b/execution/interpreter_loop.cpp index 8b70ed2..26e4433 100644 --- a/execution/interpreter_loop.cpp +++ b/execution/interpreter_loop.cpp @@ -24,7 +24,7 @@ along with this program. If not, see . #include #include #include -#include +#include #include std::chrono::high_resolution_clock::time_point global; // global timer @@ -108,4 +108,4 @@ void interpreter_main_loop() { interpreter_update_counters(); } -} \ No newline at end of file +} diff --git a/machines/CMakeLists.txt b/machines/CMakeLists.txt index c72473c..ed697c6 100644 --- a/machines/CMakeLists.txt +++ b/machines/CMakeLists.txt @@ -1,6 +1,7 @@ set(CMAKE_CXX_STANDARD 11) -include_directories("${PROJECT_SOURCE_DIR}") +include_directories("${PROJECT_SOURCE_DIR}" + "${PROJECT_SOURCE_DIR}/thirdparty/loguru/") file(GLOB SOURCES "${CMAKE_CURRENT_SOURCE_DIR}/*.cpp") diff --git a/machines/machinebase.cpp b/machines/machinebase.cpp index f992608..3c4b821 100644 --- a/machines/machinebase.cpp +++ b/machines/machinebase.cpp @@ -3,7 +3,7 @@ #include #include #include -#include +#include std::unique_ptr gMachineObj = 0; diff --git a/machines/machinefactory.cpp b/machines/machinefactory.cpp index 743fed8..54a7c46 100644 --- a/machines/machinefactory.cpp +++ b/machines/machinefactory.cpp @@ -37,7 +37,7 @@ along with this program. If not, see . #include #include #include -#include +#include using namespace std; diff --git a/machines/machinegossamer.cpp b/machines/machinegossamer.cpp index 4a3062a..92125e6 100644 --- a/machines/machinegossamer.cpp +++ b/machines/machinegossamer.cpp @@ -34,7 +34,7 @@ along with this program. If not, see . #include "devices/viacuda.h" #include "machinebase.h" #include "machineproperties.h" -#include +#include static void setup_ram_slot(std::string name, int i2c_addr, int capacity_megs) { diff --git a/machines/machineproperties.h b/machines/machineproperties.h index 3bcf7be..884e9ce 100644 --- a/machines/machineproperties.h +++ b/machines/machineproperties.h @@ -1,11 +1,11 @@ #include "endianswap.h" -#include +#include #include #include #include #include #include -#include +#include #include #include #include diff --git a/main.cpp b/main.cpp index 328cfc9..8aa3706 100644 --- a/main.cpp +++ b/main.cpp @@ -35,9 +35,9 @@ along with this program. If not, see . #include #include #include -#include -#include -#include +#include +#include +#include using namespace std; diff --git a/memaccess.h b/memaccess.h index 8f25d12..6fd0260 100644 --- a/memaccess.h +++ b/memaccess.h @@ -7,7 +7,7 @@ #include "endianswap.h" #include -#include +#include /* read an aligned big-endian WORD (16bit) */ #define READ_WORD_BE_A(addr) (BYTESWAP_16(*((uint16_t*)((addr))))) From de8d6487f9f384e330f5ee3b8c81138b251cb779 Mon Sep 17 00:00:00 2001 From: Maxim Poliakovski Date: Fri, 17 Sep 2021 13:27:49 +0200 Subject: [PATCH 7/7] Add forgotten include path for CLI11. --- CMakeLists.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/CMakeLists.txt b/CMakeLists.txt index dbe08b9..bee6e1f 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -84,6 +84,7 @@ include_directories("${PROJECT_SOURCE_DIR}" "${PROJECT_SOURCE_DIR}/devices" "${PROJECT_SOURCE_DIR}/debugger" "${PROJECT_SOURCE_DIR}/utils" "${PROJECT_SOURCE_DIR}/thirdparty/loguru/" + "${PROJECT_SOURCE_DIR}/thirdparty/CLI11/" # ${SDL2_INCLUDE_DIRS}) "${PROJECT_SOURCE_DIR}/thirdparty/SDL2/") # "${PROJECT_SOURCE_DIR}/thirdparty/cubeb/include")