mirror of
https://github.com/dingusdev/dingusppc.git
synced 2025-02-22 13:29:49 +00:00
Rename ppc_effective_address to ea.
This commit is contained in:
parent
047515d813
commit
e1acf5d160
@ -200,7 +200,7 @@ void dppc_interpreter::power_dozi() {
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template <field_rc rec>
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void dppc_interpreter::power_lscbx() {
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ppc_grab_regsdab(ppc_cur_instruction);
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uint32_t ppc_effective_address = ppc_result_b + (reg_a ? ppc_result_a : 0);
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uint32_t ea = ppc_result_b + (reg_a ? ppc_result_a : 0);
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uint32_t bytes_to_load = (ppc_state.spr[SPR::XER] & 0x7F);
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uint32_t bytes_remaining = bytes_to_load;
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@ -212,7 +212,7 @@ void dppc_interpreter::power_lscbx() {
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uint8_t shift_amount = 24;
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while (bytes_remaining > 0) {
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uint8_t return_value = mmu_read_vmem<uint8_t>(ppc_effective_address);
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uint8_t return_value = mmu_read_vmem<uint8_t>(ea);
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ppc_result_d |= return_value << shift_amount;
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if (!shift_amount) {
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@ -225,7 +225,7 @@ void dppc_interpreter::power_lscbx() {
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shift_amount -= 8;
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}
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ppc_effective_address++;
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ea++;
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bytes_remaining--;
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if (return_value == matching_byte) {
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@ -106,7 +106,7 @@ inline static void snan_double_check(int reg_a, int reg_b) {
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inline static bool check_qnan(int check_reg) {
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uint64_t check_int = ppc_state.fpr[check_reg].int64_r;
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return (((check_int & (0x7FFULL << 52)) == (0x7FFULL << 52)) &&
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((check_int & ~(0xFFFULL << 52)) == 0ULL) &&
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((check_int & ~(0xFFFULL << 52)) == 0ULL) &&
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((check_int & (0x1ULL << 51)) == (0x1ULL << 51)));
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}
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@ -136,7 +136,7 @@ static void ppc_update_vx() {
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}
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static void ppc_update_fex() {
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uint32_t fpscr_check = (((ppc_state.fpscr >> 25) & 0x1F) &
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uint32_t fpscr_check = (((ppc_state.fpscr >> 25) & 0x1F) &
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((ppc_state.fpscr >> 3) & 0x1F));
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if (fpscr_check)
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@ -664,20 +664,20 @@ template void dppc_interpreter::ppc_fctiwz<RC1>();
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void dppc_interpreter::ppc_lfs() {
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ppc_grab_regsfpdia(ppc_cur_instruction);
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uint32_t ppc_effective_address = int32_t(int16_t(ppc_cur_instruction));
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ppc_effective_address += (reg_a) ? val_reg_a : 0;
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uint32_t result = mmu_read_vmem<uint32_t>(ppc_effective_address);
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uint32_t ea = int32_t(int16_t(ppc_cur_instruction));
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ea += (reg_a) ? val_reg_a : 0;
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uint32_t result = mmu_read_vmem<uint32_t>(ea);
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ppc_state.fpr[reg_d].dbl64_r = *(float*)(&result);
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}
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void dppc_interpreter::ppc_lfsu() {
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ppc_grab_regsfpdia(ppc_cur_instruction);
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if (reg_a) {
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uint32_t ppc_effective_address = int32_t(int16_t(ppc_cur_instruction));
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ppc_effective_address += (reg_a) ? val_reg_a : 0;
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uint32_t result = mmu_read_vmem<uint32_t>(ppc_effective_address);
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uint32_t ea = int32_t(int16_t(ppc_cur_instruction));
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ea += (reg_a) ? val_reg_a : 0;
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uint32_t result = mmu_read_vmem<uint32_t>(ea);
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ppc_state.fpr[reg_d].dbl64_r = *(float*)(&result);
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ppc_state.gpr[reg_a] = ppc_effective_address;
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ppc_state.gpr[reg_a] = ea;
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} else {
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ppc_exception_handler(Except_Type::EXC_PROGRAM, Exc_Cause::ILLEGAL_OP);
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}
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@ -685,18 +685,18 @@ void dppc_interpreter::ppc_lfsu() {
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void dppc_interpreter::ppc_lfsx() {
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ppc_grab_regsfpdiab(ppc_cur_instruction);
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uint32_t ppc_effective_address = val_reg_b + (reg_a ? val_reg_a : 0);
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uint32_t result = mmu_read_vmem<uint32_t>(ppc_effective_address);
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uint32_t ea = val_reg_b + (reg_a ? val_reg_a : 0);
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uint32_t result = mmu_read_vmem<uint32_t>(ea);
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ppc_state.fpr[reg_d].dbl64_r = *(float*)(&result);
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}
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void dppc_interpreter::ppc_lfsux() {
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ppc_grab_regsfpdiab(ppc_cur_instruction);
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if (reg_a) {
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uint32_t ppc_effective_address = val_reg_a + val_reg_b;
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uint32_t result = mmu_read_vmem<uint32_t>(ppc_effective_address);
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uint32_t ea = val_reg_a + val_reg_b;
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uint32_t result = mmu_read_vmem<uint32_t>(ea);
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ppc_state.fpr[reg_d].dbl64_r = *(float*)(&result);
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ppc_state.gpr[reg_a] = ppc_effective_address;
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ppc_state.gpr[reg_a] = ea;
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} else {
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ppc_exception_handler(Except_Type::EXC_PROGRAM, Exc_Cause::ILLEGAL_OP);
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}
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@ -704,20 +704,20 @@ void dppc_interpreter::ppc_lfsux() {
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void dppc_interpreter::ppc_lfd() {
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ppc_grab_regsfpdia(ppc_cur_instruction);
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uint32_t ppc_effective_address = int32_t(int16_t(ppc_cur_instruction));
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ppc_effective_address += (reg_a) ? val_reg_a : 0;
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uint64_t ppc_result64_d = mmu_read_vmem<uint64_t>(ppc_effective_address);
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uint32_t ea = int32_t(int16_t(ppc_cur_instruction));
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ea += (reg_a) ? val_reg_a : 0;
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uint64_t ppc_result64_d = mmu_read_vmem<uint64_t>(ea);
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ppc_store_dfpresult_int(reg_d, ppc_result64_d);
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}
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void dppc_interpreter::ppc_lfdu() {
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ppc_grab_regsfpdia(ppc_cur_instruction);
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if (reg_a != 0) {
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uint32_t ppc_effective_address = int32_t(int16_t(ppc_cur_instruction));
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ppc_effective_address += val_reg_a;
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uint64_t ppc_result64_d = mmu_read_vmem<uint64_t>(ppc_effective_address);
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uint32_t ea = int32_t(int16_t(ppc_cur_instruction));
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ea += val_reg_a;
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uint64_t ppc_result64_d = mmu_read_vmem<uint64_t>(ea);
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ppc_store_dfpresult_int(reg_d, ppc_result64_d);
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ppc_state.gpr[reg_a] = ppc_effective_address;
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ppc_state.gpr[reg_a] = ea;
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} else {
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ppc_exception_handler(Except_Type::EXC_PROGRAM, Exc_Cause::ILLEGAL_OP);
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}
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@ -725,18 +725,18 @@ void dppc_interpreter::ppc_lfdu() {
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void dppc_interpreter::ppc_lfdx() {
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ppc_grab_regsfpdiab(ppc_cur_instruction);
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uint32_t ppc_effective_address = val_reg_b + (reg_a ? val_reg_a : 0);
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uint64_t ppc_result64_d = mmu_read_vmem<uint64_t>(ppc_effective_address);
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uint32_t ea = val_reg_b + (reg_a ? val_reg_a : 0);
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uint64_t ppc_result64_d = mmu_read_vmem<uint64_t>(ea);
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ppc_store_dfpresult_int(reg_d, ppc_result64_d);
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}
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void dppc_interpreter::ppc_lfdux() {
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ppc_grab_regsfpdiab(ppc_cur_instruction);
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if (reg_a) {
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uint32_t ppc_effective_address = val_reg_a + val_reg_b;
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uint64_t ppc_result64_d = mmu_read_vmem<uint64_t>(ppc_effective_address);
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uint32_t ea = val_reg_a + val_reg_b;
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uint64_t ppc_result64_d = mmu_read_vmem<uint64_t>(ea);
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ppc_store_dfpresult_int(reg_d, ppc_result64_d);
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ppc_state.gpr[reg_a] = ppc_effective_address;
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ppc_state.gpr[reg_a] = ea;
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} else {
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ppc_exception_handler(Except_Type::EXC_PROGRAM, Exc_Cause::ILLEGAL_OP);
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}
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@ -744,20 +744,20 @@ void dppc_interpreter::ppc_lfdux() {
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void dppc_interpreter::ppc_stfs() {
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ppc_grab_regsfpsia(ppc_cur_instruction);
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uint32_t ppc_effective_address = int32_t(int16_t(ppc_cur_instruction));
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ppc_effective_address += (reg_a) ? val_reg_a : 0;
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uint32_t ea = int32_t(int16_t(ppc_cur_instruction));
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ea += (reg_a) ? val_reg_a : 0;
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float result = ppc_state.fpr[reg_s].dbl64_r;
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mmu_write_vmem<uint32_t>(ppc_effective_address, *(uint32_t*)(&result));
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mmu_write_vmem<uint32_t>(ea, *(uint32_t*)(&result));
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}
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void dppc_interpreter::ppc_stfsu() {
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ppc_grab_regsfpsia(ppc_cur_instruction);
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if (reg_a != 0) {
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uint32_t ppc_effective_address = int32_t(int16_t(ppc_cur_instruction));
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ppc_effective_address += val_reg_a;
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uint32_t ea = int32_t(int16_t(ppc_cur_instruction));
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ea += val_reg_a;
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float result = ppc_state.fpr[reg_s].dbl64_r;
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mmu_write_vmem<uint32_t>(ppc_effective_address, *(uint32_t*)(&result));
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ppc_state.gpr[reg_a] = ppc_effective_address;
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mmu_write_vmem<uint32_t>(ea, *(uint32_t*)(&result));
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ppc_state.gpr[reg_a] = ea;
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} else {
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ppc_exception_handler(Except_Type::EXC_PROGRAM, Exc_Cause::ILLEGAL_OP);
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}
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@ -765,18 +765,18 @@ void dppc_interpreter::ppc_stfsu() {
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void dppc_interpreter::ppc_stfsx() {
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ppc_grab_regsfpsiab(ppc_cur_instruction);
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uint32_t ppc_effective_address = val_reg_b + (reg_a ? val_reg_a : 0);
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uint32_t ea = val_reg_b + (reg_a ? val_reg_a : 0);
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float result = ppc_state.fpr[reg_s].dbl64_r;
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mmu_write_vmem<uint32_t>(ppc_effective_address, *(uint32_t*)(&result));
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mmu_write_vmem<uint32_t>(ea, *(uint32_t*)(&result));
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}
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void dppc_interpreter::ppc_stfsux() {
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ppc_grab_regsfpsiab(ppc_cur_instruction);
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if (reg_a) {
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uint32_t ppc_effective_address = val_reg_a + val_reg_b;
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uint32_t ea = val_reg_a + val_reg_b;
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float result = ppc_state.fpr[reg_s].dbl64_r;
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mmu_write_vmem<uint32_t>(ppc_effective_address, *(uint32_t*)(&result));
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ppc_state.gpr[reg_a] = ppc_effective_address;
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mmu_write_vmem<uint32_t>(ea, *(uint32_t*)(&result));
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ppc_state.gpr[reg_a] = ea;
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} else {
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ppc_exception_handler(Except_Type::EXC_PROGRAM, Exc_Cause::ILLEGAL_OP);
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}
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@ -784,18 +784,18 @@ void dppc_interpreter::ppc_stfsux() {
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void dppc_interpreter::ppc_stfd() {
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ppc_grab_regsfpsia(ppc_cur_instruction);
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uint32_t ppc_effective_address = int32_t(int16_t(ppc_cur_instruction));
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ppc_effective_address += reg_a ? val_reg_a : 0;
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mmu_write_vmem<uint64_t>(ppc_effective_address, ppc_state.fpr[reg_s].int64_r);
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uint32_t ea = int32_t(int16_t(ppc_cur_instruction));
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ea += reg_a ? val_reg_a : 0;
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mmu_write_vmem<uint64_t>(ea, ppc_state.fpr[reg_s].int64_r);
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}
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void dppc_interpreter::ppc_stfdu() {
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ppc_grab_regsfpsia(ppc_cur_instruction);
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if (reg_a != 0) {
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uint32_t ppc_effective_address = int32_t(int16_t(ppc_cur_instruction));
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ppc_effective_address += val_reg_a;
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mmu_write_vmem<uint64_t>(ppc_effective_address, ppc_state.fpr[reg_s].int64_r);
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ppc_state.gpr[reg_a] = ppc_effective_address;
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uint32_t ea = int32_t(int16_t(ppc_cur_instruction));
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ea += val_reg_a;
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mmu_write_vmem<uint64_t>(ea, ppc_state.fpr[reg_s].int64_r);
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ppc_state.gpr[reg_a] = ea;
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} else {
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ppc_exception_handler(Except_Type::EXC_PROGRAM, Exc_Cause::ILLEGAL_OP);
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}
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@ -803,16 +803,16 @@ void dppc_interpreter::ppc_stfdu() {
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void dppc_interpreter::ppc_stfdx() {
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ppc_grab_regsfpsiab(ppc_cur_instruction);
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uint32_t ppc_effective_address = val_reg_b + (reg_a ? val_reg_a : 0);
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mmu_write_vmem<uint64_t>(ppc_effective_address, ppc_state.fpr[reg_s].int64_r);
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uint32_t ea = val_reg_b + (reg_a ? val_reg_a : 0);
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mmu_write_vmem<uint64_t>(ea, ppc_state.fpr[reg_s].int64_r);
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}
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void dppc_interpreter::ppc_stfdux() {
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ppc_grab_regsfpsiab(ppc_cur_instruction);
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if (reg_a != 0) {
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uint32_t ppc_effective_address = val_reg_a + val_reg_b;
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mmu_write_vmem<uint64_t>(ppc_effective_address, ppc_state.fpr[reg_s].int64_r);
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ppc_state.gpr[reg_a] = ppc_effective_address;
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uint32_t ea = val_reg_a + val_reg_b;
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mmu_write_vmem<uint64_t>(ea, ppc_state.fpr[reg_s].int64_r);
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ppc_state.gpr[reg_a] = ea;
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} else {
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ppc_exception_handler(Except_Type::EXC_PROGRAM, Exc_Cause::ILLEGAL_OP);
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}
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@ -820,8 +820,8 @@ void dppc_interpreter::ppc_stfdux() {
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void dppc_interpreter::ppc_stfiwx() {
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ppc_grab_regsfpsiab(ppc_cur_instruction);
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uint32_t ppc_effective_address = val_reg_b + (reg_a ? val_reg_a : 0);
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mmu_write_vmem<uint32_t>(ppc_effective_address, uint32_t(ppc_state.fpr[reg_s].int64_r));
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uint32_t ea = val_reg_b + (reg_a ? val_reg_a : 0);
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mmu_write_vmem<uint32_t>(ea, uint32_t(ppc_state.fpr[reg_s].int64_r));
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}
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// Floating Point Register Transfer
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@ -962,7 +962,7 @@ void dppc_interpreter::ppc_fcmpo() {
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if (std::isnan(db_test_a) || std::isnan(db_test_b)) {
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cmp_c |= CRx_bit::CR_SO;
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ppc_state.fpscr |= FX | VX;
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ppc_state.fpscr |= FX | VX;
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if (check_snan(reg_a) || check_snan(reg_b)) {
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ppc_state.fpscr |= VXSNAN;
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}
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@ -1472,16 +1472,16 @@ void dppc_interpreter::ppc_dcbtst() {
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void dppc_interpreter::ppc_dcbz() {
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ppc_grab_regsab(ppc_cur_instruction);
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uint32_t ppc_effective_address = ppc_result_b + (reg_a ? ppc_result_a : 0);
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uint32_t ea = ppc_result_b + (reg_a ? ppc_result_a : 0);
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ppc_effective_address &= 0xFFFFFFE0UL; // align EA on a 32-byte boundary
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ea &= 0xFFFFFFE0UL; // align EA on a 32-byte boundary
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// the following is not especially efficient but necessary
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// to make BlockZero under Mac OS 8.x and later to work
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mmu_write_vmem<uint64_t>(ppc_effective_address + 0, 0);
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mmu_write_vmem<uint64_t>(ppc_effective_address + 8, 0);
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mmu_write_vmem<uint64_t>(ppc_effective_address + 16, 0);
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mmu_write_vmem<uint64_t>(ppc_effective_address + 24, 0);
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mmu_write_vmem<uint64_t>(ea + 0, 0);
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mmu_write_vmem<uint64_t>(ea + 8, 0);
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mmu_write_vmem<uint64_t>(ea + 16, 0);
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mmu_write_vmem<uint64_t>(ea + 24, 0);
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}
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@ -1493,9 +1493,9 @@ void dppc_interpreter::ppc_st() {
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num_int_stores++;
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#endif
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ppc_grab_regssa(ppc_cur_instruction);
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uint32_t ppc_effective_address = int32_t(int16_t(ppc_cur_instruction));
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ppc_effective_address += reg_a ? ppc_result_a : 0;
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mmu_write_vmem<T>(ppc_effective_address, ppc_result_d);
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uint32_t ea = int32_t(int16_t(ppc_cur_instruction));
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ea += reg_a ? ppc_result_a : 0;
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mmu_write_vmem<T>(ea, ppc_result_d);
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}
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template void dppc_interpreter::ppc_st<uint8_t>();
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@ -1508,8 +1508,8 @@ void dppc_interpreter::ppc_stx() {
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num_int_stores++;
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#endif
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ppc_grab_regssab(ppc_cur_instruction);
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uint32_t ppc_effective_address = ppc_result_b + (reg_a ? ppc_result_a : 0);
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mmu_write_vmem<T>(ppc_effective_address, ppc_result_d);
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uint32_t ea = ppc_result_b + (reg_a ? ppc_result_a : 0);
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mmu_write_vmem<T>(ea, ppc_result_d);
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}
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|
||||
template void dppc_interpreter::ppc_stx<uint8_t>();
|
||||
@ -1523,10 +1523,10 @@ void dppc_interpreter::ppc_stu() {
|
||||
#endif
|
||||
ppc_grab_regssa(ppc_cur_instruction);
|
||||
if (reg_a != 0) {
|
||||
uint32_t ppc_effective_address = int32_t(int16_t(ppc_cur_instruction));
|
||||
ppc_effective_address += ppc_result_a;
|
||||
mmu_write_vmem<T>(ppc_effective_address, ppc_result_d);
|
||||
ppc_state.gpr[reg_a] = ppc_effective_address;
|
||||
uint32_t ea = int32_t(int16_t(ppc_cur_instruction));
|
||||
ea += ppc_result_a;
|
||||
mmu_write_vmem<T>(ea, ppc_result_d);
|
||||
ppc_state.gpr[reg_a] = ea;
|
||||
} else {
|
||||
ppc_exception_handler(Except_Type::EXC_PROGRAM, Exc_Cause::ILLEGAL_OP);
|
||||
}
|
||||
@ -1543,9 +1543,9 @@ void dppc_interpreter::ppc_stux() {
|
||||
#endif
|
||||
ppc_grab_regssab(ppc_cur_instruction);
|
||||
if (reg_a != 0) {
|
||||
uint32_t ppc_effective_address = ppc_result_a + ppc_result_b;
|
||||
mmu_write_vmem<T>(ppc_effective_address, ppc_result_d);
|
||||
ppc_state.gpr[reg_a] = ppc_effective_address;
|
||||
uint32_t ea = ppc_result_a + ppc_result_b;
|
||||
mmu_write_vmem<T>(ea, ppc_result_d);
|
||||
ppc_state.gpr[reg_a] = ea;
|
||||
} else {
|
||||
ppc_exception_handler(Except_Type::EXC_PROGRAM, Exc_Cause::ILLEGAL_OP);
|
||||
}
|
||||
@ -1560,9 +1560,9 @@ void dppc_interpreter::ppc_sthbrx() {
|
||||
num_int_stores++;
|
||||
#endif
|
||||
ppc_grab_regssab(ppc_cur_instruction);
|
||||
uint32_t ppc_effective_address = ppc_result_b + (reg_a ? ppc_result_a : 0);
|
||||
uint32_t ea = ppc_result_b + (reg_a ? ppc_result_a : 0);
|
||||
ppc_result_d = uint32_t(BYTESWAP_16(uint16_t(ppc_result_d)));
|
||||
mmu_write_vmem<uint16_t>(ppc_effective_address, ppc_result_d);
|
||||
mmu_write_vmem<uint16_t>(ea, ppc_result_d);
|
||||
}
|
||||
|
||||
void dppc_interpreter::ppc_stwcx() {
|
||||
@ -1570,11 +1570,11 @@ void dppc_interpreter::ppc_stwcx() {
|
||||
num_int_stores++;
|
||||
#endif
|
||||
ppc_grab_regssab(ppc_cur_instruction);
|
||||
uint32_t ppc_effective_address = (reg_a == 0) ? ppc_result_b : (ppc_result_a + ppc_result_b);
|
||||
uint32_t ea = (reg_a == 0) ? ppc_result_b : (ppc_result_a + ppc_result_b);
|
||||
ppc_state.cr &= 0x0FFFFFFFUL; // clear CR0
|
||||
ppc_state.cr |= (ppc_state.spr[SPR::XER] & XER::SO) >> 3; // copy XER[SO] to CR0[SO]
|
||||
if (ppc_state.reserve) {
|
||||
mmu_write_vmem<uint32_t>(ppc_effective_address, ppc_result_d);
|
||||
mmu_write_vmem<uint32_t>(ea, ppc_result_d);
|
||||
ppc_state.reserve = false;
|
||||
ppc_state.cr |= 0x20000000UL; // set CR0[EQ]
|
||||
}
|
||||
@ -1585,9 +1585,9 @@ void dppc_interpreter::ppc_stwbrx() {
|
||||
num_int_stores++;
|
||||
#endif
|
||||
ppc_grab_regssab(ppc_cur_instruction);
|
||||
uint32_t ppc_effective_address = ppc_result_b + (reg_a ? ppc_result_a : 0);
|
||||
uint32_t ea = ppc_result_b + (reg_a ? ppc_result_a : 0);
|
||||
ppc_result_d = BYTESWAP_32(ppc_result_d);
|
||||
mmu_write_vmem<uint32_t>(ppc_effective_address, ppc_result_d);
|
||||
mmu_write_vmem<uint32_t>(ea, ppc_result_d);
|
||||
}
|
||||
|
||||
void dppc_interpreter::ppc_stmw() {
|
||||
@ -1595,17 +1595,17 @@ void dppc_interpreter::ppc_stmw() {
|
||||
num_int_stores++;
|
||||
#endif
|
||||
ppc_grab_regssa_stmw(ppc_cur_instruction);
|
||||
uint32_t ppc_effective_address = int32_t(int16_t(ppc_cur_instruction));
|
||||
ppc_effective_address += reg_a ? ppc_result_a : 0;
|
||||
uint32_t ea = int32_t(int16_t(ppc_cur_instruction));
|
||||
ea += reg_a ? ppc_result_a : 0;
|
||||
|
||||
/* what should we do if EA is unaligned? */
|
||||
if (ppc_effective_address & 3) {
|
||||
ppc_alignment_exception(ppc_effective_address);
|
||||
if (ea & 3) {
|
||||
ppc_alignment_exception(ea);
|
||||
}
|
||||
|
||||
for (; reg_s <= 31; reg_s++) {
|
||||
mmu_write_vmem<uint32_t>(ppc_effective_address, ppc_state.gpr[reg_s]);
|
||||
ppc_effective_address += 4;
|
||||
mmu_write_vmem<uint32_t>(ea, ppc_state.gpr[reg_s]);
|
||||
ea += 4;
|
||||
}
|
||||
}
|
||||
|
||||
@ -1615,9 +1615,9 @@ void dppc_interpreter::ppc_lz() {
|
||||
num_int_loads++;
|
||||
#endif
|
||||
ppc_grab_regsda(ppc_cur_instruction);
|
||||
uint32_t ppc_effective_address = int32_t(int16_t(ppc_cur_instruction));
|
||||
ppc_effective_address += reg_a ? ppc_result_a : 0;
|
||||
uint32_t ppc_result_d = mmu_read_vmem<T>(ppc_effective_address);
|
||||
uint32_t ea = int32_t(int16_t(ppc_cur_instruction));
|
||||
ea += reg_a ? ppc_result_a : 0;
|
||||
uint32_t ppc_result_d = mmu_read_vmem<T>(ea);
|
||||
ppc_store_iresult_reg(reg_d, ppc_result_d);
|
||||
}
|
||||
|
||||
@ -1631,11 +1631,11 @@ void dppc_interpreter::ppc_lzu() {
|
||||
num_int_loads++;
|
||||
#endif
|
||||
ppc_grab_regsda(ppc_cur_instruction);
|
||||
uint32_t ppc_effective_address = int32_t(int16_t(ppc_cur_instruction));
|
||||
uint32_t ea = int32_t(int16_t(ppc_cur_instruction));
|
||||
if ((reg_a != reg_d) && reg_a != 0) {
|
||||
ppc_effective_address += ppc_result_a;
|
||||
uint32_t ppc_result_d = mmu_read_vmem<T>(ppc_effective_address);
|
||||
uint32_t ppc_result_a = ppc_effective_address;
|
||||
ea += ppc_result_a;
|
||||
uint32_t ppc_result_d = mmu_read_vmem<T>(ea);
|
||||
uint32_t ppc_result_a = ea;
|
||||
ppc_store_iresult_reg(reg_d, ppc_result_d);
|
||||
ppc_store_iresult_reg(reg_a, ppc_result_a);
|
||||
} else {
|
||||
@ -1653,8 +1653,8 @@ void dppc_interpreter::ppc_lzx() {
|
||||
num_int_loads++;
|
||||
#endif
|
||||
ppc_grab_regsdab(ppc_cur_instruction);
|
||||
uint32_t ppc_effective_address = ppc_result_b + (reg_a ? ppc_result_a : 0);
|
||||
uint32_t ppc_result_d = mmu_read_vmem<T>(ppc_effective_address);
|
||||
uint32_t ea = ppc_result_b + (reg_a ? ppc_result_a : 0);
|
||||
uint32_t ppc_result_d = mmu_read_vmem<T>(ea);
|
||||
ppc_store_iresult_reg(reg_d, ppc_result_d);
|
||||
}
|
||||
|
||||
@ -1669,9 +1669,9 @@ void dppc_interpreter::ppc_lzux() {
|
||||
#endif
|
||||
ppc_grab_regsdab(ppc_cur_instruction);
|
||||
if ((reg_a != reg_d) && reg_a != 0) {
|
||||
uint32_t ppc_effective_address = ppc_result_a + ppc_result_b;
|
||||
uint32_t ppc_result_d = mmu_read_vmem<T>(ppc_effective_address);
|
||||
ppc_result_a = ppc_effective_address;
|
||||
uint32_t ea = ppc_result_a + ppc_result_b;
|
||||
uint32_t ppc_result_d = mmu_read_vmem<T>(ea);
|
||||
ppc_result_a = ea;
|
||||
ppc_store_iresult_reg(reg_d, ppc_result_d);
|
||||
ppc_store_iresult_reg(reg_a, ppc_result_a);
|
||||
} else {
|
||||
@ -1688,9 +1688,9 @@ void dppc_interpreter::ppc_lha() {
|
||||
num_int_loads++;
|
||||
#endif
|
||||
ppc_grab_regsda(ppc_cur_instruction);
|
||||
uint32_t ppc_effective_address = int32_t(int16_t(ppc_cur_instruction));
|
||||
ppc_effective_address += (reg_a ? ppc_result_a : 0);
|
||||
int16_t val = mmu_read_vmem<uint16_t>(ppc_effective_address);
|
||||
uint32_t ea = int32_t(int16_t(ppc_cur_instruction));
|
||||
ea += (reg_a ? ppc_result_a : 0);
|
||||
int16_t val = mmu_read_vmem<uint16_t>(ea);
|
||||
ppc_store_iresult_reg(reg_d, int32_t(val));
|
||||
}
|
||||
|
||||
@ -1700,11 +1700,11 @@ void dppc_interpreter::ppc_lhau() {
|
||||
#endif
|
||||
ppc_grab_regsda(ppc_cur_instruction);
|
||||
if ((reg_a != reg_d) && reg_a != 0) {
|
||||
uint32_t ppc_effective_address = int32_t(int16_t(ppc_cur_instruction));
|
||||
ppc_effective_address += ppc_result_a;
|
||||
int16_t val = mmu_read_vmem<uint16_t>(ppc_effective_address);
|
||||
uint32_t ea = int32_t(int16_t(ppc_cur_instruction));
|
||||
ea += ppc_result_a;
|
||||
int16_t val = mmu_read_vmem<uint16_t>(ea);
|
||||
ppc_store_iresult_reg(reg_d, int32_t(val));
|
||||
uint32_t ppc_result_a = ppc_effective_address;
|
||||
uint32_t ppc_result_a = ea;
|
||||
ppc_store_iresult_reg(reg_a, ppc_result_a);
|
||||
} else {
|
||||
ppc_exception_handler(Except_Type::EXC_PROGRAM, Exc_Cause::ILLEGAL_OP);
|
||||
@ -1717,10 +1717,10 @@ void dppc_interpreter::ppc_lhaux() {
|
||||
#endif
|
||||
ppc_grab_regsdab(ppc_cur_instruction);
|
||||
if ((reg_a != reg_d) && reg_a != 0) {
|
||||
uint32_t ppc_effective_address = ppc_result_a + ppc_result_b;
|
||||
int16_t val = mmu_read_vmem<uint16_t>(ppc_effective_address);
|
||||
uint32_t ea = ppc_result_a + ppc_result_b;
|
||||
int16_t val = mmu_read_vmem<uint16_t>(ea);
|
||||
ppc_store_iresult_reg(reg_d, int32_t(val));
|
||||
uint32_t ppc_result_a = ppc_effective_address;
|
||||
uint32_t ppc_result_a = ea;
|
||||
ppc_store_iresult_reg(reg_a, ppc_result_a);
|
||||
}
|
||||
else {
|
||||
@ -1733,8 +1733,8 @@ void dppc_interpreter::ppc_lhax() {
|
||||
num_int_loads++;
|
||||
#endif
|
||||
ppc_grab_regsdab(ppc_cur_instruction);
|
||||
uint32_t ppc_effective_address = ppc_result_b + (reg_a ? ppc_result_a : 0);
|
||||
int16_t val = mmu_read_vmem<uint16_t>(ppc_effective_address);
|
||||
uint32_t ea = ppc_result_b + (reg_a ? ppc_result_a : 0);
|
||||
int16_t val = mmu_read_vmem<uint16_t>(ea);
|
||||
ppc_store_iresult_reg(reg_d, int32_t(val));
|
||||
}
|
||||
|
||||
@ -1743,8 +1743,8 @@ void dppc_interpreter::ppc_lhbrx() {
|
||||
num_int_loads++;
|
||||
#endif
|
||||
ppc_grab_regsdab(ppc_cur_instruction);
|
||||
uint32_t ppc_effective_address = ppc_result_b + (reg_a ? ppc_result_a : 0);
|
||||
uint32_t ppc_result_d = uint32_t(BYTESWAP_16(mmu_read_vmem<uint16_t>(ppc_effective_address)));
|
||||
uint32_t ea = ppc_result_b + (reg_a ? ppc_result_a : 0);
|
||||
uint32_t ppc_result_d = uint32_t(BYTESWAP_16(mmu_read_vmem<uint16_t>(ea)));
|
||||
ppc_store_iresult_reg(reg_d, ppc_result_d);
|
||||
}
|
||||
|
||||
@ -1753,8 +1753,8 @@ void dppc_interpreter::ppc_lwbrx() {
|
||||
num_int_loads++;
|
||||
#endif
|
||||
ppc_grab_regsdab(ppc_cur_instruction);
|
||||
uint32_t ppc_effective_address = ppc_result_b + (reg_a ? ppc_result_a : 0);
|
||||
uint32_t ppc_result_d = BYTESWAP_32(mmu_read_vmem<uint32_t>(ppc_effective_address));
|
||||
uint32_t ea = ppc_result_b + (reg_a ? ppc_result_a : 0);
|
||||
uint32_t ppc_result_d = BYTESWAP_32(mmu_read_vmem<uint32_t>(ea));
|
||||
ppc_store_iresult_reg(reg_d, ppc_result_d);
|
||||
}
|
||||
|
||||
@ -1764,9 +1764,9 @@ void dppc_interpreter::ppc_lwarx() {
|
||||
#endif
|
||||
// Placeholder - Get the reservation of memory implemented!
|
||||
ppc_grab_regsdab(ppc_cur_instruction);
|
||||
uint32_t ppc_effective_address = ppc_result_b + (reg_a ? ppc_result_a : 0);
|
||||
uint32_t ea = ppc_result_b + (reg_a ? ppc_result_a : 0);
|
||||
ppc_state.reserve = true;
|
||||
uint32_t ppc_result_d = mmu_read_vmem<uint32_t>(ppc_effective_address);
|
||||
uint32_t ppc_result_d = mmu_read_vmem<uint32_t>(ea);
|
||||
ppc_store_iresult_reg(reg_d, ppc_result_d);
|
||||
}
|
||||
|
||||
@ -1775,12 +1775,12 @@ void dppc_interpreter::ppc_lmw() {
|
||||
num_int_loads++;
|
||||
#endif
|
||||
ppc_grab_regsda(ppc_cur_instruction);
|
||||
uint32_t ppc_effective_address = int32_t(int16_t(ppc_cur_instruction));
|
||||
ppc_effective_address += (reg_a ? ppc_result_a : 0);
|
||||
uint32_t ea = int32_t(int16_t(ppc_cur_instruction));
|
||||
ea += (reg_a ? ppc_result_a : 0);
|
||||
// How many words to load in memory - using a do-while for this
|
||||
do {
|
||||
ppc_state.gpr[reg_d] = mmu_read_vmem<uint32_t>(ppc_effective_address);
|
||||
ppc_effective_address += 4;
|
||||
ppc_state.gpr[reg_d] = mmu_read_vmem<uint32_t>(ea);
|
||||
ea += 4;
|
||||
reg_d++;
|
||||
} while (reg_d < 32);
|
||||
}
|
||||
@ -1790,31 +1790,31 @@ void dppc_interpreter::ppc_lswi() {
|
||||
num_int_loads++;
|
||||
#endif
|
||||
ppc_grab_regsda(ppc_cur_instruction);
|
||||
uint32_t ppc_effective_address = reg_a ? ppc_result_a : 0;
|
||||
uint32_t ea = reg_a ? ppc_result_a : 0;
|
||||
uint32_t grab_inb = (ppc_cur_instruction >> 11) & 0x1F;
|
||||
grab_inb = grab_inb ? grab_inb : 32;
|
||||
|
||||
while (grab_inb >= 4) {
|
||||
ppc_state.gpr[reg_d] = mmu_read_vmem<uint32_t>(ppc_effective_address);
|
||||
ppc_state.gpr[reg_d] = mmu_read_vmem<uint32_t>(ea);
|
||||
reg_d++;
|
||||
if (reg_d >= 32) { // wrap around through GPR0
|
||||
reg_d = 0;
|
||||
}
|
||||
ppc_effective_address += 4;
|
||||
ea += 4;
|
||||
grab_inb -= 4;
|
||||
}
|
||||
|
||||
// handle remaining bytes
|
||||
switch (grab_inb) {
|
||||
case 1:
|
||||
ppc_state.gpr[reg_d] = mmu_read_vmem<uint8_t>(ppc_effective_address) << 24;
|
||||
ppc_state.gpr[reg_d] = mmu_read_vmem<uint8_t>(ea) << 24;
|
||||
break;
|
||||
case 2:
|
||||
ppc_state.gpr[reg_d] = mmu_read_vmem<uint16_t>(ppc_effective_address) << 16;
|
||||
ppc_state.gpr[reg_d] = mmu_read_vmem<uint16_t>(ea) << 16;
|
||||
break;
|
||||
case 3:
|
||||
ppc_state.gpr[reg_d] = mmu_read_vmem<uint16_t>(ppc_effective_address) << 16;
|
||||
ppc_state.gpr[reg_d] += mmu_read_vmem<uint8_t>(ppc_effective_address + 2) << 8;
|
||||
ppc_state.gpr[reg_d] = mmu_read_vmem<uint16_t>(ea) << 16;
|
||||
ppc_state.gpr[reg_d] += mmu_read_vmem<uint8_t>(ea + 2) << 8;
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
@ -1836,7 +1836,7 @@ void dppc_interpreter::ppc_lswx() {
|
||||
}
|
||||
*/
|
||||
|
||||
uint32_t ppc_effective_address = ppc_result_b + (reg_a ? ppc_result_a : 0);
|
||||
uint32_t ea = ppc_result_b + (reg_a ? ppc_result_a : 0);
|
||||
uint32_t grab_inb = ppc_state.spr[SPR::XER] & 0x7F;
|
||||
|
||||
for (;;) {
|
||||
@ -1848,19 +1848,19 @@ void dppc_interpreter::ppc_lswx() {
|
||||
case 0:
|
||||
return;
|
||||
case 1:
|
||||
ppc_state.gpr[reg_d] = mmu_read_vmem<uint8_t>(ppc_effective_address) << 24;
|
||||
ppc_state.gpr[reg_d] = mmu_read_vmem<uint8_t>(ea) << 24;
|
||||
return;
|
||||
case 2:
|
||||
ppc_state.gpr[reg_d] = mmu_read_vmem<uint16_t>(ppc_effective_address) << 16;
|
||||
ppc_state.gpr[reg_d] = mmu_read_vmem<uint16_t>(ea) << 16;
|
||||
return;
|
||||
case 3:
|
||||
ppc_state.gpr[reg_d] = (mmu_read_vmem<uint16_t>(ppc_effective_address) << 16)
|
||||
| (mmu_read_vmem<uint8_t>(ppc_effective_address + 2) << 8);
|
||||
ppc_state.gpr[reg_d] = (mmu_read_vmem<uint16_t>(ea) << 16)
|
||||
| (mmu_read_vmem<uint8_t>(ea + 2) << 8);
|
||||
return;
|
||||
}
|
||||
ppc_state.gpr[reg_d] = mmu_read_vmem<uint32_t>(ppc_effective_address);
|
||||
ppc_state.gpr[reg_d] = mmu_read_vmem<uint32_t>(ea);
|
||||
reg_d = (reg_d + 1) & 0x1F; // wrap around through GPR0
|
||||
ppc_effective_address += 4;
|
||||
ea += 4;
|
||||
grab_inb -= 4;
|
||||
}
|
||||
}
|
||||
@ -1870,30 +1870,30 @@ void dppc_interpreter::ppc_stswi() {
|
||||
num_int_stores++;
|
||||
#endif
|
||||
ppc_grab_regssash_stswi(ppc_cur_instruction);
|
||||
uint32_t ppc_effective_address = reg_a ? ppc_result_a : 0;
|
||||
uint32_t ea = reg_a ? ppc_result_a : 0;
|
||||
uint32_t grab_inb = rot_sh ? rot_sh : 32;
|
||||
|
||||
while (grab_inb >= 4) {
|
||||
mmu_write_vmem<uint32_t>(ppc_effective_address, ppc_state.gpr[reg_s]);
|
||||
mmu_write_vmem<uint32_t>(ea, ppc_state.gpr[reg_s]);
|
||||
reg_s++;
|
||||
if (reg_s >= 32) { // wrap around through GPR0
|
||||
reg_s = 0;
|
||||
}
|
||||
ppc_effective_address += 4;
|
||||
ea += 4;
|
||||
grab_inb -= 4;
|
||||
}
|
||||
|
||||
// handle remaining bytes
|
||||
switch (grab_inb) {
|
||||
case 1:
|
||||
mmu_write_vmem<uint8_t>(ppc_effective_address, ppc_state.gpr[reg_s] >> 24);
|
||||
mmu_write_vmem<uint8_t>(ea, ppc_state.gpr[reg_s] >> 24);
|
||||
break;
|
||||
case 2:
|
||||
mmu_write_vmem<uint16_t>(ppc_effective_address, ppc_state.gpr[reg_s] >> 16);
|
||||
mmu_write_vmem<uint16_t>(ea, ppc_state.gpr[reg_s] >> 16);
|
||||
break;
|
||||
case 3:
|
||||
mmu_write_vmem<uint16_t>(ppc_effective_address, ppc_state.gpr[reg_s] >> 16);
|
||||
mmu_write_vmem<uint8_t>(ppc_effective_address + 2, (ppc_state.gpr[reg_s] >> 8) & 0xFF);
|
||||
mmu_write_vmem<uint16_t>(ea, ppc_state.gpr[reg_s] >> 16);
|
||||
mmu_write_vmem<uint8_t>(ea + 2, (ppc_state.gpr[reg_s] >> 8) & 0xFF);
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
@ -1905,30 +1905,30 @@ void dppc_interpreter::ppc_stswx() {
|
||||
num_int_stores++;
|
||||
#endif
|
||||
ppc_grab_regssab_stswx(ppc_cur_instruction);
|
||||
uint32_t ppc_effective_address = ppc_result_b + (reg_a ? ppc_result_a : 0);
|
||||
uint32_t ea = ppc_result_b + (reg_a ? ppc_result_a : 0);
|
||||
uint32_t grab_inb = ppc_state.spr[SPR::XER] & 127;
|
||||
|
||||
while (grab_inb >= 4) {
|
||||
mmu_write_vmem<uint32_t>(ppc_effective_address, ppc_state.gpr[reg_s]);
|
||||
mmu_write_vmem<uint32_t>(ea, ppc_state.gpr[reg_s]);
|
||||
reg_s++;
|
||||
if (reg_s >= 32) { // wrap around through GPR0
|
||||
reg_s = 0;
|
||||
}
|
||||
ppc_effective_address += 4;
|
||||
ea += 4;
|
||||
grab_inb -= 4;
|
||||
}
|
||||
|
||||
// handle remaining bytes
|
||||
switch (grab_inb) {
|
||||
case 1:
|
||||
mmu_write_vmem<uint8_t>(ppc_effective_address, ppc_state.gpr[reg_s] >> 24);
|
||||
mmu_write_vmem<uint8_t>(ea, ppc_state.gpr[reg_s] >> 24);
|
||||
break;
|
||||
case 2:
|
||||
mmu_write_vmem<uint16_t>(ppc_effective_address, ppc_state.gpr[reg_s] >> 16);
|
||||
mmu_write_vmem<uint16_t>(ea, ppc_state.gpr[reg_s] >> 16);
|
||||
break;
|
||||
case 3:
|
||||
mmu_write_vmem<uint16_t>(ppc_effective_address, ppc_state.gpr[reg_s] >> 16);
|
||||
mmu_write_vmem<uint8_t>(ppc_effective_address + 2, (ppc_state.gpr[reg_s] >> 8) & 0xFF);
|
||||
mmu_write_vmem<uint16_t>(ea, ppc_state.gpr[reg_s] >> 16);
|
||||
mmu_write_vmem<uint8_t>(ea + 2, (ppc_state.gpr[reg_s] >> 8) & 0xFF);
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
@ -1944,13 +1944,13 @@ void dppc_interpreter::ppc_eciwx() {
|
||||
}
|
||||
|
||||
ppc_grab_regsdab(ppc_cur_instruction);
|
||||
uint32_t ppc_effective_address = ppc_result_b + (reg_a ? ppc_result_a : 0);
|
||||
uint32_t ea = ppc_result_b + (reg_a ? ppc_result_a : 0);
|
||||
|
||||
if (ppc_effective_address & 0x3) {
|
||||
ppc_alignment_exception(ppc_effective_address);
|
||||
if (ea & 0x3) {
|
||||
ppc_alignment_exception(ea);
|
||||
}
|
||||
|
||||
uint32_t ppc_result_d = mmu_read_vmem<uint32_t>(ppc_effective_address);
|
||||
uint32_t ppc_result_d = mmu_read_vmem<uint32_t>(ea);
|
||||
|
||||
ppc_store_iresult_reg(reg_d, ppc_result_d);
|
||||
}
|
||||
@ -1964,13 +1964,13 @@ void dppc_interpreter::ppc_ecowx() {
|
||||
}
|
||||
|
||||
ppc_grab_regssab(ppc_cur_instruction);
|
||||
uint32_t ppc_effective_address = ppc_result_b + (reg_a ? ppc_result_a : 0);
|
||||
uint32_t ea = ppc_result_b + (reg_a ? ppc_result_a : 0);
|
||||
|
||||
if (ppc_effective_address & 0x3) {
|
||||
ppc_alignment_exception(ppc_effective_address);
|
||||
if (ea & 0x3) {
|
||||
ppc_alignment_exception(ea);
|
||||
}
|
||||
|
||||
mmu_write_vmem<uint32_t>(ppc_effective_address, ppc_result_d);
|
||||
mmu_write_vmem<uint32_t>(ea, ppc_result_d);
|
||||
}
|
||||
|
||||
// TLB Instructions
|
||||
|
Loading…
x
Reference in New Issue
Block a user