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ppcopcodes: Cleanup branch instructions.
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@ -1116,35 +1116,27 @@ void dppc_interpreter::ppc_extsh() {
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// Branching Instructions
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// Branching Instructions
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// The last two bytes of the instruction are used for determining how the branch happens.
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// The middle 24 bytes are the 24-bit address to use for branching to.
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void dppc_interpreter::ppc_b() {
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void dppc_interpreter::ppc_b() {
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uint32_t quick_test = (ppc_cur_instruction & 0x03FFFFFCUL);
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int32_t adr_li = int32_t(ppc_cur_instruction << 6) >> 6;
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int32_t adr_li = (quick_test < 0x2000000UL) ? quick_test : (0xFC000000UL + quick_test);
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ppc_next_instruction_address = uint32_t(ppc_state.pc + adr_li);
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ppc_next_instruction_address = uint32_t(ppc_state.pc + adr_li);
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exec_flags = EXEF_BRANCH;
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exec_flags = EXEF_BRANCH;
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}
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}
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void dppc_interpreter::ppc_bl() {
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void dppc_interpreter::ppc_bl() {
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uint32_t quick_test = (ppc_cur_instruction & 0x03FFFFFCUL);
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int32_t adr_li = int32_t((ppc_cur_instruction & ~3UL) << 6) >> 6;
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int32_t adr_li = (quick_test < 0x2000000UL) ? quick_test : (0xFC000000UL + quick_test);
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ppc_next_instruction_address = uint32_t(ppc_state.pc + adr_li);
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ppc_next_instruction_address = uint32_t(ppc_state.pc + adr_li);
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ppc_state.spr[SPR::LR] = uint32_t(ppc_state.pc + 4);
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ppc_state.spr[SPR::LR] = uint32_t(ppc_state.pc + 4);
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exec_flags = EXEF_BRANCH;
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exec_flags = EXEF_BRANCH;
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}
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}
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void dppc_interpreter::ppc_ba() {
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void dppc_interpreter::ppc_ba() {
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uint32_t quick_test = (ppc_cur_instruction & 0x03FFFFFCUL);
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int32_t adr_li = int32_t((ppc_cur_instruction & ~3UL) << 6) >> 6;
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int32_t adr_li = (quick_test < 0x2000000UL) ? quick_test : (0xFC000000UL + quick_test);
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ppc_next_instruction_address = adr_li;
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ppc_next_instruction_address = adr_li;
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exec_flags = EXEF_BRANCH;
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exec_flags = EXEF_BRANCH;
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}
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}
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void dppc_interpreter::ppc_bla() {
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void dppc_interpreter::ppc_bla() {
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uint32_t quick_test = (ppc_cur_instruction & 0x03FFFFFCUL);
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int32_t adr_li = int32_t((ppc_cur_instruction & ~3UL) << 6) >> 6;
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int32_t adr_li = (quick_test < 0x2000000UL) ? quick_test : (0xFC000000UL + quick_test);
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ppc_next_instruction_address = adr_li;
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ppc_next_instruction_address = adr_li;
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ppc_state.spr[SPR::LR] = uint32_t(ppc_state.pc + 4);
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ppc_state.spr[SPR::LR] = uint32_t(ppc_state.pc + 4);
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exec_flags = EXEF_BRANCH;
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exec_flags = EXEF_BRANCH;
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@ -1155,7 +1147,7 @@ void dppc_interpreter::ppc_bc() {
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uint32_t cnd_ok;
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uint32_t cnd_ok;
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uint32_t br_bo = (ppc_cur_instruction >> 21) & 31;
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uint32_t br_bo = (ppc_cur_instruction >> 21) & 31;
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uint32_t br_bi = (ppc_cur_instruction >> 16) & 31;
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uint32_t br_bi = (ppc_cur_instruction >> 16) & 31;
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int32_t br_bd = int32_t(int16_t(ppc_cur_instruction & 0xFFFCUL));
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int32_t br_bd = int32_t(int16_t(ppc_cur_instruction & ~3UL));
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if (!(br_bo & 0x04)) {
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if (!(br_bo & 0x04)) {
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(ppc_state.spr[SPR::CTR])--; /* decrement CTR */
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(ppc_state.spr[SPR::CTR])--; /* decrement CTR */
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@ -1174,7 +1166,7 @@ void dppc_interpreter::ppc_bca() {
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uint32_t cnd_ok;
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uint32_t cnd_ok;
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uint32_t br_bo = (ppc_cur_instruction >> 21) & 31;
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uint32_t br_bo = (ppc_cur_instruction >> 21) & 31;
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uint32_t br_bi = (ppc_cur_instruction >> 16) & 31;
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uint32_t br_bi = (ppc_cur_instruction >> 16) & 31;
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int32_t br_bd = int32_t(int16_t(ppc_cur_instruction & 0xFFFCUL));
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int32_t br_bd = int32_t(int16_t(ppc_cur_instruction & ~3UL));
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if (!(br_bo & 0x04)) {
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if (!(br_bo & 0x04)) {
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(ppc_state.spr[SPR::CTR])--; /* decrement CTR */
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(ppc_state.spr[SPR::CTR])--; /* decrement CTR */
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@ -1193,7 +1185,7 @@ void dppc_interpreter::ppc_bcl() {
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uint32_t cnd_ok;
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uint32_t cnd_ok;
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uint32_t br_bo = (ppc_cur_instruction >> 21) & 31;
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uint32_t br_bo = (ppc_cur_instruction >> 21) & 31;
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uint32_t br_bi = (ppc_cur_instruction >> 16) & 31;
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uint32_t br_bi = (ppc_cur_instruction >> 16) & 31;
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int32_t br_bd = int32_t(int16_t(ppc_cur_instruction & 0xFFFCUL));
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int32_t br_bd = int32_t(int16_t(ppc_cur_instruction & ~3UL));
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if (!(br_bo & 0x04)) {
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if (!(br_bo & 0x04)) {
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(ppc_state.spr[SPR::CTR])--; /* decrement CTR */
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(ppc_state.spr[SPR::CTR])--; /* decrement CTR */
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@ -1213,7 +1205,7 @@ void dppc_interpreter::ppc_bcla() {
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uint32_t cnd_ok;
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uint32_t cnd_ok;
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uint32_t br_bo = (ppc_cur_instruction >> 21) & 31;
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uint32_t br_bo = (ppc_cur_instruction >> 21) & 31;
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uint32_t br_bi = (ppc_cur_instruction >> 16) & 31;
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uint32_t br_bi = (ppc_cur_instruction >> 16) & 31;
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int32_t br_bd = int32_t(int16_t(ppc_cur_instruction & 0xFFFCUL));
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int32_t br_bd = int32_t(int16_t(ppc_cur_instruction & ~3UL));
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if (!(br_bo & 0x04)) {
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if (!(br_bo & 0x04)) {
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(ppc_state.spr[SPR::CTR])--; /* decrement CTR */
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(ppc_state.spr[SPR::CTR])--; /* decrement CTR */
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