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Revert "Further condition reg opcode patches"

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This reverts commit 756d32df078daf0ffbf6286bbd1f2a28bc95fc61.
This commit is contained in:
Maxim Poliakovski 2022-01-10 18:10:39 +01:00
parent c12bab9e27
commit e1e651966e
1 changed files with 7 additions and 14 deletions
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21
cpu/ppc/ppcopcodes.cpp
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@ -1243,8 +1243,7 @@ void dppc_interpreter::ppc_mcrf() {
void dppc_interpreter::ppc_crand() {
ppc_grab_regsdab();
uint8_t ir = (ppc_state.cr >> (31 - reg_a)) & (ppc_state.cr >> (31 - reg_b));
if (ir & 1) {
if ((ppc_state.cr & (0x80000000UL >> reg_a)) && (ppc_state.cr & (0x80000000UL >> reg_b))) {
ppc_state.cr |= (0x80000000UL >> reg_d);
} else {
ppc_state.cr &= ~(0x80000000UL >> reg_d);
@ -1253,8 +1252,7 @@ void dppc_interpreter::ppc_crand() {
void dppc_interpreter::ppc_crandc() {
ppc_grab_regsdab();
uint8_t ir = (ppc_state.cr >> (31 - reg_a)) & ~(ppc_state.cr >> (31 - reg_b));
if (ir & 1) {
if ((ppc_state.cr & (0x80000000UL >> reg_a)) && !(ppc_state.cr & (0x80000000UL >> reg_b))) {
ppc_state.cr |= (0x80000000UL >> reg_d);
} else {
ppc_state.cr &= ~(0x80000000UL >> reg_d);
@ -1262,8 +1260,7 @@ void dppc_interpreter::ppc_crandc() {
}
void dppc_interpreter::ppc_creqv() {
ppc_grab_regsdab();
uint8_t ir = ~((ppc_state.cr & (31 - reg_a)) ^ (ppc_state.cr & (31 - reg_b)));
if (ir & 1) {
if (!((ppc_state.cr & (0x80000000UL >> reg_a)) ^ (ppc_state.cr & (0x80000000UL >> reg_b)))) {
ppc_state.cr |= (0x80000000UL >> reg_d);
} else {
ppc_state.cr &= ~(0x80000000UL >> reg_d);
@ -1271,8 +1268,7 @@ void dppc_interpreter::ppc_creqv() {
}
void dppc_interpreter::ppc_crnand() {
ppc_grab_regsdab();
uint8_t ir = ~((ppc_state.cr >> (31 - reg_a)) & (ppc_state.cr >> (31 - reg_b)));
if (ir & 1) {
if (!((ppc_state.cr & (0x80000000UL >> reg_a)) && (ppc_state.cr & (0x80000000UL >> reg_b)))) {
ppc_state.cr |= (0x80000000UL >> reg_d);
} else {
ppc_state.cr &= ~(0x80000000UL >> reg_d);
@ -1280,8 +1276,7 @@ void dppc_interpreter::ppc_crnand() {
}
void dppc_interpreter::ppc_crnor() {
ppc_grab_regsdab();
uint8_t ir = ~((ppc_state.cr >> (31 - reg_a)) | (ppc_state.cr >> (31 - reg_b)));
if (ir & 1) {
if (!((ppc_state.cr & (0x80000000UL >> reg_a)) || (ppc_state.cr & (0x80000000UL >> reg_b)))) {
ppc_state.cr |= (0x80000000UL >> reg_d);
} else {
ppc_state.cr &= ~(0x80000000UL >> reg_d);
@ -1290,8 +1285,7 @@ void dppc_interpreter::ppc_crnor() {
void dppc_interpreter::ppc_cror() {
ppc_grab_regsdab();
uint8_t ir = (ppc_state.cr >> (31 - reg_a)) || (ppc_state.cr >> (31 - reg_b));
if (ir & 1) {
if ((ppc_state.cr & (0x80000000UL >> reg_a)) || (ppc_state.cr & (0x80000000UL >> reg_b))) {
ppc_state.cr |= (0x80000000UL >> reg_d);
} else {
ppc_state.cr &= ~(0x80000000UL >> reg_d);
@ -1299,8 +1293,7 @@ void dppc_interpreter::ppc_cror() {
}
void dppc_interpreter::ppc_crorc() {
ppc_grab_regsdab();
uint8_t ir = (ppc_state.cr >> (31 - reg_a)) || ~(ppc_state.cr >> (31 - reg_b));
if (ir & 1) {
if ((ppc_state.cr & (0x80000000UL >> reg_a)) || !(ppc_state.cr & (0x80000000UL >> reg_b))) {
ppc_state.cr |= (0x80000000UL >> reg_d);
} else {
ppc_state.cr &= ~(0x80000000UL >> reg_d);