mirror of
https://github.com/dingusdev/dingusppc.git
synced 2025-01-22 14:30:31 +00:00
Fixed redunant variable names for PPC emulation.
This commit is contained in:
parent
392119480e
commit
e31f7873f5
@ -62,7 +62,7 @@ void power_abso() {
|
||||
ppc_grab_regsda();
|
||||
if (ppc_result_a == 0x80000000) {
|
||||
ppc_result_d = ppc_result_a;
|
||||
ppc_state.ppc_spr[SPR::XER] |= 0x40000000;
|
||||
ppc_state.spr[SPR::XER] |= 0x40000000;
|
||||
|
||||
}
|
||||
else {
|
||||
@ -75,7 +75,7 @@ void power_absodot() {
|
||||
ppc_grab_regsda();
|
||||
if (ppc_result_a == 0x80000000) {
|
||||
ppc_result_d = ppc_result_a;
|
||||
ppc_state.ppc_spr[SPR::XER] |= 0x40000000;
|
||||
ppc_state.spr[SPR::XER] |= 0x40000000;
|
||||
|
||||
}
|
||||
else {
|
||||
@ -118,46 +118,46 @@ void power_clcsdot() {
|
||||
|
||||
void power_div() {
|
||||
ppc_grab_regsdab();
|
||||
ppc_result_d = (ppc_result_a | ppc_state.ppc_spr[SPR::MQ]) / ppc_result_b;
|
||||
ppc_state.ppc_spr[SPR::MQ] = (ppc_result_a | ppc_state.ppc_spr[SPR::MQ]) % ppc_result_b;
|
||||
ppc_result_d = (ppc_result_a | ppc_state.spr[SPR::MQ]) / ppc_result_b;
|
||||
ppc_state.spr[SPR::MQ] = (ppc_result_a | ppc_state.spr[SPR::MQ]) % ppc_result_b;
|
||||
ppc_store_result_regd();
|
||||
}
|
||||
|
||||
void power_divdot() {
|
||||
ppc_result_d = (ppc_result_a | ppc_state.ppc_spr[SPR::MQ]) / ppc_result_b;
|
||||
ppc_state.ppc_spr[SPR::MQ] = (ppc_result_a | ppc_state.ppc_spr[SPR::MQ]) % ppc_result_b;
|
||||
ppc_result_d = (ppc_result_a | ppc_state.spr[SPR::MQ]) / ppc_result_b;
|
||||
ppc_state.spr[SPR::MQ] = (ppc_result_a | ppc_state.spr[SPR::MQ]) % ppc_result_b;
|
||||
}
|
||||
|
||||
void power_divo() {
|
||||
ppc_result_d = (ppc_result_a | ppc_state.ppc_spr[SPR::MQ]) / ppc_result_b;
|
||||
ppc_state.ppc_spr[SPR::MQ] = (ppc_result_a | ppc_state.ppc_spr[SPR::MQ]) % ppc_result_b;
|
||||
ppc_result_d = (ppc_result_a | ppc_state.spr[SPR::MQ]) / ppc_result_b;
|
||||
ppc_state.spr[SPR::MQ] = (ppc_result_a | ppc_state.spr[SPR::MQ]) % ppc_result_b;
|
||||
}
|
||||
|
||||
void power_divodot() {
|
||||
ppc_result_d = (ppc_result_a | ppc_state.ppc_spr[SPR::MQ]) / ppc_result_b;
|
||||
ppc_state.ppc_spr[SPR::MQ] = (ppc_result_a | ppc_state.ppc_spr[SPR::MQ]) % ppc_result_b;
|
||||
ppc_result_d = (ppc_result_a | ppc_state.spr[SPR::MQ]) / ppc_result_b;
|
||||
ppc_state.spr[SPR::MQ] = (ppc_result_a | ppc_state.spr[SPR::MQ]) % ppc_result_b;
|
||||
}
|
||||
|
||||
void power_divs() {
|
||||
ppc_grab_regsdab();
|
||||
ppc_result_d = ppc_result_a / ppc_result_b;
|
||||
ppc_state.ppc_spr[SPR::MQ] = (ppc_result_a % ppc_result_b);
|
||||
ppc_state.spr[SPR::MQ] = (ppc_result_a % ppc_result_b);
|
||||
ppc_store_result_regd();
|
||||
}
|
||||
|
||||
void power_divsdot() {
|
||||
ppc_result_d = ppc_result_a / ppc_result_b;
|
||||
ppc_state.ppc_spr[SPR::MQ] = (ppc_result_a % ppc_result_b);
|
||||
ppc_state.spr[SPR::MQ] = (ppc_result_a % ppc_result_b);
|
||||
}
|
||||
|
||||
void power_divso() {
|
||||
ppc_result_d = ppc_result_a / ppc_result_b;
|
||||
ppc_state.ppc_spr[SPR::MQ] = (ppc_result_a % ppc_result_b);
|
||||
ppc_state.spr[SPR::MQ] = (ppc_result_a % ppc_result_b);
|
||||
}
|
||||
|
||||
void power_divsodot() {
|
||||
ppc_result_d = ppc_result_a / ppc_result_b;
|
||||
ppc_state.ppc_spr[SPR::MQ] = (ppc_result_a % ppc_result_b);
|
||||
ppc_state.spr[SPR::MQ] = (ppc_result_a % ppc_result_b);
|
||||
}
|
||||
|
||||
void power_doz() {
|
||||
@ -218,11 +218,11 @@ void power_lscbx() {
|
||||
bool match_found = false;
|
||||
uint32_t shift_amount = 0;
|
||||
uint8_t return_value;
|
||||
uint8_t byte_compared = (uint8_t)((ppc_state.ppc_spr[SPR::XER] & 0xFF00) >> 8);
|
||||
if ((ppc_state.ppc_spr[SPR::XER] & 0x7f) == 0) {
|
||||
uint8_t byte_compared = (uint8_t)((ppc_state.spr[SPR::XER] & 0xFF00) >> 8);
|
||||
if ((ppc_state.spr[SPR::XER] & 0x7f) == 0) {
|
||||
return;
|
||||
}
|
||||
uint32_t bytes_to_load = (ppc_state.ppc_spr[SPR::XER] & 0x7f) + 1;
|
||||
uint32_t bytes_to_load = (ppc_state.spr[SPR::XER] & 0x7f) + 1;
|
||||
ppc_effective_address = (reg_a == 0) ? ppc_result_b : ppc_result_a + ppc_result_b;
|
||||
do {
|
||||
ppc_effective_address++;
|
||||
@ -265,7 +265,7 @@ void power_lscbx() {
|
||||
shift_amount++;
|
||||
}
|
||||
} while (bytes_to_load > 0);
|
||||
ppc_state.ppc_spr[SPR::XER] = (ppc_state.ppc_spr[SPR::XER] & 0xFFFFFF80) | bytes_copied;
|
||||
ppc_state.spr[SPR::XER] = (ppc_state.spr[SPR::XER] & 0xFFFFFF80) | bytes_copied;
|
||||
ppc_store_result_regd();
|
||||
}
|
||||
|
||||
@ -362,7 +362,7 @@ void power_mul() {
|
||||
|
||||
product = ((uint64_t)ppc_result_a) * ((uint64_t)ppc_result_b);
|
||||
ppc_result_d = ((uint32_t)(product >> 32));
|
||||
ppc_state.ppc_spr[SPR::MQ] = ((uint32_t)(product));
|
||||
ppc_state.spr[SPR::MQ] = ((uint32_t)(product));
|
||||
ppc_store_result_regd();
|
||||
|
||||
}
|
||||
@ -373,7 +373,7 @@ void power_muldot() {
|
||||
|
||||
product = ((uint64_t)ppc_result_a) * ((uint64_t)ppc_result_b);
|
||||
ppc_result_d = ((uint32_t)(product >> 32));
|
||||
ppc_state.ppc_spr[SPR::MQ] = ((uint32_t)(product));
|
||||
ppc_state.spr[SPR::MQ] = ((uint32_t)(product));
|
||||
ppc_changecrf0(ppc_result_d);
|
||||
ppc_store_result_regd();
|
||||
|
||||
@ -384,7 +384,7 @@ void power_mulo() {
|
||||
|
||||
product = ((uint64_t)ppc_result_a) * ((uint64_t)ppc_result_b);
|
||||
ppc_result_d = ((uint32_t)(product >> 32));
|
||||
ppc_state.ppc_spr[SPR::MQ] = ((uint32_t)(product));
|
||||
ppc_state.spr[SPR::MQ] = ((uint32_t)(product));
|
||||
|
||||
}
|
||||
|
||||
@ -393,7 +393,7 @@ void power_mulodot() {
|
||||
|
||||
product = ((uint64_t)ppc_result_a) * ((uint64_t)ppc_result_b);
|
||||
ppc_result_d = ((uint32_t)(product >> 32));
|
||||
ppc_state.ppc_spr[SPR::MQ] = ((uint32_t)(product));
|
||||
ppc_state.spr[SPR::MQ] = ((uint32_t)(product));
|
||||
|
||||
}
|
||||
|
||||
@ -473,7 +473,7 @@ void power_sle() {
|
||||
insert_mask |= (1 << i);
|
||||
}
|
||||
uint32_t insert_final = ((ppc_result_d << rot_amt) | (ppc_result_d >> (32 - rot_amt)));
|
||||
ppc_state.ppc_spr[SPR::MQ] = insert_final & insert_mask;
|
||||
ppc_state.spr[SPR::MQ] = insert_final & insert_mask;
|
||||
ppc_result_a = insert_final & insert_mask;
|
||||
ppc_store_result_rega();
|
||||
}
|
||||
@ -486,7 +486,7 @@ void power_sledot() {
|
||||
insert_mask |= (1 << i);
|
||||
}
|
||||
uint32_t insert_final = ((ppc_result_d << rot_amt) | (ppc_result_d >> (32 - rot_amt)));
|
||||
ppc_state.ppc_spr[SPR::MQ] = insert_final & insert_mask;
|
||||
ppc_state.spr[SPR::MQ] = insert_final & insert_mask;
|
||||
ppc_result_a = insert_final & insert_mask;
|
||||
ppc_changecrf0(ppc_result_a);
|
||||
ppc_store_result_rega();
|
||||
@ -500,7 +500,7 @@ void power_sleq() {
|
||||
insert_mask |= (1 << i);
|
||||
}
|
||||
uint32_t insert_start = ((ppc_result_d << rot_amt) | (ppc_result_d >> (rot_amt - 31)));
|
||||
uint32_t insert_end = ppc_state.ppc_spr[SPR::MQ];
|
||||
uint32_t insert_end = ppc_state.spr[SPR::MQ];
|
||||
|
||||
for (int i = 0; i < 32; i++) {
|
||||
if (insert_mask & (1 << i)) {
|
||||
@ -510,7 +510,7 @@ void power_sleq() {
|
||||
}
|
||||
|
||||
ppc_result_a = insert_end;
|
||||
ppc_state.ppc_spr[SPR::MQ] = insert_start;
|
||||
ppc_state.spr[SPR::MQ] = insert_start;
|
||||
ppc_store_result_rega();
|
||||
}
|
||||
|
||||
@ -522,7 +522,7 @@ void power_sleqdot() {
|
||||
insert_mask |= (1 << i);
|
||||
}
|
||||
uint32_t insert_start = ((ppc_result_d << rot_amt) | (ppc_result_d >> (rot_amt - 31)));
|
||||
uint32_t insert_end = ppc_state.ppc_spr[SPR::MQ];
|
||||
uint32_t insert_end = ppc_state.spr[SPR::MQ];
|
||||
|
||||
for (int i = 0; i < 32; i++) {
|
||||
if (insert_mask & (1 << i)) {
|
||||
@ -532,7 +532,7 @@ void power_sleqdot() {
|
||||
}
|
||||
|
||||
ppc_result_a = insert_end;
|
||||
ppc_state.ppc_spr[SPR::MQ] = insert_start;
|
||||
ppc_state.spr[SPR::MQ] = insert_start;
|
||||
ppc_changecrf0(ppc_result_a);
|
||||
ppc_store_result_rega();
|
||||
}
|
||||
@ -545,7 +545,7 @@ void power_sliq() {
|
||||
insert_mask |= (1 << i);
|
||||
}
|
||||
uint32_t insert_start = ((ppc_result_d << rot_sh) | (ppc_result_d >> (rot_sh - 31)));
|
||||
uint32_t insert_end = ppc_state.ppc_spr[SPR::MQ];
|
||||
uint32_t insert_end = ppc_state.spr[SPR::MQ];
|
||||
|
||||
for (int i = 0; i < 32; i++) {
|
||||
if (insert_mask & (1 << i)) {
|
||||
@ -555,7 +555,7 @@ void power_sliq() {
|
||||
}
|
||||
|
||||
ppc_result_a = insert_end & insert_mask;
|
||||
ppc_state.ppc_spr[SPR::MQ] = insert_start;
|
||||
ppc_state.spr[SPR::MQ] = insert_start;
|
||||
ppc_store_result_rega();
|
||||
}
|
||||
|
||||
@ -567,7 +567,7 @@ void power_sliqdot() {
|
||||
insert_mask |= (1 << i);
|
||||
}
|
||||
uint32_t insert_start = ((ppc_result_d << rot_sh) | (ppc_result_d >> (rot_sh - 31)));
|
||||
uint32_t insert_end = ppc_state.ppc_spr[SPR::MQ];
|
||||
uint32_t insert_end = ppc_state.spr[SPR::MQ];
|
||||
|
||||
for (int i = 0; i < 32; i++) {
|
||||
if (insert_mask & (1 << i)) {
|
||||
@ -577,7 +577,7 @@ void power_sliqdot() {
|
||||
}
|
||||
|
||||
ppc_result_a = insert_end & insert_mask;
|
||||
ppc_state.ppc_spr[SPR::MQ] = insert_start;
|
||||
ppc_state.spr[SPR::MQ] = insert_start;
|
||||
ppc_changecrf0(ppc_result_a);
|
||||
ppc_store_result_rega();
|
||||
}
|
||||
@ -590,7 +590,7 @@ void power_slliq() {
|
||||
insert_mask |= (1 << i);
|
||||
}
|
||||
uint32_t insert_start = ((ppc_result_d << rot_sh) | (ppc_result_d >> (32 - rot_sh)));
|
||||
uint32_t insert_end = ppc_state.ppc_spr[SPR::MQ];
|
||||
uint32_t insert_end = ppc_state.spr[SPR::MQ];
|
||||
|
||||
for (int i = 0; i < 32; i++) {
|
||||
if (insert_mask & (1 << i)) {
|
||||
@ -600,7 +600,7 @@ void power_slliq() {
|
||||
}
|
||||
|
||||
ppc_result_a = insert_end;
|
||||
ppc_state.ppc_spr[SPR::MQ] = insert_start;
|
||||
ppc_state.spr[SPR::MQ] = insert_start;
|
||||
ppc_store_result_rega();
|
||||
}
|
||||
|
||||
@ -612,7 +612,7 @@ void power_slliqdot() {
|
||||
insert_mask |= (1 << i);
|
||||
}
|
||||
uint32_t insert_start = ((ppc_result_d << rot_sh) | (ppc_result_d >> (32 - rot_sh)));
|
||||
uint32_t insert_end = ppc_state.ppc_spr[SPR::MQ];
|
||||
uint32_t insert_end = ppc_state.spr[SPR::MQ];
|
||||
|
||||
for (int i = 0; i < 32; i++) {
|
||||
if (insert_mask & (1 << i)) {
|
||||
@ -622,7 +622,7 @@ void power_slliqdot() {
|
||||
}
|
||||
|
||||
ppc_result_a = insert_end;
|
||||
ppc_state.ppc_spr[SPR::MQ] = insert_start;
|
||||
ppc_state.spr[SPR::MQ] = insert_start;
|
||||
ppc_changecrf0(ppc_result_a);
|
||||
ppc_store_result_rega();
|
||||
}
|
||||
@ -667,7 +667,7 @@ void power_sre() {
|
||||
insert_mask |= (1 << i);
|
||||
}
|
||||
uint32_t insert_final = ((ppc_result_d >> rot_amt) | (ppc_result_d << (32 - rot_amt)));
|
||||
ppc_state.ppc_spr[SPR::MQ] = insert_final & insert_mask;
|
||||
ppc_state.spr[SPR::MQ] = insert_final & insert_mask;
|
||||
ppc_result_a = insert_final;
|
||||
ppc_store_result_rega();
|
||||
}
|
||||
@ -680,7 +680,7 @@ void power_sredot() {
|
||||
insert_mask |= (1 << i);
|
||||
}
|
||||
uint32_t insert_final = ((ppc_result_d >> rot_amt) | (ppc_result_d << (32 - rot_amt)));
|
||||
ppc_state.ppc_spr[SPR::MQ] = insert_final & insert_mask;
|
||||
ppc_state.spr[SPR::MQ] = insert_final & insert_mask;
|
||||
ppc_result_a = insert_final;
|
||||
ppc_changecrf0(ppc_result_a);
|
||||
ppc_store_result_rega();
|
||||
@ -702,7 +702,7 @@ void power_sreq() {
|
||||
insert_mask |= (1 << i);
|
||||
}
|
||||
uint32_t insert_start = ((ppc_result_d >> rot_sh) | (ppc_result_d << (32 - rot_sh)));
|
||||
uint32_t insert_end = ppc_state.ppc_spr[SPR::MQ];
|
||||
uint32_t insert_end = ppc_state.spr[SPR::MQ];
|
||||
|
||||
for (int i = 0; i < 32; i++) {
|
||||
if (insert_mask & (1 << i)) {
|
||||
@ -712,7 +712,7 @@ void power_sreq() {
|
||||
}
|
||||
|
||||
ppc_result_a = insert_end;
|
||||
ppc_state.ppc_spr[SPR::MQ] = insert_start;
|
||||
ppc_state.spr[SPR::MQ] = insert_start;
|
||||
ppc_store_result_rega();
|
||||
}
|
||||
|
||||
@ -724,7 +724,7 @@ void power_sreqdot() {
|
||||
insert_mask |= (1 << i);
|
||||
}
|
||||
uint32_t insert_start = ((ppc_result_d >> rot_sh) | (ppc_result_d << (32 - rot_sh)));
|
||||
uint32_t insert_end = ppc_state.ppc_spr[SPR::MQ];
|
||||
uint32_t insert_end = ppc_state.spr[SPR::MQ];
|
||||
|
||||
for (int i = 0; i < 32; i++) {
|
||||
if (insert_mask & (1 << i)) {
|
||||
@ -734,7 +734,7 @@ void power_sreqdot() {
|
||||
}
|
||||
|
||||
ppc_result_a = insert_end;
|
||||
ppc_state.ppc_spr[SPR::MQ] = insert_start;
|
||||
ppc_state.spr[SPR::MQ] = insert_start;
|
||||
ppc_changecrf0(ppc_result_a);
|
||||
ppc_store_result_rega();
|
||||
}
|
||||
@ -747,7 +747,7 @@ void power_sriq() {
|
||||
insert_mask |= (1 << i);
|
||||
}
|
||||
uint32_t insert_start = ((ppc_result_d >> rot_sh) | (ppc_result_d << (32 - rot_sh)));
|
||||
uint32_t insert_end = ppc_state.ppc_spr[SPR::MQ];
|
||||
uint32_t insert_end = ppc_state.spr[SPR::MQ];
|
||||
|
||||
for (int i = 0; i < 32; i++) {
|
||||
if (insert_mask & (1 << i)) {
|
||||
@ -757,7 +757,7 @@ void power_sriq() {
|
||||
}
|
||||
|
||||
ppc_result_a = insert_end;
|
||||
ppc_state.ppc_spr[SPR::MQ] = insert_start;
|
||||
ppc_state.spr[SPR::MQ] = insert_start;
|
||||
ppc_store_result_rega();
|
||||
}
|
||||
|
||||
@ -769,7 +769,7 @@ void power_sriqdot() {
|
||||
insert_mask |= (1 << i);
|
||||
}
|
||||
uint32_t insert_start = ((ppc_result_d >> rot_sh) | (ppc_result_d << (32 - rot_sh)));
|
||||
uint32_t insert_end = ppc_state.ppc_spr[SPR::MQ];
|
||||
uint32_t insert_end = ppc_state.spr[SPR::MQ];
|
||||
|
||||
for (int i = 0; i < 32; i++) {
|
||||
if (insert_mask & (1 << i)) {
|
||||
@ -779,7 +779,7 @@ void power_sriqdot() {
|
||||
}
|
||||
|
||||
ppc_result_a = insert_end;
|
||||
ppc_state.ppc_spr[SPR::MQ] = insert_start;
|
||||
ppc_state.spr[SPR::MQ] = insert_start;
|
||||
ppc_changecrf0(ppc_result_a);
|
||||
ppc_store_result_rega();
|
||||
}
|
||||
|
@ -64,16 +64,16 @@ fpscr = FP Status and Condition Register
|
||||
**/
|
||||
|
||||
typedef struct struct_ppc_state {
|
||||
FPR_storage ppc_fpr[32];
|
||||
uint32_t ppc_pc; //Referred as the CIA in the PPC manual
|
||||
uint32_t ppc_gpr[32];
|
||||
uint32_t ppc_cr;
|
||||
uint32_t ppc_fpscr;
|
||||
uint32_t ppc_tbr[2];
|
||||
uint32_t ppc_spr[1024];
|
||||
uint32_t ppc_msr;
|
||||
uint32_t ppc_sr[16];
|
||||
bool ppc_reserve; //reserve bit used for lwarx and stcwx
|
||||
FPR_storage fpr[32];
|
||||
uint32_t prog_counter; //Referred as the CIA in the PPC manual
|
||||
uint32_t gpr[32];
|
||||
uint32_t cr;
|
||||
uint32_t fpscr;
|
||||
uint32_t tbr[2];
|
||||
uint32_t spr[1024];
|
||||
uint32_t msr;
|
||||
uint32_t sr[16];
|
||||
bool reserve; //reserve bit used for lwarx and stcwx
|
||||
} SetPRS;
|
||||
|
||||
extern SetPRS ppc_state;
|
||||
@ -110,16 +110,16 @@ enum PPC_VER : uint32_t {
|
||||
|
||||
/**
|
||||
typedef struct struct_ppc64_state {
|
||||
FPR_storage ppc_fpr [32];
|
||||
uint64_t ppc_pc; //Referred as the CIA in the PPC manual
|
||||
uint64_t ppc_gpr [32];
|
||||
uint32_t ppc_cr;
|
||||
uint32_t ppc_fpscr;
|
||||
uint32_t ppc_tbr [2];
|
||||
uint64_t ppc_spr [1024];
|
||||
uint32_t ppc_msr;
|
||||
uint32_t ppc_sr [16];
|
||||
bool ppc_reserve; //reserve bit used for lwarx and stcwx
|
||||
FPR_storage fpr [32];
|
||||
uint64_t prog_counter; //Referred as the CIA in the PPC manual
|
||||
uint64_t gpr [32];
|
||||
uint32_t cr;
|
||||
uint32_t fpscr;
|
||||
uint32_t tbr [2];
|
||||
uint64_t spr [1024];
|
||||
uint32_t msr;
|
||||
uint32_t sr [16];
|
||||
bool reserve; //reserve bit used for lwarx and stcwx
|
||||
} SetPRS64;
|
||||
|
||||
extern SetPRS64 ppc_state64;
|
||||
|
@ -39,60 +39,60 @@ jmp_buf exc_env; /* Global exception environment. */
|
||||
|
||||
switch(exception_type) {
|
||||
case Except_Type::EXC_SYSTEM_RESET:
|
||||
ppc_state.ppc_spr[SPR::SRR0] = ppc_state.ppc_pc & 0xFFFFFFFC;
|
||||
ppc_state.spr[SPR::SRR0] = ppc_state.prog_counter & 0xFFFFFFFC;
|
||||
ppc_next_instruction_address = 0x0100;
|
||||
break;
|
||||
|
||||
case Except_Type::EXC_MACHINE_CHECK:
|
||||
if (!(ppc_state.ppc_msr & 0x1000)) {
|
||||
if (!(ppc_state.msr & 0x1000)) {
|
||||
/* TODO: handle internal checkstop */
|
||||
}
|
||||
ppc_state.ppc_spr[SPR::SRR0] = ppc_state.ppc_pc & 0xFFFFFFFC;
|
||||
ppc_state.spr[SPR::SRR0] = ppc_state.prog_counter & 0xFFFFFFFC;
|
||||
ppc_next_instruction_address = 0x0200;
|
||||
break;
|
||||
|
||||
case Except_Type::EXC_DSI:
|
||||
ppc_state.ppc_spr[SPR::SRR0] = ppc_state.ppc_pc & 0xFFFFFFFC;
|
||||
ppc_state.spr[SPR::SRR0] = ppc_state.prog_counter & 0xFFFFFFFC;
|
||||
ppc_next_instruction_address = 0x0300;
|
||||
break;
|
||||
|
||||
case Except_Type::EXC_ISI:
|
||||
ppc_state.ppc_spr[SPR::SRR0] = ppc_next_instruction_address;
|
||||
ppc_state.spr[SPR::SRR0] = ppc_next_instruction_address;
|
||||
ppc_next_instruction_address = 0x0400;
|
||||
break;
|
||||
|
||||
case Except_Type::EXC_EXT_INT:
|
||||
ppc_state.ppc_spr[SPR::SRR0] = ppc_next_instruction_address;
|
||||
ppc_state.spr[SPR::SRR0] = ppc_next_instruction_address;
|
||||
ppc_next_instruction_address = 0x0500;
|
||||
break;
|
||||
|
||||
case Except_Type::EXC_ALIGNMENT:
|
||||
ppc_state.ppc_spr[SPR::SRR0] = ppc_state.ppc_pc & 0xFFFFFFFC;
|
||||
ppc_state.spr[SPR::SRR0] = ppc_state.prog_counter & 0xFFFFFFFC;
|
||||
ppc_next_instruction_address = 0x0600;
|
||||
break;
|
||||
|
||||
case Except_Type::EXC_PROGRAM:
|
||||
ppc_state.ppc_spr[SPR::SRR0] = ppc_state.ppc_pc & 0xFFFFFFFC;
|
||||
ppc_state.spr[SPR::SRR0] = ppc_state.prog_counter & 0xFFFFFFFC;
|
||||
ppc_next_instruction_address = 0x0700;
|
||||
break;
|
||||
|
||||
case Except_Type::EXC_NO_FPU:
|
||||
ppc_state.ppc_spr[SPR::SRR0] = ppc_state.ppc_pc & 0xFFFFFFFC;
|
||||
ppc_state.spr[SPR::SRR0] = ppc_state.prog_counter & 0xFFFFFFFC;
|
||||
ppc_next_instruction_address = 0x0800;
|
||||
break;
|
||||
|
||||
case Except_Type::EXC_DECR:
|
||||
ppc_state.ppc_spr[SPR::SRR0] = (ppc_state.ppc_pc & 0xFFFFFFFC) + 4;
|
||||
ppc_state.spr[SPR::SRR0] = (ppc_state.prog_counter & 0xFFFFFFFC) + 4;
|
||||
ppc_next_instruction_address = 0x0900;
|
||||
break;
|
||||
|
||||
case Except_Type::EXC_SYSCALL:
|
||||
ppc_state.ppc_spr[SPR::SRR0] = (ppc_state.ppc_pc & 0xFFFFFFFC) + 4;
|
||||
ppc_state.spr[SPR::SRR0] = (ppc_state.prog_counter & 0xFFFFFFFC) + 4;
|
||||
ppc_next_instruction_address = 0x0C00;
|
||||
break;
|
||||
|
||||
case Except_Type::EXC_TRACE:
|
||||
ppc_state.ppc_spr[SPR::SRR0] = (ppc_state.ppc_pc & 0xFFFFFFFC) + 4;
|
||||
ppc_state.spr[SPR::SRR0] = (ppc_state.prog_counter & 0xFFFFFFFC) + 4;
|
||||
ppc_next_instruction_address = 0x0D00;
|
||||
break;
|
||||
|
||||
@ -102,13 +102,13 @@ jmp_buf exc_env; /* Global exception environment. */
|
||||
break;
|
||||
}
|
||||
|
||||
ppc_state.ppc_spr[SPR::SRR1] = (ppc_state.ppc_msr & 0x0000FF73) | srr1_bits;
|
||||
ppc_state.ppc_msr &= 0xFFFB1041;
|
||||
ppc_state.spr[SPR::SRR1] = (ppc_state.msr & 0x0000FF73) | srr1_bits;
|
||||
ppc_state.msr &= 0xFFFB1041;
|
||||
/* copy MSR[ILE] to MSR[LE] */
|
||||
ppc_state.ppc_msr = (ppc_state.ppc_msr & 0xFFFFFFFE) |
|
||||
((ppc_state.ppc_msr >> 16) & 1);
|
||||
ppc_state.msr = (ppc_state.msr & 0xFFFFFFFE) |
|
||||
((ppc_state.msr >> 16) & 1);
|
||||
|
||||
if (ppc_state.ppc_msr & 0x40) {
|
||||
if (ppc_state.msr & 0x40) {
|
||||
ppc_next_instruction_address |= 0xFFF00000;
|
||||
}
|
||||
|
||||
@ -132,9 +132,9 @@ jmp_buf exc_env; /* Global exception environment. */
|
||||
|
||||
case Except_Type::EXC_DSI:
|
||||
case Except_Type::EXC_ISI:
|
||||
if (ppc_state.ppc_spr[SPR::DSISR] & 0x40000000)
|
||||
if (ppc_state.spr[SPR::DSISR] & 0x40000000)
|
||||
exc_descriptor = "DSI/ISI exception: unmapped memory access";
|
||||
else if (ppc_state.ppc_spr[SPR::DSISR] & 0x08000000)
|
||||
else if (ppc_state.spr[SPR::DSISR] & 0x08000000)
|
||||
exc_descriptor = "DSI/ISI exception: access protection violation";
|
||||
else {
|
||||
if (exception_type == Except_Type::EXC_DSI)
|
||||
|
@ -533,27 +533,27 @@ void ppc_main_opcode() {
|
||||
}
|
||||
|
||||
/** Old time base register (TBR) update code. */
|
||||
void ppc_tbr_update()
|
||||
void tbr_update()
|
||||
{
|
||||
clock_t clock_test_current = clock();
|
||||
uint32_t test_clock = ((uint32_t)(clock_test_current - clock_test_begin)) / CLOCKS_PER_SEC;
|
||||
if (test_clock) {
|
||||
if (ppc_state.ppc_tbr[0] != 0xFFFFFFFF) {
|
||||
ppc_state.ppc_tbr[0]++;
|
||||
if (ppc_state.tbr[0] != 0xFFFFFFFF) {
|
||||
ppc_state.tbr[0]++;
|
||||
}
|
||||
else {
|
||||
ppc_state.ppc_tbr[0] = 0;
|
||||
if (ppc_state.ppc_tbr[1] != 0xFFFFFFFF) {
|
||||
ppc_state.ppc_tbr[1]++;
|
||||
ppc_state.tbr[0] = 0;
|
||||
if (ppc_state.tbr[1] != 0xFFFFFFFF) {
|
||||
ppc_state.tbr[1]++;
|
||||
}
|
||||
else {
|
||||
ppc_state.ppc_tbr[1] = 0;
|
||||
ppc_state.tbr[1] = 0;
|
||||
}
|
||||
}
|
||||
clock_test_begin = clock();
|
||||
//Placeholder Decrementing Code
|
||||
if (ppc_state.ppc_spr[22] > 0) {
|
||||
ppc_state.ppc_spr[22]--;
|
||||
if (ppc_state.spr[22] > 0) {
|
||||
ppc_state.spr[22]--;
|
||||
}
|
||||
}
|
||||
}
|
||||
@ -563,23 +563,23 @@ void ppc_tbr_update()
|
||||
void ppc_exec()
|
||||
{
|
||||
while (power_on) {
|
||||
//printf("PowerPC Address: %x \n", ppc_state.ppc_pc);
|
||||
quickinstruction_translate(ppc_state.ppc_pc);
|
||||
//printf("PowerPC Address: %x \n", ppc_state.prog_counter);
|
||||
quickinstruction_translate(ppc_state.prog_counter);
|
||||
ppc_main_opcode();
|
||||
if (grab_branch & !grab_exception) {
|
||||
ppc_state.ppc_pc = ppc_next_instruction_address;
|
||||
ppc_state.prog_counter = ppc_next_instruction_address;
|
||||
grab_branch = 0;
|
||||
ppc_tbr_update();
|
||||
tbr_update();
|
||||
}
|
||||
else if (grab_return | grab_exception) {
|
||||
ppc_state.ppc_pc = ppc_next_instruction_address;
|
||||
ppc_state.prog_counter = ppc_next_instruction_address;
|
||||
grab_exception = 0;
|
||||
grab_return = 0;
|
||||
ppc_tbr_update();
|
||||
tbr_update();
|
||||
}
|
||||
else {
|
||||
ppc_state.ppc_pc += 4;
|
||||
ppc_tbr_update();
|
||||
ppc_state.prog_counter += 4;
|
||||
tbr_update();
|
||||
}
|
||||
}
|
||||
}
|
||||
@ -590,16 +590,16 @@ void ppc_exec()
|
||||
uint8_t* pc_real;
|
||||
|
||||
/* start new basic block */
|
||||
bb_start_la = ppc_state.ppc_pc;
|
||||
bb_start_la = ppc_state.prog_counter;
|
||||
bb_kind = BB_end_kind::BB_NONE;
|
||||
|
||||
if (setjmp(exc_env)) {
|
||||
/* reaching here means we got a low-level exception */
|
||||
timebase_counter += (ppc_state.ppc_pc - bb_start_la) >> 2;
|
||||
timebase_counter += (ppc_state.prog_counter - bb_start_la) >> 2;
|
||||
bb_start_la = ppc_next_instruction_address;
|
||||
pc_real = quickinstruction_translate(bb_start_la);
|
||||
page_start = bb_start_la & 0xFFFFF000;
|
||||
ppc_state.ppc_pc = bb_start_la;
|
||||
ppc_state.prog_counter = bb_start_la;
|
||||
bb_kind = BB_end_kind::BB_NONE;
|
||||
goto again;
|
||||
}
|
||||
@ -614,21 +614,21 @@ again:
|
||||
while (power_on) {
|
||||
ppc_main_opcode();
|
||||
if (bb_kind != BB_end_kind::BB_NONE) {
|
||||
timebase_counter += (ppc_state.ppc_pc - bb_start_la) >> 2;
|
||||
timebase_counter += (ppc_state.prog_counter - bb_start_la) >> 2;
|
||||
bb_start_la = ppc_next_instruction_address;
|
||||
if ((ppc_next_instruction_address & 0xFFFFF000) != page_start) {
|
||||
page_start = bb_start_la & 0xFFFFF000;
|
||||
pc_real = quickinstruction_translate(bb_start_la);
|
||||
}
|
||||
else {
|
||||
pc_real += (int)bb_start_la - (int)ppc_state.ppc_pc;
|
||||
pc_real += (int)bb_start_la - (int)ppc_state.prog_counter;
|
||||
ppc_set_cur_instruction(pc_real);
|
||||
}
|
||||
ppc_state.ppc_pc = bb_start_la;
|
||||
ppc_state.prog_counter = bb_start_la;
|
||||
bb_kind = BB_end_kind::BB_NONE;
|
||||
}
|
||||
else {
|
||||
ppc_state.ppc_pc += 4;
|
||||
ppc_state.prog_counter += 4;
|
||||
pc_real += 4;
|
||||
ppc_set_cur_instruction(pc_real);
|
||||
}
|
||||
@ -640,22 +640,22 @@ again:
|
||||
#if 0
|
||||
void ppc_exec_single()
|
||||
{
|
||||
quickinstruction_translate(ppc_state.ppc_pc);
|
||||
quickinstruction_translate(ppc_state.prog_counter);
|
||||
ppc_main_opcode();
|
||||
if (grab_branch && !grab_exception) {
|
||||
ppc_state.ppc_pc = ppc_next_instruction_address;
|
||||
ppc_state.prog_counter = ppc_next_instruction_address;
|
||||
grab_branch = 0;
|
||||
ppc_tbr_update();
|
||||
tbr_update();
|
||||
}
|
||||
else if (grab_return || grab_exception) {
|
||||
ppc_state.ppc_pc = ppc_next_instruction_address;
|
||||
ppc_state.prog_counter = ppc_next_instruction_address;
|
||||
grab_exception = 0;
|
||||
grab_return = 0;
|
||||
ppc_tbr_update();
|
||||
tbr_update();
|
||||
}
|
||||
else {
|
||||
ppc_state.ppc_pc += 4;
|
||||
ppc_tbr_update();
|
||||
ppc_state.prog_counter += 4;
|
||||
tbr_update();
|
||||
}
|
||||
}
|
||||
#else
|
||||
@ -664,19 +664,19 @@ void ppc_exec_single()
|
||||
if (setjmp(exc_env)) {
|
||||
/* reaching here means we got a low-level exception */
|
||||
timebase_counter += 1;
|
||||
ppc_state.ppc_pc = ppc_next_instruction_address;
|
||||
ppc_state.prog_counter = ppc_next_instruction_address;
|
||||
bb_kind = BB_end_kind::BB_NONE;
|
||||
return;
|
||||
}
|
||||
|
||||
quickinstruction_translate(ppc_state.ppc_pc);
|
||||
quickinstruction_translate(ppc_state.prog_counter);
|
||||
ppc_main_opcode();
|
||||
if (bb_kind != BB_end_kind::BB_NONE) {
|
||||
ppc_state.ppc_pc = ppc_next_instruction_address;
|
||||
ppc_state.prog_counter = ppc_next_instruction_address;
|
||||
bb_kind = BB_end_kind::BB_NONE;
|
||||
}
|
||||
else {
|
||||
ppc_state.ppc_pc += 4;
|
||||
ppc_state.prog_counter += 4;
|
||||
}
|
||||
timebase_counter += 1;
|
||||
}
|
||||
@ -686,23 +686,23 @@ void ppc_exec_single()
|
||||
#if 0
|
||||
void ppc_exec_until(uint32_t goal_addr)
|
||||
{
|
||||
while (ppc_state.ppc_pc != goal_addr) {
|
||||
quickinstruction_translate(ppc_state.ppc_pc);
|
||||
while (ppc_state.prog_counter != goal_addr) {
|
||||
quickinstruction_translate(ppc_state.prog_counter);
|
||||
ppc_main_opcode();
|
||||
if (grab_branch && !grab_exception) {
|
||||
ppc_state.ppc_pc = ppc_next_instruction_address;
|
||||
ppc_state.prog_counter = ppc_next_instruction_address;
|
||||
grab_branch = 0;
|
||||
ppc_tbr_update();
|
||||
tbr_update();
|
||||
}
|
||||
else if (grab_return || grab_exception) {
|
||||
ppc_state.ppc_pc = ppc_next_instruction_address;
|
||||
ppc_state.prog_counter = ppc_next_instruction_address;
|
||||
grab_exception = 0;
|
||||
grab_return = 0;
|
||||
ppc_tbr_update();
|
||||
tbr_update();
|
||||
}
|
||||
else {
|
||||
ppc_state.ppc_pc += 4;
|
||||
ppc_tbr_update();
|
||||
ppc_state.prog_counter += 4;
|
||||
tbr_update();
|
||||
}
|
||||
ppc_cur_instruction = 0;
|
||||
}
|
||||
@ -714,16 +714,16 @@ void ppc_exec_until(uint32_t goal_addr)
|
||||
uint8_t* pc_real;
|
||||
|
||||
/* start new basic block */
|
||||
bb_start_la = ppc_state.ppc_pc;
|
||||
bb_start_la = ppc_state.prog_counter;
|
||||
bb_kind = BB_end_kind::BB_NONE;
|
||||
|
||||
if (setjmp(exc_env)) {
|
||||
/* reaching here means we got a low-level exception */
|
||||
timebase_counter += (ppc_state.ppc_pc - bb_start_la) >> 2;
|
||||
timebase_counter += (ppc_state.prog_counter - bb_start_la) >> 2;
|
||||
bb_start_la = ppc_next_instruction_address;
|
||||
pc_real = quickinstruction_translate(bb_start_la);
|
||||
page_start = bb_start_la & 0xFFFFF000;
|
||||
ppc_state.ppc_pc = bb_start_la;
|
||||
ppc_state.prog_counter = bb_start_la;
|
||||
bb_kind = BB_end_kind::BB_NONE;
|
||||
goto again;
|
||||
}
|
||||
@ -735,24 +735,24 @@ void ppc_exec_until(uint32_t goal_addr)
|
||||
page_start = bb_start_la & 0xFFFFF000;
|
||||
|
||||
again:
|
||||
while (ppc_state.ppc_pc != goal_addr) {
|
||||
while (ppc_state.prog_counter != goal_addr) {
|
||||
ppc_main_opcode();
|
||||
if (bb_kind != BB_end_kind::BB_NONE) {
|
||||
timebase_counter += (ppc_state.ppc_pc - bb_start_la) >> 2;
|
||||
timebase_counter += (ppc_state.prog_counter - bb_start_la) >> 2;
|
||||
bb_start_la = ppc_next_instruction_address;
|
||||
if ((ppc_next_instruction_address & 0xFFFFF000) != page_start) {
|
||||
page_start = bb_start_la & 0xFFFFF000;
|
||||
pc_real = quickinstruction_translate(bb_start_la);
|
||||
}
|
||||
else {
|
||||
pc_real += (int)bb_start_la - (int)ppc_state.ppc_pc;
|
||||
pc_real += (int)bb_start_la - (int)ppc_state.prog_counter;
|
||||
ppc_set_cur_instruction(pc_real);
|
||||
}
|
||||
ppc_state.ppc_pc = bb_start_la;
|
||||
ppc_state.prog_counter = bb_start_la;
|
||||
bb_kind = BB_end_kind::BB_NONE;
|
||||
}
|
||||
else {
|
||||
ppc_state.ppc_pc += 4;
|
||||
ppc_state.prog_counter += 4;
|
||||
pc_real += 4;
|
||||
ppc_set_cur_instruction(pc_real);
|
||||
}
|
||||
@ -770,68 +770,68 @@ void ppc_cpu_init(uint32_t proc_version)
|
||||
/* zero all GPRs as prescribed for MPC601 */
|
||||
/* For later PPC CPUs, GPR content is undefined */
|
||||
for (i = 0; i < 32; i++) {
|
||||
ppc_state.ppc_gpr[i] = 0;
|
||||
ppc_state.gpr[i] = 0;
|
||||
}
|
||||
|
||||
/* zero all FPRs as prescribed for MPC601 */
|
||||
/* For later PPC CPUs, GPR content is undefined */
|
||||
for (i = 0; i < 32; i++) {
|
||||
ppc_state.ppc_fpr[i].int64_r = 0;
|
||||
ppc_state.fpr[i].int64_r = 0;
|
||||
}
|
||||
|
||||
/* zero all segment registers as prescribed for MPC601 */
|
||||
/* For later PPC CPUs, SR content is undefined */
|
||||
for (i = 0; i < 16; i++) {
|
||||
ppc_state.ppc_sr[i] = 0;
|
||||
ppc_state.sr[i] = 0;
|
||||
}
|
||||
|
||||
ppc_state.ppc_cr = 0;
|
||||
ppc_state.ppc_fpscr = 0;
|
||||
ppc_state.cr = 0;
|
||||
ppc_state.fpscr = 0;
|
||||
|
||||
ppc_state.ppc_pc = 0;
|
||||
ppc_state.prog_counter = 0;
|
||||
|
||||
ppc_state.ppc_tbr[0] = 0;
|
||||
ppc_state.ppc_tbr[1] = 0;
|
||||
ppc_state.tbr[0] = 0;
|
||||
ppc_state.tbr[1] = 0;
|
||||
|
||||
/* zero all SPRs */
|
||||
for (i = 0; i < 1024; i++) {
|
||||
ppc_state.ppc_spr[i] = 0;
|
||||
ppc_state.spr[i] = 0;
|
||||
}
|
||||
|
||||
ppc_state.ppc_spr[SPR::PVR] = proc_version;
|
||||
ppc_state.spr[SPR::PVR] = proc_version;
|
||||
|
||||
if ((proc_version & 0xFFFF0000) == 0x00010000) {
|
||||
/* MPC601 sets MSR[ME] bit during hard reset / Power-On */
|
||||
ppc_state.ppc_msr = 0x1040;
|
||||
ppc_state.msr = 0x1040;
|
||||
} else {
|
||||
ppc_state.ppc_msr = 0x40;
|
||||
ppc_state.ppc_spr[SPR::DEC] = 0xFFFFFFFFUL;
|
||||
ppc_state.msr = 0x40;
|
||||
ppc_state.spr[SPR::DEC] = 0xFFFFFFFFUL;
|
||||
}
|
||||
|
||||
ppc_mmu_init();
|
||||
|
||||
/* redirect code execution to reset vector */
|
||||
ppc_state.ppc_pc = 0xFFF00100;
|
||||
ppc_state.prog_counter = 0xFFF00100;
|
||||
}
|
||||
|
||||
void print_gprs()
|
||||
{
|
||||
for (int i = 0; i < 32; i++)
|
||||
cout << "GPR " << dec << i << " : " << uppercase << hex
|
||||
<< ppc_state.ppc_gpr[i] << endl;
|
||||
<< ppc_state.gpr[i] << endl;
|
||||
|
||||
cout << "PC: " << uppercase << hex << ppc_state.ppc_pc << endl;
|
||||
cout << "LR: " << uppercase << hex << ppc_state.ppc_spr[SPR::LR] << endl;
|
||||
cout << "CR: " << uppercase << hex << ppc_state.ppc_cr << endl;
|
||||
cout << "CTR: " << uppercase << hex << ppc_state.ppc_spr[SPR::CTR] << endl;
|
||||
cout << "XER: " << uppercase << hex << ppc_state.ppc_spr[SPR::XER] << endl;
|
||||
cout << "MSR: " << uppercase << hex << ppc_state.ppc_msr << endl;
|
||||
cout << "PC: " << uppercase << hex << ppc_state.prog_counter << endl;
|
||||
cout << "LR: " << uppercase << hex << ppc_state.spr[SPR::LR] << endl;
|
||||
cout << "CR: " << uppercase << hex << ppc_state.cr << endl;
|
||||
cout << "CTR: " << uppercase << hex << ppc_state.spr[SPR::CTR] << endl;
|
||||
cout << "XER: " << uppercase << hex << ppc_state.spr[SPR::XER] << endl;
|
||||
cout << "MSR: " << uppercase << hex << ppc_state.msr << endl;
|
||||
}
|
||||
|
||||
void print_fprs()
|
||||
{
|
||||
for (int i = 0; i < 32; i++)
|
||||
cout << "FPR " << dec << i << " : " << ppc_state.ppc_fpr[i].dbl64_r << endl;
|
||||
cout << "FPR " << dec << i << " : " << ppc_state.fpr[i].dbl64_r << endl;
|
||||
}
|
||||
|
||||
static map<string, int> SPRName2Num = {
|
||||
@ -858,23 +858,23 @@ uint64_t reg_op(string ®_name, uint64_t val, bool is_write)
|
||||
try {
|
||||
if (reg_name_u == "PC") {
|
||||
if (is_write)
|
||||
ppc_state.ppc_pc = val;
|
||||
return ppc_state.ppc_pc;
|
||||
ppc_state.prog_counter = val;
|
||||
return ppc_state.prog_counter;
|
||||
}
|
||||
if (reg_name_u == "MSR") {
|
||||
if (is_write)
|
||||
ppc_state.ppc_msr = val;
|
||||
return ppc_state.ppc_msr;
|
||||
ppc_state.msr = val;
|
||||
return ppc_state.msr;
|
||||
}
|
||||
if (reg_name_u == "CR") {
|
||||
if (is_write)
|
||||
ppc_state.ppc_cr = val;
|
||||
return ppc_state.ppc_cr;
|
||||
ppc_state.cr = val;
|
||||
return ppc_state.cr;
|
||||
}
|
||||
if (reg_name_u == "FPSCR") {
|
||||
if (is_write)
|
||||
ppc_state.ppc_fpscr = val;
|
||||
return ppc_state.ppc_fpscr;
|
||||
ppc_state.fpscr = val;
|
||||
return ppc_state.fpscr;
|
||||
}
|
||||
|
||||
if (reg_name_u.substr(0, 1) == "R") {
|
||||
@ -882,8 +882,8 @@ uint64_t reg_op(string ®_name, uint64_t val, bool is_write)
|
||||
reg_num = stoul(reg_num_str, NULL, 0);
|
||||
if (reg_num < 32) {
|
||||
if (is_write)
|
||||
ppc_state.ppc_gpr[reg_num] = val;
|
||||
return ppc_state.ppc_gpr[reg_num];
|
||||
ppc_state.gpr[reg_num] = val;
|
||||
return ppc_state.gpr[reg_num];
|
||||
}
|
||||
}
|
||||
|
||||
@ -892,8 +892,8 @@ uint64_t reg_op(string ®_name, uint64_t val, bool is_write)
|
||||
reg_num = stoul(reg_num_str, NULL, 0);
|
||||
if (reg_num < 32) {
|
||||
if (is_write)
|
||||
ppc_state.ppc_fpr[reg_num].int64_r = val;
|
||||
return ppc_state.ppc_fpr[reg_num].int64_r;
|
||||
ppc_state.fpr[reg_num].int64_r = val;
|
||||
return ppc_state.fpr[reg_num].int64_r;
|
||||
}
|
||||
}
|
||||
|
||||
@ -902,8 +902,8 @@ uint64_t reg_op(string ®_name, uint64_t val, bool is_write)
|
||||
reg_num = stoul(reg_num_str, NULL, 0);
|
||||
if (reg_num < 1024) {
|
||||
if (is_write)
|
||||
ppc_state.ppc_spr[reg_num] = val;
|
||||
return ppc_state.ppc_spr[reg_num];
|
||||
ppc_state.spr[reg_num] = val;
|
||||
return ppc_state.spr[reg_num];
|
||||
}
|
||||
}
|
||||
|
||||
@ -912,16 +912,16 @@ uint64_t reg_op(string ®_name, uint64_t val, bool is_write)
|
||||
reg_num = stoul(reg_num_str, NULL, 0);
|
||||
if (reg_num < 16) {
|
||||
if (is_write)
|
||||
ppc_state.ppc_sr[reg_num] = val;
|
||||
return ppc_state.ppc_sr[reg_num];
|
||||
ppc_state.sr[reg_num] = val;
|
||||
return ppc_state.sr[reg_num];
|
||||
}
|
||||
}
|
||||
|
||||
spr = SPRName2Num.find(reg_name_u);
|
||||
if (spr != SPRName2Num.end()) {
|
||||
if (is_write)
|
||||
ppc_state.ppc_spr[spr->second] = val;
|
||||
return ppc_state.ppc_spr[spr->second];
|
||||
ppc_state.spr[spr->second] = val;
|
||||
return ppc_state.spr[spr->second];
|
||||
}
|
||||
}
|
||||
catch (...) {
|
||||
|
@ -51,32 +51,32 @@ double qnan = std::numeric_limits<double>::quiet_NaN();
|
||||
//Storage and register retrieval functions for the floating point functions.
|
||||
|
||||
double fp_return_double(uint32_t reg) {
|
||||
return ppc_state.ppc_fpr[reg].dbl64_r;
|
||||
return ppc_state.fpr[reg].dbl64_r;
|
||||
}
|
||||
|
||||
uint64_t fp_return_uint64(uint32_t reg) {
|
||||
return ppc_state.ppc_fpr[reg].int64_r;
|
||||
return ppc_state.fpr[reg].int64_r;
|
||||
}
|
||||
|
||||
void ppc_store_sfpresult(bool int_rep) {
|
||||
if (int_rep) {
|
||||
ppc_state.ppc_fpr[reg_d].int64_r = ppc_result64_d;
|
||||
ppc_state.ppc_fpr[reg_d].dbl64_r = *(double*)&ppc_result64_d;
|
||||
ppc_state.fpr[reg_d].int64_r = ppc_result64_d;
|
||||
ppc_state.fpr[reg_d].dbl64_r = *(double*)&ppc_result64_d;
|
||||
}
|
||||
else {
|
||||
ppc_state.ppc_fpr[reg_d].dbl64_r = ppc_dblresult64_d;
|
||||
ppc_state.ppc_fpr[reg_d].int64_r = *(uint64_t*)&ppc_dblresult64_d;
|
||||
ppc_state.fpr[reg_d].dbl64_r = ppc_dblresult64_d;
|
||||
ppc_state.fpr[reg_d].int64_r = *(uint64_t*)&ppc_dblresult64_d;
|
||||
}
|
||||
}
|
||||
|
||||
void ppc_store_dfpresult(bool int_rep) {
|
||||
if (int_rep) {
|
||||
ppc_state.ppc_fpr[reg_d].int64_r = ppc_result64_d;
|
||||
ppc_state.ppc_fpr[reg_d].dbl64_r = *(double*)&ppc_result64_d;
|
||||
ppc_state.fpr[reg_d].int64_r = ppc_result64_d;
|
||||
ppc_state.fpr[reg_d].dbl64_r = *(double*)&ppc_result64_d;
|
||||
}
|
||||
else {
|
||||
ppc_state.ppc_fpr[reg_d].dbl64_r = ppc_dblresult64_d;
|
||||
ppc_state.ppc_fpr[reg_d].int64_r = *(uint64_t*)&ppc_dblresult64_d;
|
||||
ppc_state.fpr[reg_d].dbl64_r = ppc_dblresult64_d;
|
||||
ppc_state.fpr[reg_d].int64_r = *(uint64_t*)&ppc_dblresult64_d;
|
||||
}
|
||||
}
|
||||
|
||||
@ -84,10 +84,10 @@ void ppc_grab_regsfpdb(bool int_rep) {
|
||||
reg_d = (ppc_cur_instruction >> 21) & 31;
|
||||
reg_b = (ppc_cur_instruction >> 11) & 31;
|
||||
if (int_rep) {
|
||||
ppc_result64_b = ppc_state.ppc_fpr[reg_b].int64_r;
|
||||
ppc_result64_b = ppc_state.fpr[reg_b].int64_r;
|
||||
}
|
||||
else {
|
||||
ppc_dblresult64_b = ppc_state.ppc_fpr[reg_b].dbl64_r;
|
||||
ppc_dblresult64_b = ppc_state.fpr[reg_b].dbl64_r;
|
||||
}
|
||||
}
|
||||
|
||||
@ -98,30 +98,30 @@ void ppc_grab_regsfpdiab(bool int_rep) {
|
||||
if (int_rep == true) {
|
||||
|
||||
}
|
||||
ppc_result_a = ppc_state.ppc_gpr[reg_a];
|
||||
ppc_result_b = ppc_state.ppc_gpr[reg_b];
|
||||
ppc_result_a = ppc_state.gpr[reg_a];
|
||||
ppc_result_b = ppc_state.gpr[reg_b];
|
||||
}
|
||||
|
||||
void ppc_grab_regsfpdia(bool int_rep) {
|
||||
reg_d = (ppc_cur_instruction >> 21) & 31;
|
||||
reg_a = (ppc_cur_instruction >> 16) & 31;
|
||||
ppc_result_a = ppc_state.ppc_gpr[reg_a];
|
||||
ppc_result_a = ppc_state.gpr[reg_a];
|
||||
}
|
||||
|
||||
void ppc_grab_regsfpsia(bool int_rep) {
|
||||
reg_s = (ppc_cur_instruction >> 21) & 31;
|
||||
reg_a = (ppc_cur_instruction >> 16) & 31;
|
||||
ppc_result_d = ppc_state.ppc_gpr[reg_s];
|
||||
ppc_result_a = ppc_state.ppc_gpr[reg_a];
|
||||
ppc_result_d = ppc_state.gpr[reg_s];
|
||||
ppc_result_a = ppc_state.gpr[reg_a];
|
||||
}
|
||||
|
||||
void ppc_grab_regsfpsiab(bool int_rep) {
|
||||
reg_s = (ppc_cur_instruction >> 21) & 31;
|
||||
reg_a = (ppc_cur_instruction >> 16) & 31;
|
||||
reg_b = (ppc_cur_instruction >> 11) & 31;
|
||||
ppc_result64_d = ppc_state.ppc_fpr[reg_s].int64_r;
|
||||
ppc_result_a = ppc_state.ppc_gpr[reg_a];
|
||||
ppc_result_b = ppc_state.ppc_gpr[reg_b];
|
||||
ppc_result64_d = ppc_state.fpr[reg_s].int64_r;
|
||||
ppc_result_a = ppc_state.gpr[reg_a];
|
||||
ppc_result_b = ppc_state.gpr[reg_b];
|
||||
}
|
||||
|
||||
void ppc_grab_regsfpsab(bool int_rep) {
|
||||
@ -129,9 +129,9 @@ void ppc_grab_regsfpsab(bool int_rep) {
|
||||
reg_a = (ppc_cur_instruction >> 16) & 31;
|
||||
reg_b = (ppc_cur_instruction >> 11) & 31;
|
||||
if (int_rep) {
|
||||
ppc_result64_d = ppc_state.ppc_fpr[reg_s].int64_r;
|
||||
ppc_result64_a = ppc_state.ppc_fpr[reg_a].int64_r;
|
||||
ppc_result64_b = ppc_state.ppc_fpr[reg_b].int64_r;
|
||||
ppc_result64_d = ppc_state.fpr[reg_s].int64_r;
|
||||
ppc_result64_a = ppc_state.fpr[reg_a].int64_r;
|
||||
ppc_result64_b = ppc_state.fpr[reg_b].int64_r;
|
||||
}
|
||||
else {
|
||||
ppc_dblresult64_d = fp_return_double(reg_s);
|
||||
@ -186,35 +186,35 @@ void ppc_grab_regsfpdabc(bool int_rep) {
|
||||
}
|
||||
|
||||
void fp_save_float(float entry) {
|
||||
ppc_state.ppc_fpr[reg_d].dbl64_r = (double)entry;
|
||||
ppc_state.ppc_fpr[reg_d].int64_r = (uint64_t)entry;
|
||||
ppc_state.fpr[reg_d].dbl64_r = (double)entry;
|
||||
ppc_state.fpr[reg_d].int64_r = (uint64_t)entry;
|
||||
}
|
||||
|
||||
void fp_save_double(double entry) {
|
||||
ppc_state.ppc_fpr[reg_d].dbl64_r = entry;
|
||||
ppc_state.ppc_fpr[reg_d].int64_r = *(uint64_t*)&entry;
|
||||
ppc_state.fpr[reg_d].dbl64_r = entry;
|
||||
ppc_state.fpr[reg_d].int64_r = *(uint64_t*)&entry;
|
||||
}
|
||||
|
||||
void fp_save_uint64(uint64_t entry) {
|
||||
ppc_state.ppc_fpr[reg_d].int64_r = entry;
|
||||
ppc_state.ppc_fpr[reg_d].dbl64_r = (double)entry;
|
||||
ppc_state.fpr[reg_d].int64_r = entry;
|
||||
ppc_state.fpr[reg_d].dbl64_r = (double)entry;
|
||||
}
|
||||
|
||||
void fp_save_uint32(uint32_t entry) {
|
||||
ppc_state.ppc_fpr[reg_d].int64_r = entry;
|
||||
ppc_state.ppc_fpr[reg_d].dbl64_r = (double)entry;
|
||||
ppc_state.fpr[reg_d].int64_r = entry;
|
||||
ppc_state.fpr[reg_d].dbl64_r = (double)entry;
|
||||
|
||||
}
|
||||
|
||||
void ppc_fp_changecrf1() {
|
||||
ppc_state.ppc_fpscr |= 0xf0000000;
|
||||
ppc_state.fpscr |= 0xf0000000;
|
||||
}
|
||||
|
||||
void ppc_divbyzero(uint64_t input_a, uint64_t input_b, bool is_single) {
|
||||
if (input_b == 0) {
|
||||
ppc_state.ppc_fpscr |= 0x84000000;
|
||||
ppc_state.fpscr |= 0x84000000;
|
||||
if (input_a == 0) {
|
||||
ppc_state.ppc_fpscr |= 0x200000;
|
||||
ppc_state.fpscr |= 0x200000;
|
||||
}
|
||||
}
|
||||
}
|
||||
@ -241,47 +241,47 @@ int64_t round_to_neg_inf(double f) {
|
||||
}
|
||||
|
||||
void ppc_toggle_fpscr_fex() {
|
||||
bool fex_result = ((ppc_state.ppc_fpscr & 0x20000000) & (ppc_state.ppc_fpscr & 0x80));
|
||||
fex_result |= ((ppc_state.ppc_fpscr & 0x10000000) & (ppc_state.ppc_fpscr & 0x40));
|
||||
fex_result |= ((ppc_state.ppc_fpscr & 0x8000000) & (ppc_state.ppc_fpscr & 0x20));
|
||||
fex_result |= ((ppc_state.ppc_fpscr & 0x4000000) & (ppc_state.ppc_fpscr & 0x10));
|
||||
fex_result |= ((ppc_state.ppc_fpscr & 0x2000000) & (ppc_state.ppc_fpscr & 0x8));
|
||||
ppc_state.ppc_fpscr |= (fex_result << 30);
|
||||
bool fex_result = ((ppc_state.fpscr & 0x20000000) & (ppc_state.fpscr & 0x80));
|
||||
fex_result |= ((ppc_state.fpscr & 0x10000000) & (ppc_state.fpscr & 0x40));
|
||||
fex_result |= ((ppc_state.fpscr & 0x8000000) & (ppc_state.fpscr & 0x20));
|
||||
fex_result |= ((ppc_state.fpscr & 0x4000000) & (ppc_state.fpscr & 0x10));
|
||||
fex_result |= ((ppc_state.fpscr & 0x2000000) & (ppc_state.fpscr & 0x8));
|
||||
ppc_state.fpscr |= (fex_result << 30);
|
||||
}
|
||||
|
||||
bool ppc_confirm_inf_nan(uint32_t chosen_reg_1, uint32_t chosen_reg_2, bool is_single, uint32_t op) {
|
||||
uint64_t input_a = ppc_state.ppc_fpr[chosen_reg_1].int64_r;
|
||||
uint64_t input_b = ppc_state.ppc_fpr[chosen_reg_2].int64_r;
|
||||
uint64_t input_a = ppc_state.fpr[chosen_reg_1].int64_r;
|
||||
uint64_t input_b = ppc_state.fpr[chosen_reg_2].int64_r;
|
||||
|
||||
if (is_single) {
|
||||
uint32_t exp_a = (input_a >> 23) & 0xff;
|
||||
uint32_t exp_b = (input_b >> 23) & 0xff;
|
||||
|
||||
ppc_state.ppc_fpscr &= 0x7fbfffff;
|
||||
ppc_state.fpscr &= 0x7fbfffff;
|
||||
|
||||
switch (op) {
|
||||
case 36:
|
||||
if ((exp_a == 0xff) & (exp_b == 0xff)) {
|
||||
ppc_state.ppc_fpscr |= 0x80400000;
|
||||
ppc_state.fpscr |= 0x80400000;
|
||||
ppc_toggle_fpscr_fex();
|
||||
return true;
|
||||
}
|
||||
else if ((input_a == 0) & (input_b == 0)) {
|
||||
ppc_state.ppc_fpscr |= 0x80200000;
|
||||
ppc_state.fpscr |= 0x80200000;
|
||||
ppc_toggle_fpscr_fex();
|
||||
return true;
|
||||
}
|
||||
break;
|
||||
case 40:
|
||||
if ((exp_a == 0xff) & (exp_b == 0xff)) {
|
||||
ppc_state.ppc_fpscr |= 0x80800000;
|
||||
ppc_state.fpscr |= 0x80800000;
|
||||
ppc_toggle_fpscr_fex();
|
||||
return true;
|
||||
}
|
||||
break;
|
||||
case 50:
|
||||
if (((exp_a == 0xff) & (input_b == 0)) | ((exp_b == 0xff) & (input_a == 0))) {
|
||||
ppc_state.ppc_fpscr |= 0x80100000;
|
||||
ppc_state.fpscr |= 0x80100000;
|
||||
ppc_toggle_fpscr_fex();
|
||||
return true;
|
||||
}
|
||||
@ -289,7 +289,7 @@ bool ppc_confirm_inf_nan(uint32_t chosen_reg_1, uint32_t chosen_reg_2, bool is_s
|
||||
case 56:
|
||||
case 58:
|
||||
if ((exp_a == 0xff) & (exp_b == 0xff)) {
|
||||
ppc_state.ppc_fpscr |= 0x80800000;
|
||||
ppc_state.fpscr |= 0x80800000;
|
||||
ppc_toggle_fpscr_fex();
|
||||
return true;
|
||||
}
|
||||
@ -302,31 +302,31 @@ bool ppc_confirm_inf_nan(uint32_t chosen_reg_1, uint32_t chosen_reg_2, bool is_s
|
||||
uint32_t exp_a = (input_a >> 52) & 0x7ff;
|
||||
uint32_t exp_b = (input_b >> 52) & 0x7ff;
|
||||
|
||||
ppc_state.ppc_fpscr &= 0x7fbfffff;
|
||||
ppc_state.fpscr &= 0x7fbfffff;
|
||||
|
||||
switch (op) {
|
||||
case 36:
|
||||
if ((exp_a == 0x7ff) & (exp_b == 0x7ff)) {
|
||||
ppc_state.ppc_fpscr |= 0x80400000;
|
||||
ppc_state.fpscr |= 0x80400000;
|
||||
ppc_toggle_fpscr_fex();
|
||||
return true;
|
||||
}
|
||||
else if ((input_a == 0) & (input_b == 0)) {
|
||||
ppc_state.ppc_fpscr |= 0x80200000;
|
||||
ppc_state.fpscr |= 0x80200000;
|
||||
ppc_toggle_fpscr_fex();
|
||||
return true;
|
||||
}
|
||||
break;
|
||||
case 40:
|
||||
if ((exp_a == 0x7ff) & (exp_b == 0x7ff)) {
|
||||
ppc_state.ppc_fpscr |= 0x80800000;
|
||||
ppc_state.fpscr |= 0x80800000;
|
||||
ppc_toggle_fpscr_fex();
|
||||
return true;
|
||||
}
|
||||
break;
|
||||
case 50:
|
||||
if (((exp_a == 0x7ff) & (input_b == 0)) | ((exp_b == 0x7ff) & (input_a == 0))) {
|
||||
ppc_state.ppc_fpscr |= 0x80100000;
|
||||
ppc_state.fpscr |= 0x80100000;
|
||||
ppc_toggle_fpscr_fex();
|
||||
return true;
|
||||
}
|
||||
@ -334,7 +334,7 @@ bool ppc_confirm_inf_nan(uint32_t chosen_reg_1, uint32_t chosen_reg_2, bool is_s
|
||||
case 56:
|
||||
case 58:
|
||||
if ((exp_a == 0xff) & (exp_b == 0xff)) {
|
||||
ppc_state.ppc_fpscr |= 0x80800000;
|
||||
ppc_state.fpscr |= 0x80800000;
|
||||
ppc_toggle_fpscr_fex();
|
||||
return true;
|
||||
}
|
||||
@ -347,31 +347,31 @@ bool ppc_confirm_inf_nan(uint32_t chosen_reg_1, uint32_t chosen_reg_2, bool is_s
|
||||
return false;
|
||||
}
|
||||
|
||||
void ppc_fpresult_update(uint64_t set_result, bool confirm_arc) {
|
||||
void fpresult_update(uint64_t set_result, bool confirm_arc) {
|
||||
|
||||
bool confirm_ov = (bool)std::fetestexcept(FE_OVERFLOW);
|
||||
|
||||
if (confirm_ov) {
|
||||
ppc_state.ppc_fpscr |= 0x80001000;
|
||||
ppc_state.fpscr |= 0x80001000;
|
||||
}
|
||||
|
||||
if (confirm_arc) {
|
||||
ppc_state.ppc_fpscr |= 0x80010000;
|
||||
ppc_state.ppc_fpscr &= 0xFFFF0FFF;
|
||||
ppc_state.fpscr |= 0x80010000;
|
||||
ppc_state.fpscr &= 0xFFFF0FFF;
|
||||
|
||||
|
||||
if (set_result == 0) {
|
||||
ppc_state.ppc_fpscr |= 0x2000;
|
||||
ppc_state.fpscr |= 0x2000;
|
||||
}
|
||||
else {
|
||||
if (set_result < 0) {
|
||||
ppc_state.ppc_fpscr |= 0x8000;
|
||||
ppc_state.fpscr |= 0x8000;
|
||||
}
|
||||
else if (set_result > 0) {
|
||||
ppc_state.ppc_fpscr |= 0x4000;
|
||||
ppc_state.fpscr |= 0x4000;
|
||||
}
|
||||
else {
|
||||
ppc_state.ppc_fpscr |= 0x1000;
|
||||
ppc_state.fpscr |= 0x1000;
|
||||
}
|
||||
}
|
||||
}
|
||||
@ -385,8 +385,8 @@ void ppc_frsqrte_result() {
|
||||
}
|
||||
|
||||
void ppc_changecrf1() {
|
||||
ppc_state.ppc_cr &= 0xF0FFFFFF;
|
||||
ppc_state.ppc_cr |= (ppc_state.ppc_fpscr & 0xF0000000) >> 4;
|
||||
ppc_state.cr &= 0xF0FFFFFF;
|
||||
ppc_state.cr |= (ppc_state.fpscr & 0xF0000000) >> 4;
|
||||
}
|
||||
|
||||
//Floating Point Arithmetic
|
||||
@ -989,7 +989,7 @@ void ppc_fresdot() {
|
||||
void ppc_fctiw() {
|
||||
ppc_grab_regsfpdb(false);
|
||||
|
||||
switch (ppc_state.ppc_fpscr & 0x3) {
|
||||
switch (ppc_state.fpscr & 0x3) {
|
||||
case 0:
|
||||
ppc_result64_d = round_to_nearest(ppc_dblresult64_b);
|
||||
case 1:
|
||||
@ -1007,7 +1007,7 @@ void ppc_fctiw() {
|
||||
void ppc_fctiwdot() {
|
||||
ppc_grab_regsfpdb(false);
|
||||
|
||||
switch (ppc_state.ppc_fpscr & 0x3) {
|
||||
switch (ppc_state.fpscr & 0x3) {
|
||||
case 0:
|
||||
ppc_result64_d = round_to_nearest(ppc_dblresult64_b);
|
||||
case 1:
|
||||
@ -1132,7 +1132,7 @@ void ppc_stfs() {
|
||||
ppc_grab_regsfpsia(true);
|
||||
ppc_effective_address = (int32_t)((int16_t)(ppc_cur_instruction & 0xFFFF));
|
||||
ppc_effective_address += (reg_a > 0) ? ppc_result_a : 0;
|
||||
mem_write_dword(ppc_effective_address, uint32_t(ppc_state.ppc_fpr[reg_s].int64_r));
|
||||
mem_write_dword(ppc_effective_address, uint32_t(ppc_state.fpr[reg_s].int64_r));
|
||||
}
|
||||
|
||||
void ppc_stfsu() {
|
||||
@ -1140,7 +1140,7 @@ void ppc_stfsu() {
|
||||
if (reg_a == 0) {
|
||||
ppc_effective_address = (int32_t)((int16_t)(ppc_cur_instruction & 0xFFFF));
|
||||
ppc_effective_address += ppc_result_a;
|
||||
mem_write_dword(ppc_effective_address, uint32_t(ppc_state.ppc_fpr[reg_s].int64_r));
|
||||
mem_write_dword(ppc_effective_address, uint32_t(ppc_state.fpr[reg_s].int64_r));
|
||||
ppc_result_a = ppc_effective_address;
|
||||
ppc_store_result_rega();
|
||||
}
|
||||
@ -1152,14 +1152,14 @@ void ppc_stfsu() {
|
||||
void ppc_stfsx() {
|
||||
ppc_grab_regsfpsiab(true);
|
||||
ppc_effective_address = (reg_a == 0) ? ppc_result_b : ppc_result_a + ppc_result_b;
|
||||
mem_write_dword(ppc_effective_address, uint32_t(ppc_state.ppc_fpr[reg_s].int64_r));
|
||||
mem_write_dword(ppc_effective_address, uint32_t(ppc_state.fpr[reg_s].int64_r));
|
||||
}
|
||||
|
||||
void ppc_stfsux() {
|
||||
ppc_grab_regsfpsiab(true);
|
||||
if (reg_a == 0) {
|
||||
ppc_effective_address = ppc_result_a + ppc_result_b;
|
||||
mem_write_dword(ppc_effective_address, uint32_t(ppc_state.ppc_fpr[reg_s].int64_r));
|
||||
mem_write_dword(ppc_effective_address, uint32_t(ppc_state.fpr[reg_s].int64_r));
|
||||
ppc_result_a = ppc_effective_address;
|
||||
ppc_store_result_rega();
|
||||
}
|
||||
@ -1172,7 +1172,7 @@ void ppc_stfd() {
|
||||
ppc_grab_regsfpsia(true);
|
||||
ppc_effective_address = (int32_t)((int16_t)(ppc_cur_instruction & 0xFFFF));
|
||||
ppc_effective_address += (reg_a > 0) ? ppc_result_a : 0;
|
||||
mem_write_qword(ppc_effective_address, ppc_state.ppc_fpr[reg_s].int64_r);
|
||||
mem_write_qword(ppc_effective_address, ppc_state.fpr[reg_s].int64_r);
|
||||
}
|
||||
|
||||
void ppc_stfdu() {
|
||||
@ -1180,7 +1180,7 @@ void ppc_stfdu() {
|
||||
if (reg_a == 0) {
|
||||
ppc_effective_address = (int32_t)((int16_t)(ppc_cur_instruction & 0xFFFF));
|
||||
ppc_effective_address += ppc_result_a;
|
||||
mem_write_qword(ppc_effective_address, ppc_state.ppc_fpr[reg_s].int64_r);
|
||||
mem_write_qword(ppc_effective_address, ppc_state.fpr[reg_s].int64_r);
|
||||
ppc_result_a = ppc_effective_address;
|
||||
ppc_store_result_rega();
|
||||
}
|
||||
@ -1192,14 +1192,14 @@ void ppc_stfdu() {
|
||||
void ppc_stfdx() {
|
||||
ppc_grab_regsfpsiab(true);
|
||||
ppc_effective_address = (reg_a == 0) ? ppc_result_b : ppc_result_a + ppc_result_b;
|
||||
mem_write_qword(ppc_effective_address, ppc_state.ppc_fpr[reg_s].int64_r);
|
||||
mem_write_qword(ppc_effective_address, ppc_state.fpr[reg_s].int64_r);
|
||||
}
|
||||
|
||||
void ppc_stfdux() {
|
||||
ppc_grab_regsfpsiab(true);
|
||||
if (reg_a == 0) {
|
||||
ppc_effective_address = ppc_result_a + ppc_result_b;
|
||||
mem_write_qword(ppc_effective_address, ppc_state.ppc_fpr[reg_s].int64_r);
|
||||
mem_write_qword(ppc_effective_address, ppc_state.fpr[reg_s].int64_r);
|
||||
ppc_result_a = ppc_effective_address;
|
||||
ppc_store_result_rega();
|
||||
}
|
||||
@ -1211,30 +1211,30 @@ void ppc_stfdux() {
|
||||
void ppc_stfiwx() {
|
||||
ppc_grab_regsfpsiab(true);
|
||||
ppc_effective_address = (reg_a == 0) ? ppc_result_b : ppc_result_a + ppc_result_b;
|
||||
mem_write_dword(ppc_effective_address, (uint32_t)(ppc_state.ppc_fpr[reg_s].int64_r));
|
||||
mem_write_dword(ppc_effective_address, (uint32_t)(ppc_state.fpr[reg_s].int64_r));
|
||||
}
|
||||
|
||||
//Floating Point Register Transfer
|
||||
|
||||
void ppc_fmr() {
|
||||
ppc_grab_regsfpdb(true);
|
||||
ppc_state.ppc_fpr[reg_d] = ppc_state.ppc_fpr[reg_b];
|
||||
ppc_state.fpr[reg_d] = ppc_state.fpr[reg_b];
|
||||
ppc_store_dfpresult(true);
|
||||
}
|
||||
|
||||
|
||||
void ppc_mffs() {
|
||||
ppc_grab_regsda();
|
||||
uint64_t fpstore1 = ppc_state.ppc_fpr[reg_d].int64_r & 0xFFFFFFFF00000000;
|
||||
uint64_t fpstore2 = ppc_state.ppc_fpscr & 0x00000000FFFFFFFF;
|
||||
uint64_t fpstore1 = ppc_state.fpr[reg_d].int64_r & 0xFFFFFFFF00000000;
|
||||
uint64_t fpstore2 = ppc_state.fpscr & 0x00000000FFFFFFFF;
|
||||
fpstore1 |= fpstore2;
|
||||
fp_save_uint64(fpstore1);
|
||||
}
|
||||
|
||||
void ppc_mffsdot() {
|
||||
ppc_grab_regsda();
|
||||
uint64_t fpstore1 = ppc_state.ppc_fpr[reg_d].int64_r & 0xFFFFFFFF00000000;
|
||||
uint64_t fpstore2 = ppc_state.ppc_fpscr & 0x00000000FFFFFFFF;
|
||||
uint64_t fpstore1 = ppc_state.fpr[reg_d].int64_r & 0xFFFFFFFF00000000;
|
||||
uint64_t fpstore2 = ppc_state.fpscr & 0x00000000FFFFFFFF;
|
||||
fpstore1 |= fpstore2;
|
||||
fp_save_uint64(fpstore1);
|
||||
ppc_fp_changecrf1();
|
||||
@ -1251,8 +1251,8 @@ void ppc_mtfsf() {
|
||||
crm += (((fm_mask >> 5) & 1) == 1) ? 0x00000F00 : 0x00000000;
|
||||
crm += (((fm_mask >> 6) & 1) == 1) ? 0x000000F0 : 0x00000000;
|
||||
crm += (((fm_mask >> 7) & 1) == 1) ? 0x0000000F : 0x00000000;
|
||||
uint32_t quickfprval = (uint32_t)ppc_state.ppc_fpr[reg_b].int64_r;
|
||||
ppc_state.ppc_fpscr = (quickfprval & crm) | (quickfprval & ~(crm));
|
||||
uint32_t quickfprval = (uint32_t)ppc_state.fpr[reg_b].int64_r;
|
||||
ppc_state.fpscr = (quickfprval & crm) | (quickfprval & ~(crm));
|
||||
}
|
||||
|
||||
void ppc_mtfsfdot() {
|
||||
@ -1266,8 +1266,8 @@ void ppc_mtfsfdot() {
|
||||
crm += (((fm_mask >> 5) & 1) == 1) ? 0x00000F00 : 0x00000000;
|
||||
crm += (((fm_mask >> 6) & 1) == 1) ? 0x000000F0 : 0x00000000;
|
||||
crm += (((fm_mask >> 7) & 1) == 1) ? 0x0000000F : 0x00000000;
|
||||
uint32_t quickfprval = (uint32_t)ppc_state.ppc_fpr[reg_b].int64_r;
|
||||
ppc_state.ppc_fpscr = (quickfprval & crm) | (quickfprval & ~(crm));
|
||||
uint32_t quickfprval = (uint32_t)ppc_state.fpr[reg_b].int64_r;
|
||||
ppc_state.fpscr = (quickfprval & crm) | (quickfprval & ~(crm));
|
||||
ppc_fp_changecrf1();
|
||||
}
|
||||
|
||||
@ -1275,28 +1275,28 @@ void ppc_mtfsfi() {
|
||||
ppc_result_b = (ppc_cur_instruction >> 11) & 15;
|
||||
crf_d = (ppc_cur_instruction >> 23) & 7;
|
||||
crf_d = crf_d << 2;
|
||||
ppc_state.ppc_fpscr = (ppc_state.ppc_cr & ~(0xF0000000UL >> crf_d)) | ((ppc_state.ppc_spr[SPR::XER] & 0xF0000000UL) >> crf_d);
|
||||
ppc_state.fpscr = (ppc_state.cr & ~(0xF0000000UL >> crf_d)) | ((ppc_state.spr[SPR::XER] & 0xF0000000UL) >> crf_d);
|
||||
}
|
||||
|
||||
void ppc_mtfsfidot() {
|
||||
ppc_result_b = (ppc_cur_instruction >> 11) & 15;
|
||||
crf_d = (ppc_cur_instruction >> 23) & 7;
|
||||
crf_d = crf_d << 2;
|
||||
ppc_state.ppc_fpscr = (ppc_state.ppc_cr & ~(0xF0000000UL >> crf_d)) | ((ppc_state.ppc_spr[SPR::XER] & 0xF0000000UL) >> crf_d);
|
||||
ppc_state.fpscr = (ppc_state.cr & ~(0xF0000000UL >> crf_d)) | ((ppc_state.spr[SPR::XER] & 0xF0000000UL) >> crf_d);
|
||||
ppc_fp_changecrf1();
|
||||
}
|
||||
|
||||
void ppc_mtfsb0() {
|
||||
crf_d = (ppc_cur_instruction >> 21) & 0x31;
|
||||
if ((crf_d == 0) || (crf_d > 2)) {
|
||||
ppc_state.ppc_fpscr &= ~(1 << (31 - crf_d));
|
||||
ppc_state.fpscr &= ~(1 << (31 - crf_d));
|
||||
}
|
||||
}
|
||||
|
||||
void ppc_mtfsb0dot() {
|
||||
crf_d = (ppc_cur_instruction >> 21) & 0x31;
|
||||
if ((crf_d == 0) || (crf_d > 2)) {
|
||||
ppc_state.ppc_fpscr &= ~(1 << crf_d);
|
||||
ppc_state.fpscr &= ~(1 << crf_d);
|
||||
}
|
||||
ppc_fp_changecrf1();
|
||||
}
|
||||
@ -1304,14 +1304,14 @@ void ppc_mtfsb0dot() {
|
||||
void ppc_mtfsb1() {
|
||||
crf_d = (ppc_cur_instruction >> 21) & 0x31;
|
||||
if ((crf_d == 0) || (crf_d > 2)) {
|
||||
ppc_state.ppc_fpscr |= (1 << crf_d);
|
||||
ppc_state.fpscr |= (1 << crf_d);
|
||||
}
|
||||
}
|
||||
|
||||
void ppc_mtfsb1dot() {
|
||||
crf_d = ~(ppc_cur_instruction >> 21) & 0x31;
|
||||
if ((crf_d == 0) || (crf_d > 2)) {
|
||||
ppc_state.ppc_fpscr |= (1 << crf_d);
|
||||
ppc_state.fpscr |= (1 << crf_d);
|
||||
}
|
||||
ppc_fp_changecrf1();
|
||||
}
|
||||
@ -1321,7 +1321,7 @@ void ppc_mcrfs() {
|
||||
crf_d = crf_d << 2;
|
||||
crf_s = (ppc_cur_instruction >> 18) & 7;
|
||||
crf_s = crf_d << 2;
|
||||
ppc_state.ppc_cr = ~(ppc_state.ppc_cr & ((15 << (28 - crf_d)))) & (ppc_state.ppc_fpscr & (15 << (28 - crf_s)));
|
||||
ppc_state.cr = ~(ppc_state.cr & ((15 << (28 - crf_d)))) & (ppc_state.fpscr & (15 << (28 - crf_s)));
|
||||
}
|
||||
|
||||
//Floating Point Comparisons
|
||||
@ -1335,7 +1335,7 @@ void ppc_fcmpo() {
|
||||
double db_test_a = (double)ppc_result64_a;
|
||||
double db_test_b = (double)ppc_result64_b;
|
||||
|
||||
ppc_state.ppc_fpscr &= 0xFFFF0FFF;
|
||||
ppc_state.fpscr &= 0xFFFF0FFF;
|
||||
|
||||
if (std::isnan(db_test_a) || std::isnan(db_test_b)) {
|
||||
cmp_c |= 0x01;
|
||||
@ -1350,17 +1350,17 @@ void ppc_fcmpo() {
|
||||
cmp_c |= 0x02;
|
||||
}
|
||||
|
||||
ppc_state.ppc_fpscr |= (cmp_c << 12);
|
||||
ppc_state.ppc_cr = ((ppc_state.ppc_cr & ~(0xf0000000 >> crf_d)) | ((cmp_c + xercon) >> crf_d));
|
||||
ppc_state.fpscr |= (cmp_c << 12);
|
||||
ppc_state.cr = ((ppc_state.cr & ~(0xf0000000 >> crf_d)) | ((cmp_c + xercon) >> crf_d));
|
||||
|
||||
if ((db_test_a == snan) || (db_test_b == snan)) {
|
||||
ppc_state.ppc_fpscr |= 0x1000000;
|
||||
if (ppc_state.ppc_fpscr & 0x80) {
|
||||
ppc_state.ppc_fpscr |= 0x80000;
|
||||
ppc_state.fpscr |= 0x1000000;
|
||||
if (ppc_state.fpscr & 0x80) {
|
||||
ppc_state.fpscr |= 0x80000;
|
||||
}
|
||||
}
|
||||
else if ((db_test_a == qnan) || (db_test_b == qnan)) {
|
||||
ppc_state.ppc_fpscr |= 0x80000;
|
||||
ppc_state.fpscr |= 0x80000;
|
||||
}
|
||||
|
||||
}
|
||||
@ -1374,7 +1374,7 @@ void ppc_fcmpu() {
|
||||
double db_test_a = (double)ppc_result64_a;
|
||||
double db_test_b = (double)ppc_result64_b;
|
||||
|
||||
ppc_state.ppc_fpscr &= 0xFFFF0FFF;
|
||||
ppc_state.fpscr &= 0xFFFF0FFF;
|
||||
|
||||
if (std::isnan(db_test_a) || std::isnan(db_test_b)) {
|
||||
cmp_c |= 0x01;
|
||||
@ -1389,10 +1389,10 @@ void ppc_fcmpu() {
|
||||
cmp_c |= 0x02;
|
||||
}
|
||||
|
||||
ppc_state.ppc_fpscr |= (cmp_c << 12);
|
||||
ppc_state.ppc_cr = ((ppc_state.ppc_cr & ~(0xf0000000 >> crf_d)) | ((cmp_c + xercon) >> crf_d));
|
||||
ppc_state.fpscr |= (cmp_c << 12);
|
||||
ppc_state.cr = ((ppc_state.cr & ~(0xf0000000 >> crf_d)) | ((cmp_c + xercon) >> crf_d));
|
||||
|
||||
if ((db_test_a == snan) || (db_test_b == snan)) {
|
||||
ppc_state.ppc_fpscr |= 0x1000000;
|
||||
ppc_state.fpscr |= 0x1000000;
|
||||
}
|
||||
}
|
||||
|
@ -123,16 +123,16 @@ void ibat_update(uint32_t bat_reg)
|
||||
|
||||
upper_reg_num = bat_reg & 0xFFFFFFFE;
|
||||
|
||||
if (ppc_state.ppc_spr[upper_reg_num] & 3) { // is that BAT pair valid?
|
||||
if (ppc_state.spr[upper_reg_num] & 3) { // is that BAT pair valid?
|
||||
bat_entry = &ibat_array[(bat_reg - 528) >> 1];
|
||||
bl = (ppc_state.ppc_spr[upper_reg_num] >> 2) & 0x7FF;
|
||||
bl = (ppc_state.spr[upper_reg_num] >> 2) & 0x7FF;
|
||||
lo_mask = (bl << 17) | 0x1FFFF;
|
||||
|
||||
bat_entry->access = ppc_state.ppc_spr[upper_reg_num] & 3;
|
||||
bat_entry->prot = ppc_state.ppc_spr[upper_reg_num + 1] & 3;
|
||||
bat_entry->access = ppc_state.spr[upper_reg_num] & 3;
|
||||
bat_entry->prot = ppc_state.spr[upper_reg_num + 1] & 3;
|
||||
bat_entry->lo_mask = lo_mask;
|
||||
bat_entry->phys_hi = ppc_state.ppc_spr[upper_reg_num + 1] & ~lo_mask;
|
||||
bat_entry->bepi = ppc_state.ppc_spr[upper_reg_num] & ~lo_mask;
|
||||
bat_entry->phys_hi = ppc_state.spr[upper_reg_num + 1] & ~lo_mask;
|
||||
bat_entry->bepi = ppc_state.spr[upper_reg_num] & ~lo_mask;
|
||||
}
|
||||
}
|
||||
|
||||
@ -144,16 +144,16 @@ void dbat_update(uint32_t bat_reg)
|
||||
|
||||
upper_reg_num = bat_reg & 0xFFFFFFFE;
|
||||
|
||||
if (ppc_state.ppc_spr[upper_reg_num] & 3) { // is that BAT pair valid?
|
||||
if (ppc_state.spr[upper_reg_num] & 3) { // is that BAT pair valid?
|
||||
bat_entry = &dbat_array[(bat_reg - 536) >> 1];
|
||||
bl = (ppc_state.ppc_spr[upper_reg_num] >> 2) & 0x7FF;
|
||||
bl = (ppc_state.spr[upper_reg_num] >> 2) & 0x7FF;
|
||||
lo_mask = (bl << 17) | 0x1FFFF;
|
||||
|
||||
bat_entry->access = ppc_state.ppc_spr[upper_reg_num] & 3;
|
||||
bat_entry->prot = ppc_state.ppc_spr[upper_reg_num + 1] & 3;
|
||||
bat_entry->access = ppc_state.spr[upper_reg_num] & 3;
|
||||
bat_entry->prot = ppc_state.spr[upper_reg_num + 1] & 3;
|
||||
bat_entry->lo_mask = lo_mask;
|
||||
bat_entry->phys_hi = ppc_state.ppc_spr[upper_reg_num + 1] & ~lo_mask;
|
||||
bat_entry->bepi = ppc_state.ppc_spr[upper_reg_num] & ~lo_mask;
|
||||
bat_entry->phys_hi = ppc_state.spr[upper_reg_num + 1] & ~lo_mask;
|
||||
bat_entry->bepi = ppc_state.spr[upper_reg_num] & ~lo_mask;
|
||||
}
|
||||
}
|
||||
|
||||
@ -161,7 +161,7 @@ static inline uint8_t* calc_pteg_addr(uint32_t hash)
|
||||
{
|
||||
uint32_t sdr1_val, pteg_addr;
|
||||
|
||||
sdr1_val = ppc_state.ppc_spr[SPR::SDR1];
|
||||
sdr1_val = ppc_state.spr[SPR::SDR1];
|
||||
|
||||
pteg_addr = sdr1_val & 0xFE000000;
|
||||
pteg_addr |= (sdr1_val & 0x01FF0000) |
|
||||
@ -233,7 +233,7 @@ static uint32_t page_address_translate(uint32_t la, bool is_instr_fetch,
|
||||
unsigned key, pp;
|
||||
uint8_t* pte_addr;
|
||||
|
||||
sr_val = ppc_state.ppc_sr[(la >> 28) & 0x0F];
|
||||
sr_val = ppc_state.sr[(la >> 28) & 0x0F];
|
||||
if (sr_val & 0x80000000) {
|
||||
LOG_F(ERROR, "Direct-store segments not supported, LA=%0xX\n", la);
|
||||
exit(-1); // FIXME: ugly error handling, must be the proper exception!
|
||||
@ -254,8 +254,8 @@ static uint32_t page_address_translate(uint32_t la, bool is_instr_fetch,
|
||||
mmu_exception_handler(Except_Type::EXC_ISI, 0x40000000);
|
||||
}
|
||||
else {
|
||||
ppc_state.ppc_spr[SPR::DSISR] = 0x40000000 | (is_write << 25);
|
||||
ppc_state.ppc_spr[SPR::DAR] = la;
|
||||
ppc_state.spr[SPR::DSISR] = 0x40000000 | (is_write << 25);
|
||||
ppc_state.spr[SPR::DAR] = la;
|
||||
mmu_exception_handler(Except_Type::EXC_DSI, 0);
|
||||
}
|
||||
}
|
||||
@ -277,8 +277,8 @@ static uint32_t page_address_translate(uint32_t la, bool is_instr_fetch,
|
||||
mmu_exception_handler(Except_Type::EXC_ISI, 0x08000000);
|
||||
}
|
||||
else {
|
||||
ppc_state.ppc_spr[SPR::DSISR] = 0x08000000 | (is_write << 25);
|
||||
ppc_state.ppc_spr[SPR::DAR] = la;
|
||||
ppc_state.spr[SPR::DSISR] = 0x08000000 | (is_write << 25);
|
||||
ppc_state.spr[SPR::DAR] = la;
|
||||
mmu_exception_handler(Except_Type::EXC_DSI, 0);
|
||||
}
|
||||
}
|
||||
@ -300,7 +300,7 @@ static uint32_t ppc_mmu_instr_translate(uint32_t la)
|
||||
uint32_t pa; /* translated physical address */
|
||||
|
||||
bool bat_hit = false;
|
||||
unsigned msr_pr = !!(ppc_state.ppc_msr & 0x4000);
|
||||
unsigned msr_pr = !!(ppc_state.msr & 0x4000);
|
||||
|
||||
// Format: %XY
|
||||
// X - supervisor access bit, Y - problem/user access bit
|
||||
@ -342,7 +342,7 @@ static uint32_t ppc_mmu_addr_translate(uint32_t la, int is_write)
|
||||
uint32_t pa; /* translated physical address */
|
||||
|
||||
bool bat_hit = false;
|
||||
unsigned msr_pr = !!(ppc_state.ppc_msr & 0x4000);
|
||||
unsigned msr_pr = !!(ppc_state.msr & 0x4000);
|
||||
|
||||
// Format: %XY
|
||||
// X - supervisor access bit, Y - problem/user access bit
|
||||
@ -357,8 +357,8 @@ static uint32_t ppc_mmu_addr_translate(uint32_t la, int is_write)
|
||||
bat_hit = true;
|
||||
|
||||
if (!bat_entry->prot || ((bat_entry->prot & 1) && is_write)) {
|
||||
ppc_state.ppc_spr[SPR::DSISR] = 0x08000000 | (is_write << 25);
|
||||
ppc_state.ppc_spr[SPR::DAR] = la;
|
||||
ppc_state.spr[SPR::DSISR] = 0x08000000 | (is_write << 25);
|
||||
ppc_state.spr[SPR::DAR] = la;
|
||||
mmu_exception_handler(Except_Type::EXC_DSI, 0);
|
||||
}
|
||||
|
||||
@ -385,7 +385,7 @@ static void mem_write_unaligned(uint32_t addr, uint32_t value, uint32_t size)
|
||||
exit(-1); //FIXME!
|
||||
} else {
|
||||
/* data address translation if enabled */
|
||||
if (ppc_state.ppc_msr & 0x10) {
|
||||
if (ppc_state.msr & 0x10) {
|
||||
addr = ppc_mmu_addr_translate(addr, 0);
|
||||
}
|
||||
|
||||
@ -400,7 +400,7 @@ static void mem_write_unaligned(uint32_t addr, uint32_t value, uint32_t size)
|
||||
void mem_write_byte(uint32_t addr, uint8_t value)
|
||||
{
|
||||
/* data address translation if enabled */
|
||||
if (ppc_state.ppc_msr & 0x10) {
|
||||
if (ppc_state.msr & 0x10) {
|
||||
addr = ppc_mmu_addr_translate(addr, 1);
|
||||
}
|
||||
|
||||
@ -416,7 +416,7 @@ void mem_write_word(uint32_t addr, uint16_t value)
|
||||
}
|
||||
|
||||
/* data address translation if enabled */
|
||||
if (ppc_state.ppc_msr & 0x10) {
|
||||
if (ppc_state.msr & 0x10) {
|
||||
addr = ppc_mmu_addr_translate(addr, 1);
|
||||
}
|
||||
|
||||
@ -430,7 +430,7 @@ void mem_write_dword(uint32_t addr, uint32_t value)
|
||||
}
|
||||
|
||||
/* data address translation if enabled */
|
||||
if (ppc_state.ppc_msr & 0x10) {
|
||||
if (ppc_state.msr & 0x10) {
|
||||
addr = ppc_mmu_addr_translate(addr, 1);
|
||||
}
|
||||
|
||||
@ -445,7 +445,7 @@ void mem_write_qword(uint32_t addr, uint64_t value)
|
||||
}
|
||||
|
||||
/* data address translation if enabled */
|
||||
if (ppc_state.ppc_msr & 0x10) {
|
||||
if (ppc_state.msr & 0x10) {
|
||||
addr = ppc_mmu_addr_translate(addr, 1);
|
||||
}
|
||||
|
||||
@ -463,7 +463,7 @@ static uint32_t mem_grab_unaligned(uint32_t addr, uint32_t size)
|
||||
exit(-1); //FIXME!
|
||||
} else {
|
||||
/* data address translation if enabled */
|
||||
if (ppc_state.ppc_msr & 0x10) {
|
||||
if (ppc_state.msr & 0x10) {
|
||||
addr = ppc_mmu_addr_translate(addr, 0);
|
||||
}
|
||||
|
||||
@ -483,7 +483,7 @@ uint8_t mem_grab_byte(uint32_t addr)
|
||||
uint8_t ret;
|
||||
|
||||
/* data address translation if enabled */
|
||||
if (ppc_state.ppc_msr & 0x10) {
|
||||
if (ppc_state.msr & 0x10) {
|
||||
addr = ppc_mmu_addr_translate(addr, 0);
|
||||
}
|
||||
|
||||
@ -500,7 +500,7 @@ uint16_t mem_grab_word(uint32_t addr)
|
||||
}
|
||||
|
||||
/* data address translation if enabled */
|
||||
if (ppc_state.ppc_msr & 0x10) {
|
||||
if (ppc_state.msr & 0x10) {
|
||||
addr = ppc_mmu_addr_translate(addr, 0);
|
||||
}
|
||||
|
||||
@ -517,7 +517,7 @@ uint32_t mem_grab_dword(uint32_t addr)
|
||||
}
|
||||
|
||||
/* data address translation if enabled */
|
||||
if (ppc_state.ppc_msr & 0x10) {
|
||||
if (ppc_state.msr & 0x10) {
|
||||
addr = ppc_mmu_addr_translate(addr, 0);
|
||||
}
|
||||
|
||||
@ -535,7 +535,7 @@ uint64_t mem_grab_qword(uint32_t addr)
|
||||
}
|
||||
|
||||
/* data address translation if enabled */
|
||||
if (ppc_state.ppc_msr & 0x10) {
|
||||
if (ppc_state.msr & 0x10) {
|
||||
addr = ppc_mmu_addr_translate(addr, 0);
|
||||
}
|
||||
|
||||
@ -548,7 +548,7 @@ uint8_t* quickinstruction_translate(uint32_t addr)
|
||||
uint8_t* real_addr;
|
||||
|
||||
/* perform instruction address translation if enabled */
|
||||
if (ppc_state.ppc_msr & 0x20) {
|
||||
if (ppc_state.msr & 0x20) {
|
||||
addr = ppc_mmu_instr_translate(addr);
|
||||
}
|
||||
|
||||
@ -580,8 +580,8 @@ uint64_t mem_read_dbg(uint32_t virt_addr, uint32_t size)
|
||||
uint64_t ret_val;
|
||||
|
||||
/* save MMU-related CPU state */
|
||||
save_dsisr = ppc_state.ppc_spr[SPR::DSISR];
|
||||
save_dar = ppc_state.ppc_spr[SPR::DAR];
|
||||
save_dsisr = ppc_state.spr[SPR::DSISR];
|
||||
save_dar = ppc_state.spr[SPR::DAR];
|
||||
mmu_exception_handler = dbg_exception_handler;
|
||||
|
||||
try {
|
||||
@ -605,8 +605,8 @@ uint64_t mem_read_dbg(uint32_t virt_addr, uint32_t size)
|
||||
catch (std::invalid_argument& exc) {
|
||||
/* restore MMU-related CPU state */
|
||||
mmu_exception_handler = ppc_exception_handler;
|
||||
ppc_state.ppc_spr[SPR::DSISR] = save_dsisr;
|
||||
ppc_state.ppc_spr[SPR::DAR] = save_dar;
|
||||
ppc_state.spr[SPR::DSISR] = save_dsisr;
|
||||
ppc_state.spr[SPR::DAR] = save_dar;
|
||||
|
||||
/* rethrow MMU exception */
|
||||
throw exc;
|
||||
@ -614,8 +614,8 @@ uint64_t mem_read_dbg(uint32_t virt_addr, uint32_t size)
|
||||
|
||||
/* restore MMU-related CPU state */
|
||||
mmu_exception_handler = ppc_exception_handler;
|
||||
ppc_state.ppc_spr[SPR::DSISR] = save_dsisr;
|
||||
ppc_state.ppc_spr[SPR::DAR] = save_dar;
|
||||
ppc_state.spr[SPR::DSISR] = save_dsisr;
|
||||
ppc_state.spr[SPR::DAR] = save_dar;
|
||||
|
||||
return ret_val;
|
||||
}
|
||||
|
File diff suppressed because it is too large
Load Diff
@ -14,12 +14,12 @@ int nfailed; /* number of failed instructions */
|
||||
|
||||
void xer_ov_test(string mnem, uint32_t opcode)
|
||||
{
|
||||
ppc_state.ppc_gpr[3] = 2;
|
||||
ppc_state.ppc_gpr[4] = 2;
|
||||
ppc_state.ppc_spr[SPR::XER] = 0xFFFFFFFF;
|
||||
ppc_state.gpr[3] = 2;
|
||||
ppc_state.gpr[4] = 2;
|
||||
ppc_state.spr[SPR::XER] = 0xFFFFFFFF;
|
||||
ppc_cur_instruction = opcode;
|
||||
ppc_main_opcode();
|
||||
if (ppc_state.ppc_spr[SPR::XER] & 0x40000000UL) {
|
||||
if (ppc_state.spr[SPR::XER] & 0x40000000UL) {
|
||||
cout << "Invalid " << mnem << " emulation! XER[OV] should not be set."
|
||||
<< endl;
|
||||
nfailed++;
|
||||
@ -119,10 +119,10 @@ static void read_test_data()
|
||||
}
|
||||
}
|
||||
|
||||
ppc_state.ppc_gpr[3] = src1;
|
||||
ppc_state.ppc_gpr[4] = src2;
|
||||
ppc_state.ppc_spr[SPR::XER] = 0;
|
||||
ppc_state.ppc_cr = 0;
|
||||
ppc_state.gpr[3] = src1;
|
||||
ppc_state.gpr[4] = src2;
|
||||
ppc_state.spr[SPR::XER] = 0;
|
||||
ppc_state.cr = 0;
|
||||
|
||||
ppc_cur_instruction = opcode;
|
||||
|
||||
@ -130,16 +130,16 @@ static void read_test_data()
|
||||
|
||||
ntested++;
|
||||
|
||||
if ((tokens[0].rfind("CMP") && (ppc_state.ppc_gpr[3] != dest)) ||
|
||||
(ppc_state.ppc_spr[SPR::XER] != check_xer) ||
|
||||
(ppc_state.ppc_cr != check_cr)) {
|
||||
if ((tokens[0].rfind("CMP") && (ppc_state.gpr[3] != dest)) ||
|
||||
(ppc_state.spr[SPR::XER] != check_xer) ||
|
||||
(ppc_state.cr != check_cr)) {
|
||||
cout << "Mismatch: instr=" << tokens[0] << ", src1=0x" << hex << src1
|
||||
<< ", src2=0x" << hex << src2 << endl;
|
||||
cout << "expected: dest=0x" << hex << dest << ", XER=0x" << hex
|
||||
<< check_xer << ", CR=0x" << hex << check_cr << endl;
|
||||
cout << "got: dest=0x" << hex << ppc_state.ppc_gpr[3] << ", XER=0x"
|
||||
<< hex << ppc_state.ppc_spr[SPR::XER] << ", CR=0x" << hex
|
||||
<< ppc_state.ppc_cr << endl;
|
||||
cout << "got: dest=0x" << hex << ppc_state.gpr[3] << ", XER=0x"
|
||||
<< hex << ppc_state.spr[SPR::XER] << ", CR=0x" << hex
|
||||
<< ppc_state.cr << endl;
|
||||
cout << "Test file line #: " << dec << lineno << endl << endl;
|
||||
|
||||
nfailed++;
|
||||
|
Loading…
x
Reference in New Issue
Block a user