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bandit: add Chaos support.
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ea0fb3b410
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@ -231,8 +231,106 @@ void Bandit::verbose_address_space()
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}
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}
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Chaos::Chaos(std::string name) : PCIHost()
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{
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supports_types(HWCompType::PCI_HOST);
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MemCtrlBase *mem_ctrl = dynamic_cast<MemCtrlBase *>
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(gMachineObj->get_comp_by_type(HWCompType::MEM_CTRL));
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// add memory mapped I/O region for Chaos control registers
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// This region has the following layout:
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// base_addr + 0x800000 --> CONFIG_ADDR
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// base_addr + 0xC00000 --> CONFIG_DATA
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mem_ctrl->add_mmio_region(0xF0000000UL, 0x01000000, this);
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this->name = name;
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}
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uint32_t Chaos::read(uint32_t reg_start, uint32_t offset, int size)
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{
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int fun_num;
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uint8_t reg_offs;
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uint32_t result, idsel;
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if (offset & BANDIT_CONFIG_SPACE) {
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if (offset & 0x00400000) {
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idsel = (this->config_addr >> 11) & 0x1FFFFFU;
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fun_num = (this->config_addr >> 8) & 7;
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reg_offs = this->config_addr & 0xFCU;
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if (!SINGLE_BIT_SET(idsel)) {
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LOG_F(ERROR, "%s: invalid IDSEL=0x%X passed", this->name.c_str(), idsel);
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return 0;
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}
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if (this->dev_map.count(idsel)) {
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result = this->dev_map[idsel]->pci_cfg_read(reg_offs, size);
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} else {
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LOG_F(
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ERROR,
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"%s err: read attempt from non-existing VCI device %d \n",
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this->name.c_str(),
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idsel);
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result = 0;
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}
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} else {
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result = this->config_addr;
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}
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} else { // I/O space access
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LOG_F(ERROR, "%s: I/O space not supported", this->name.c_str());
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return 0;
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}
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return result;
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}
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void Chaos::write(uint32_t reg_start, uint32_t offset, uint32_t value, int size)
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{
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int fun_num;
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uint8_t reg_offs;
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uint32_t idsel;
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if (offset & BANDIT_CONFIG_SPACE) {
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if (offset & 0x00400000) {
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// access to the CONFIG_DATA pseudo-register causes a Config Cycle
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if (this->config_addr & BANDIT_CAR_TYPE) {
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LOG_F(WARNING, "%s: config cycle type 1 not supported yet", this->name.c_str());
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return;
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}
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idsel = (this->config_addr >> 11) & 0x1FFFFFU;
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fun_num = (this->config_addr >> 8) & 7;
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reg_offs = this->config_addr & 0xFCU;
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if (!SINGLE_BIT_SET(idsel)) {
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LOG_F(ERROR, "%s: invalid IDSEL=0x%X passed", this->name.c_str(), idsel);
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return;
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}
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if (this->dev_map.count(idsel)) {
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this->dev_map[idsel]->pci_cfg_write(reg_offs, value, size);
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} else {
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LOG_F(
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ERROR,
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"%s err: write attempt to non-existing VCI device %d \n",
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this->name.c_str(),
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idsel);
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}
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} else {
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this->config_addr = BYTESWAP_32(value);
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}
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} else { // I/O space access
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LOG_F(ERROR, "%s: I/O space not supported", this->name.c_str());
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}
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}
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static const DeviceDescription Bandit1_Descriptor = {
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Bandit::create_first, {}, {}
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};
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static const DeviceDescription Chaos_Descriptor = {
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Chaos::create, {}, {}
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};
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REGISTER_DEVICE(Bandit1, Bandit1_Descriptor);
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REGISTER_DEVICE(Chaos, Chaos_Descriptor);
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@ -29,6 +29,7 @@ along with this program. If not, see <https://www.gnu.org/licenses/>.
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#define BANDIT_PCI_H
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#include <devices/common/hwcomponent.h>
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#include <devices/common/mmiodevice.h>
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#include <devices/common/pci/pcidevice.h>
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#include <devices/common/pci/pcihost.h>
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@ -56,7 +57,7 @@ public:
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static std::unique_ptr<HWComponent> create_first() {
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return std::unique_ptr<Bandit>(new Bandit(1, "Bandit-PCI1"));
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}
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};
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uint32_t pci_cfg_read(uint32_t reg_offs, uint32_t size);
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void pci_cfg_write(uint32_t reg_offs, uint32_t value, uint32_t size);
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@ -74,4 +75,27 @@ private:
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uint32_t addr_mask;
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};
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/** Chaos is a custom ARBus-to-PCI bridge that provides a specialized
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PCI-like bus for video called VCI. This 64-bit bus runs at the same
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frequency as the CPU bus (40-50 MHz) and provides an interface
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between video input/output devices and the CPU bus.
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*/
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class Chaos : public PCIHost, public MMIODevice {
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public:
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Chaos(std::string name);
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~Chaos() = default;
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static std::unique_ptr<HWComponent> create() {
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return std::unique_ptr<Chaos>(new Chaos("VCI0"));
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};
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// MMIODevice methods
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uint32_t read(uint32_t reg_start, uint32_t offset, int size);
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void write(uint32_t reg_start, uint32_t offset, uint32_t value, int size);
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private:
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std::string name;
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uint32_t config_addr;
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};
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#endif // BANDIT_PCI_H
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