From e8273ecc61028f87ca6fa94bde3b2508378f872e Mon Sep 17 00:00:00 2001 From: joevt Date: Tue, 9 Apr 2024 02:21:39 -0700 Subject: [PATCH] poweropcodes: Fix sllq. Test bit 26 of rB instead of using >= 0x20 to determine which operation to perform. Since the mask is not complicated, we don't need to use power_rot_mask. --- cpu/ppc/poweropcodes.cpp | 11 ++++------- 1 file changed, 4 insertions(+), 7 deletions(-) diff --git a/cpu/ppc/poweropcodes.cpp b/cpu/ppc/poweropcodes.cpp index 2ce1a72..3f2c7e4 100644 --- a/cpu/ppc/poweropcodes.cpp +++ b/cpu/ppc/poweropcodes.cpp @@ -458,14 +458,11 @@ template void dppc_interpreter::power_sllq() { ppc_grab_regssab(ppc_cur_instruction); unsigned rot_sh = ppc_result_b & 0x1F; - uint32_t r = ((ppc_result_d << rot_sh) | (ppc_result_d >> (32 - rot_sh))); - uint32_t mask = power_rot_mask(0, 31 - rot_sh); - if (ppc_result_b >= 0x20) { - ppc_result_a = (ppc_state.spr[SPR::MQ] & mask); - } - else { - ppc_result_a = ((r & mask) | (ppc_state.spr[SPR::MQ] & ~mask)); + if (ppc_result_b & 0x20) { + ppc_result_a = ppc_state.spr[SPR::MQ] & (-1U << rot_sh); + } else { + ppc_result_a = ((ppc_result_d << rot_sh) | (ppc_state.spr[SPR::MQ] & ((1 << rot_sh) - 1))); } if (rec)