mirror of
https://github.com/dingusdev/dingusppc.git
synced 2024-12-27 00:29:18 +00:00
atirage: PCI BAR changes.
- Add BAR 2 decode. This BAR isn't actually used by Mac OS X, but decode it anyway just in case. - Support updating of BARs (using change_one_bar method).
This commit is contained in:
joevt
dingusdev
parent
9c48c296c8
commit
eef6d267c3
@ -124,12 +124,10 @@ ATIRage::ATIRage(uint16_t dev_id)
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this->class_rev = (0x030000 << 8) | asic_id;
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this->min_gnt = 8;
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this->irq_pin = 1;
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this->setup_bars({
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{0, 0xFF000000UL}, // declare main aperture (16MB)
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{1, 0xFFFFFF01UL}, // declare I/O region (256 bytes)
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{2, 0xFFFFF000UL} // declare register aperture (4KB)
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});
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for (int i = 0; i < this->aperture_count; i++) {
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this->bars_cfg[i] = (uint32_t)(-this->aperture_size[i] | this->aperture_flag[i]);
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}
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this->finish_config_bars();
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this->pci_notify_bar_change = [this](int bar_num) {
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this->notify_bar_change(bar_num);
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@ -146,23 +144,31 @@ ATIRage::ATIRage(uint16_t dev_id)
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this->regs[ATI_GP_IO] = ((mon_code & 6) << 11) | ((mon_code & 1) << 8);
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}
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void ATIRage::change_one_bar(uint32_t &aperture, uint32_t aperture_size, uint32_t aperture_new, int bar_num) {
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if (aperture != aperture_new) {
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if (aperture)
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this->host_instance->pci_unregister_mmio_region(aperture, aperture_size, this);
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aperture = aperture_new;
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if (aperture)
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this->host_instance->pci_register_mmio_region(aperture, aperture_size, this);
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LOG_F(INFO, "%s: aperture[%d] set to 0x%08X", this->name.c_str(), bar_num, aperture);
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}
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}
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void ATIRage::notify_bar_change(int bar_num)
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{
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switch (bar_num) {
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case 0:
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if (this->aperture_base != (this->bars[bar_num] & 0xFFFFFFF0UL)) {
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this->aperture_base = this->bars[0] & 0xFFFFFFF0UL;
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this->host_instance->pci_register_mmio_region(this->aperture_base,
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APERTURE_SIZE - this->vram_size, this);
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LOG_F(INFO, "ATIRage: aperture address set to 0x%08X", this->aperture_base);
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}
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break;
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case 1:
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this->io_base = this->bars[1] & ~3;
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LOG_F(INFO, "ATIRage: I/O space address set to 0x%08X", this->io_base);
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change_one_bar(this->aperture_base[bar_num], this->aperture_size[bar_num] - this->vram_size, this->bars[bar_num] & ~15, bar_num);
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break;
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case 2:
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LOG_F(INFO, "ATIRage: register aperture address set to 0x%08X", this->bars[2]);
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change_one_bar(this->aperture_base[bar_num], this->aperture_size[bar_num], this->bars[bar_num] & ~15, bar_num);
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break;
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case 1:
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this->aperture_base[1] = this->bars[bar_num] & ~3;
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LOG_F(INFO, "%s: I/O space address set to 0x%08X", this->name.c_str(), this->aperture_base[1]);
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break;
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}
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}
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@ -383,7 +389,7 @@ void ATIRage::write_reg(uint32_t reg_offset, uint32_t value, uint32_t size) {
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}
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bool ATIRage::io_access_allowed(uint32_t offset) {
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if (offset >= this->io_base && offset < (this->io_base + 0x100)) {
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if (offset >= this->aperture_base[1] && offset < (this->aperture_base[1] + 0x100)) {
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if (this->command & 1) {
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return true;
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}
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@ -392,65 +398,85 @@ bool ATIRage::io_access_allowed(uint32_t offset) {
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return false;
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}
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bool ATIRage::pci_io_read(uint32_t offset, uint32_t size, uint32_t* res) {
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if (!this->io_access_allowed(offset)) {
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return false;
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}
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*res = BYTESWAP_SIZED(this->read_reg(offset - this->io_base, size), size);
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*res = BYTESWAP_SIZED(this->read_reg(offset - this->aperture_base[1], size), size);
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return true;
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}
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bool ATIRage::pci_io_write(uint32_t offset, uint32_t value, uint32_t size) {
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if (!this->io_access_allowed(offset)) {
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return false;
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}
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this->write_reg(offset - this->io_base, BYTESWAP_SIZED(value, size), size);
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this->write_reg(offset - this->aperture_base[1], BYTESWAP_SIZED(value, size), size);
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return true;
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}
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uint32_t ATIRage::read(uint32_t rgn_start, uint32_t offset, int size)
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{
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if (offset < this->vram_size) { // little-endian VRAM region
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return read_mem(&this->vram_ptr[offset], size);
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}
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else if (offset >= BE_FB_OFFSET) { // big-endian VRAM region
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return read_mem(&this->vram_ptr[offset - BE_FB_OFFSET], size);
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}
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else if (offset >= MM_REGS_0_OFF) { // memory-mapped registers, block 0
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return BYTESWAP_SIZED(this->read_reg(offset & 0x3FF, size), size);
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}
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else if (offset >= MM_REGS_1_OFF) { // memory-mapped registers, block 1
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return BYTESWAP_SIZED(this->read_reg((offset & 0x3FF) + 0x400, size), size);
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}
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else {
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LOG_F(WARNING, "ATI Rage: read attempt from unmapped aperture region at 0x%08X", offset);
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if (rgn_start == this->aperture_base[0] && offset < this->aperture_size[0]) {
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if (offset < this->vram_size) { // little-endian VRAM region
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return read_mem(&this->vram_ptr[offset], size);
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}
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if (offset >= BE_FB_OFFSET) { // big-endian VRAM region
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return read_mem(&this->vram_ptr[offset - BE_FB_OFFSET], size);
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}
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//if (!bit_set(this->regs[ATI_BUS_CNTL], ATI_BUS_APER_REG_DIS)) {
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if (offset >= MM_REGS_0_OFF) { // memory-mapped registers, block 0
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return BYTESWAP_SIZED(this->read_reg(offset & 0x3FF, size), size);
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}
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if (offset >= MM_REGS_1_OFF
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//&& bit_set(this->regs[ATI_BUS_CNTL], ATI_BUS_EXT_REG_EN)
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) { // memory-mapped registers, block 1
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return BYTESWAP_SIZED(this->read_reg((offset & 0x3FF) + 0x400, size), size);
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}
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//}
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LOG_F(WARNING, "%s: read unmapped aperture[0] region %08x.%c", this->name.c_str(), offset, SIZE_ARG(size));
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return 0;
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}
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if (rgn_start == this->aperture_base[2] && offset < this->aperture_size[2]) {
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LOG_F(WARNING, "%s: read unmapped aperture[2] region %08x.%c", this->name.c_str(), offset, SIZE_ARG(size));
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return 0;
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}
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LOG_F(WARNING, "%s: read unmapped aperture region %08x.%c", this->name.c_str(), offset, SIZE_ARG(size));
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return 0;
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}
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void ATIRage::write(uint32_t rgn_start, uint32_t offset, uint32_t value, int size)
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{
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if (offset < this->vram_size) { // little-endian VRAM region
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write_mem(&this->vram_ptr[offset], value, size);
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if (rgn_start == this->aperture_base[0] && offset < this->aperture_size[0]) {
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if (offset < this->vram_size) { // little-endian VRAM region
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return write_mem(&this->vram_ptr[offset], value, size);
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}
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if (offset >= BE_FB_OFFSET) { // big-endian VRAM region
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return write_mem(&this->vram_ptr[offset & (BE_FB_OFFSET - 1)], value, size);
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}
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//if (!bit_set(this->regs[ATI_BUS_CNTL], ATI_BUS_APER_REG_DIS)) {
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if (offset >= MM_REGS_0_OFF) { // memory-mapped registers, block 0
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return this->write_reg(offset & 0x3FF, BYTESWAP_SIZED(value, size), size);
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}
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if (offset >= MM_REGS_1_OFF
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//&& bit_set(this->regs[ATI_BUS_CNTL], ATI_BUS_EXT_REG_EN)
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) { // memory-mapped registers, block 1
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return this->write_reg((offset & 0x3FF) + 0x400, BYTESWAP_SIZED(value, size), size);
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}
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//}
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LOG_F(WARNING, "%s: write unmapped aperture[0] region %08x.%c = %0*x", this->name.c_str(), offset, SIZE_ARG(size), size * 2, value);
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return;
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}
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else if (offset >= BE_FB_OFFSET) { // big-endian VRAM region
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write_mem(&this->vram_ptr[offset & (BE_FB_OFFSET - 1)], value, size);
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}
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else if (offset >= MM_REGS_0_OFF) { // memory-mapped registers, block 0
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this->write_reg(offset & 0x3FF, BYTESWAP_SIZED(value, size), size);
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}
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else if (offset >= MM_REGS_1_OFF) { // memory-mapped registers, block 1
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this->write_reg((offset & 0x3FF) + 0x400, BYTESWAP_SIZED(value, size), size);
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}
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else {
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LOG_F(WARNING, "ATI Rage: write attempt to unmapped aperture region at 0x%08X", offset);
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if (rgn_start == this->aperture_base[2] && offset < this->aperture_size[2]) {
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LOG_F(WARNING, "%s: write unmapped aperture[2] region %08x.%c = %0*x", this->name.c_str(), offset, SIZE_ARG(size), size * 2, value);
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return;
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}
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LOG_F(WARNING, "%s: write unmapped aperture region %08x.%c = %0*x", this->name.c_str(), offset, SIZE_ARG(size), size * 2, value);
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}
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float ATIRage::calc_pll_freq(int scale, int fb_div) {
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@ -81,6 +81,8 @@ protected:
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void get_cursor_position(int& x, int& y);
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private:
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void change_one_bar(uint32_t &aperture, uint32_t aperture_size, uint32_t aperture_new, int bar_num);
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uint32_t regs[512] = {}; // internal registers
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uint8_t plls[64] = {}; // internal PLL registers
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@ -90,10 +92,17 @@ private:
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std::unique_ptr<uint8_t[]> vram_ptr;
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uint32_t vram_size;
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uint32_t aperture_base = 0;
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uint32_t io_base = 0;
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// config 0x40
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uint8_t user_cfg = 8;
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// main aperture (16MB)
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// I/O region (256 bytes)
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// register aperture (4KB)
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uint32_t aperture_count = 3;
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uint32_t aperture_base[3] = { 0, 0, 0 };
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uint32_t aperture_size[3] = { 0x1000000, 0x100, 0x1000 };
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uint32_t aperture_flag[3] = { 0, 1, 0 };
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std::unique_ptr<DisplayID> disp_id;
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// DAC interface state
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