From fc44cdcc83b0e16703e6b2f2a7d15781ec37a4aa Mon Sep 17 00:00:00 2001 From: Maxim Poliakovski Date: Tue, 9 Nov 2021 13:41:48 +0100 Subject: [PATCH] Heathrow: logging monitor sense status. --- devices/ioctrl/heathrow.cpp | 19 ++++++++++++++++--- devices/ioctrl/macio.h | 2 ++ 2 files changed, 18 insertions(+), 3 deletions(-) diff --git a/devices/ioctrl/heathrow.cpp b/devices/ioctrl/heathrow.cpp index 6e758a4..5d17ae4 100644 --- a/devices/ioctrl/heathrow.cpp +++ b/devices/ioctrl/heathrow.cpp @@ -25,6 +25,7 @@ along with this program. If not, see . #include #include #include +#include #include #include @@ -221,7 +222,7 @@ uint32_t HeathrowIC::mio_ctrl_read(uint32_t offset, int size) { break; case 0x38: LOG_F(9, "read from MIO:Feat_Ctrl register \n"); - res = this->feat_ctrl; + res = BYTESWAP_32(this->feat_ctrl); break; default: LOG_F(WARNING, "read from unknown MIO register at %x \n", offset); @@ -261,8 +262,7 @@ void HeathrowIC::mio_ctrl_write(uint32_t offset, uint32_t value, int size) { LOG_F(WARNING, "Attempted to write %x to MIO:ID at %x; Address : %x \n", value, offset, ppc_state.pc); break; case 0x38: - LOG_F(9, "write %x to MIO:Feat_Ctrl register \n", value); - this->feat_ctrl = value; + this->feature_control(BYTESWAP_32(value)); break; case 0x3C: LOG_F(9, "write %x to MIO:Aux_Ctrl register \n", value); @@ -273,3 +273,16 @@ void HeathrowIC::mio_ctrl_write(uint32_t offset, uint32_t value, int size) { break; } } + +void HeathrowIC::feature_control(const uint32_t value) +{ + LOG_F(9, "write %x to MIO:Feat_Ctrl register \n", value); + + this->feat_ctrl = value; + + if (!(this->feat_ctrl & 1)) { + LOG_F(9, "Heathrow: Monitor sense enabled"); + } else { + LOG_F(9, "Heathrow: Monitor sense disabled"); + } +} diff --git a/devices/ioctrl/macio.h b/devices/ioctrl/macio.h index 414bcf7..2777637 100644 --- a/devices/ioctrl/macio.h +++ b/devices/ioctrl/macio.h @@ -120,6 +120,8 @@ protected: uint32_t mio_ctrl_read(uint32_t offset, int size); void mio_ctrl_write(uint32_t offset, uint32_t value, int size); + void feature_control(const uint32_t value); + private: uint8_t pci_cfg_hdr[256] = { 0x6B,