Maxim Poliakovski
bda85a66df
machinetnt: populate RAM banks from properties.
2024-07-22 17:45:48 +02:00
Maxim Poliakovski
babd8d974f
dbdma: fix cmd.resCount update.
2024-07-22 17:45:48 +02:00
Maxim Poliakovski
9fc5bbb951
sc53c94: fix interrupt status for CMD_MSG_ACCEPTED.
2024-07-19 03:38:55 +02:00
Maxim Poliakovski
3fe6e3c09e
grandcentral: more elegant MeshStub with less checks.
2024-07-19 01:31:36 +02:00
Maxim Poliakovski
289a14dc7a
scsidevice: release REQ before MESSAGE_IN phase.
2024-07-15 07:15:49 +02:00
Maxim Poliakovski
ba9fcd100d
mesh: extend stub to a full implementation.
2024-07-15 03:34:43 +02:00
Maxim Poliakovski
889dc32a0a
New base class for SCSI host controllers.
2024-07-15 03:28:45 +02:00
Maxim Poliakovski
f13f4e0023
grandcentral: break long lines.
2024-07-15 02:56:24 +02:00
Maxim Poliakovski
4a425c4ecf
dbdma: introduce new DMA API.
2024-07-15 02:09:15 +02:00
Maxim Poliakovski
293e869acb
dbdma: break long lines.
2024-07-15 02:09:15 +02:00
Maxim Poliakovski
f3d7cd9dd7
cdromdrive: add support for raw CD images.
2024-07-15 01:48:46 +02:00
Maxim Poliakovski
fd5498e16b
blockstoragedevice: add support for raw images.
...
Raw images contain supplementary information like synchronization fields,
correction codes etc. that needs to be ignored/discarded when
reading/writing user data.
This commit establish a basic architecture for exchanging user data
between a virtual device and a raw image.
2024-07-15 01:48:46 +02:00
Maxim Poliakovski
55f91c5d3f
scsicdrom: use READ_TOC implementation from cdromdrive.cpp
2024-07-15 01:28:42 +02:00
Maxim Poliakovski
0831182e39
scsihd: remove duplicated code.
2024-07-14 23:33:43 +02:00
Maxim Poliakovski
26153ca8ea
scsihd: use ScsiError contants wherever applicable.
2024-07-14 23:12:53 +02:00
Maxim Poliakovski
7855770ca7
Use ScsiError constants instead of magic numbers.
2024-07-14 17:22:31 +02:00
Maxim Poliakovski
a81156c3e3
cdromdrive: convert MSF values to BCD.
2024-07-11 21:27:38 +02:00
dingusdev
f31c71e430
Merge pull request #99 from dyharlan/master
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Do not test for equality when checking if ctrl is pressed.
2024-07-10 20:03:34 -07:00
dyharlan
7ba7bff3d5
Do not test for equality when checking if ctrl is pressed.
...
The initial change I committed worked fine before.
2024-07-11 10:38:57 +08:00
Maxim Poliakovski
11bb10b44b
Taos: cleanup GPIO pins.
2024-07-11 02:44:40 +02:00
Maxim Poliakovski
378965cc3d
Taos: properly handle color mode changes.
2024-07-11 02:44:40 +02:00
dingusdev
40b537767d
Update hostevents_sdl.cpp
...
A further fix by dyharlan to fix the mouse grabbing
2024-07-10 07:51:23 -07:00
dingusdev
e2e78c0682
Merge pull request #98 from dyharlan/master
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Fix keyboard event bug where mouse grab combination won't work if SDL_GetModState
2024-07-10 07:04:53 -07:00
dyharlan
0267fc82c9
fix indent of change
2024-07-10 19:03:37 +08:00
dyharlan
c4022f466f
Fix modstate bug preventing mousegrab
2024-07-10 18:54:05 +08:00
dingusdev
17cdcc5560
Fixes issue #97
2024-06-30 06:53:44 -07:00
Maxim Poliakovski
5eaff7a8ce
MPC106: break long lines.
2024-06-28 19:52:22 +02:00
Maxim Poliakovski
9d44ac0901
mpc106: fix includes.
2024-06-25 16:53:52 +02:00
dingusdev
606c9dd9a8
More compiler warning fixes
2024-06-24 19:40:20 -07:00
dingusdev
ec7907ed71
Update CREDITS.md
2024-06-24 19:33:06 -07:00
dingusdev
d1e20a72e3
Merge pull request #96 from kth5/kth5-gcc-14
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Fix missing std::find_if and others with GCC 14.1.1
2024-06-24 18:23:37 -07:00
kth5
742662e4fc
Fix missing std::find_if and others with GCC 14.1.1
2024-06-24 23:41:55 +02:00
dingusdev
d3096ebaac
Fixing compiler warnings, pt. 1
2024-06-21 08:01:21 -07:00
dingusdev
c0e28b81a8
Gracefully exit upon EOF
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Taken from #94 - Originally fixed by dressupgeekout and refined by joevt
2024-06-16 07:28:40 -07:00
Maxim Poliakovski
ce5edcb0c8
bebox.md: fix headers.
2024-06-15 22:21:34 +02:00
dingusdev
a3743f0293
Starting documentation for more machines
2024-06-15 12:40:58 -07:00
dingusdev
92580f3515
Adding VSCode to gitignore
2024-06-14 19:55:42 +02:00
Mihai Parparita
50018010c7
Add instruction counters to CPU profiler
...
Keeps track of instructions (including operands) that are executed,
to see if there are any hotspots that could be optimized or fastpaths
that should be added.
Also adds a mode where CPU profiler data is periodically output, to
make it easier to get at these instruction counts during startup.
2024-06-14 19:55:42 +02:00
Maxim Poliakovski
e4294d78bf
machinepdm: use the real decrementer frequency.
2024-05-23 17:23:22 +02:00
dingusdev
b73f5a157d
Slightly expanding manual
2024-05-12 15:54:03 -07:00
dingusdev
ce9a1a6d9e
A bit more clean-up
2024-05-09 19:09:06 -07:00
dingusdev
a95b06f703
Minor code clean-up
2024-05-08 07:07:32 -07:00
joevt
226c097b81
escc: Update RR0 if no character is available.
...
The RR0_RX_CHARACTER_AVAILABLE bit is cleared after the character is read in receive_byte, but clear it anyway in read_reg when there's no character available just in case a character that was available somehow becomes unavailable.
2024-05-07 06:45:01 -07:00
Maxim Poliakovski
a18658fc16
machinetnt: break long lines.
2024-05-07 08:40:08 +02:00
Maxim Poliakovski
971f6d79be
scsicdrom: reduce code duplication.
2024-05-07 08:37:52 +02:00
Maxim Poliakovski
ed67ab81a3
scsicdrom: switch off info log in INQUIRY.
2024-05-07 08:37:52 +02:00
Maxim Poliakovski
07304781ea
scsicdrom: improve MODE_SELECT_6 stub.
2024-05-07 08:37:52 +02:00
joevt
941a405cf8
escc: Implement RR8 and WR8.
...
Normally, the Port_B_Data or Port_A_Data address is used to directly access RR8 or WR8, but setting the register pointer in Port_B_Cmd or Port_A_Cmd to RR8/WR8 is another option.
Update write_regs[WR8] and read_regs[RR8] for possible debugging purposes.
2024-05-06 21:11:36 -07:00
joevt
b60d3061b7
escc: WR9 fixes.
...
Update write_regs[WR9] even though most or all of the bits are in master_int_cntrl.
Fix hardware reset for WR9. It's supposed to leave WR9_NO_VECTOR | WR9_VECTOR_INCLUDES_STATUS unchanged.
Fix channel reset for WR9. It's supposed to clear WR9_INTERRUPT_MASKING_WITHOUT_INTACK.
2024-05-06 21:11:21 -07:00
joevt
82e22174d6
escc: Set RR1 All Sent flag.
...
Helps booting Mac OS 8.1, etc.
2024-05-06 20:49:59 -07:00
