mirror of
https://github.com/dingusdev/dingusppc.git
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142 lines
4.7 KiB
C++
142 lines
4.7 KiB
C++
/*
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DingusPPC - The Experimental PowerPC Macintosh emulator
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Copyright (C) 2018-23 divingkatae and maximum
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(theweirdo) spatium
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(Contact divingkatae#1017 or powermax#2286 on Discord for more info)
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This program is free software: you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation, either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <https://www.gnu.org/licenses/>.
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*/
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/** @file SAA7187 Digital video encoder definitions. */
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#ifndef SAA7187_H
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#define SAA7187_H
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#include <devices/common/hwcomponent.h>
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#include <devices/common/i2c/i2c.h>
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namespace Saa7187Regs {
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enum Saa7187Regs : uint8_t { // i2c address is 0x44; fatman is at 0x46?
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IPC = 0x3a, // Input port control
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FMT0 = 0x01,
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FMT1 = 0x02,
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VUV2C = 0x04,
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VY2C = 0x08,
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CBENB = 0x80,
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OSDY0 = 0x42, // OSD LUT, 8 colors
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OSDU0 ,
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OSDV0 ,
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CHPS = 0x5a, // Chrominance phase
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GAINU = 0x5b, // Gain U
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GAINV = 0x5c, // Gain V
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BLCKL = 0x5d, // Gain U MSB, black level
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BLCKL0_5 = 0x3f,
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GAINU8 = 0x80,
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BLNNL = 0x5e, // Gain V MSB, blanking level
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BLNNL0_5 = 0x3f,
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GAINV8 = 0x80,
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CCRS = 0x60, // Cross-colour select
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CCRS0 = 0x40,
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CCRS1 = 0x80,
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SCTRL = 0x61, // Standard control
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FISE = 0x01,
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PAL = 0x02,
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SCBW = 0x04,
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RTCE = 0x08,
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YGS = 0x10,
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INPI1 = 0x20,
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DOWN = 0x40,
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BSTA = 0x62, // Burst amplitude
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BSTA0_6 = 0x7f,
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SQP = 0x80,
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FSC0 = 0x63, // Subcarrier 0
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FSC8 = 0x64, // Subcarrier 1
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FSC16 = 0x65, // Subcarrier 2
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FSC24 = 0x66, // Subcarrier 3
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// 0x25555555 = NTSC
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// 0x26798c0c = PAL
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L21O0 = 0x67, // Line 21 odd 0
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L21O1 = 0x68, // Line 21 odd 1
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L21E0 = 0x69, // Line 21 even 0
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L21E1 = 0x6a, // Line 21 even 1
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SCCLN = 0x6b, // CC line
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SCCLN0_4 = 0x1f,
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RCTRL = 0x6c, // RCV port control
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PRCV2 = 0x01,
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ORCV2 = 0x02,
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CBLF = 0x04,
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PRCV1 = 0x08,
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ORCV1 = 0x10,
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TRCV2 = 0x20,
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SRCV10 = 0x40,
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RCV11 = 0x80,
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RCM_CC = 0x6d, // RCM, CC mode
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CCEN0 = 0x01,
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CCEN1 = 0x02,
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SRCM10 = 0x04,
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SRCM11 = 0x08,
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HTRIG0 = 0x6e, // Horizontal trigger
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HTRIG8 = 0x6f, // Horizontal trigger
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HTRIG8_10 = 0x07,
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RES_VTRIG = 0x70, // fsc reset mode, Vertical trigger
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VTRIG0_4 = 0x1f,
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SBLBN = 0x20,
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PHRES0 = 0x40,
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HRES1 = 0x80,
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BMRQ0 = 0x71, // Begin master request
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EMRQ0 = 0x72, // End master request
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BMRQ8_EMRQ8 = 0x73, // MSBs master request
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BMRQ08_10 = 0x07,
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EMRQ08_10 = 0x70,
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BRCV0 = 0x77, // Begin RCV2 output
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ERCV0 = 0x78, // End RCV2 output
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BRCV8_ERCV8 = 0x79, // MSBs RCV2 output
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BRCV08_10 = 0x07,
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ERCV08_10 = 0x70,
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FLEN = 0x7a, // Field length
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FAL = 0x7b, // First active line
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LAL = 0x7c, // Last active line
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FLEN8_FAL8_LAL8 = 0x7d, // MSBs field control
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FLEN8_9 = 0x03,
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FAL8 = 0x10,
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LAL8 = 0x20,
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last_reg = 0x7e,
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};
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}; // namespace Saa7187Regs
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class Saa7187VideoEncoder : public I2CDevice, public HWComponent
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{
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public:
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Saa7187VideoEncoder(uint8_t dev_addr);
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~Saa7187VideoEncoder() = default;
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// I2CDevice methods
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void start_transaction();
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bool send_subaddress(uint8_t sub_addr);
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bool send_byte(uint8_t data);
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bool receive_byte(uint8_t* p_data);
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private:
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uint8_t my_addr = 0;
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uint8_t reg_num = 0;
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int pos = 0;
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uint8_t regs[Saa7187Regs::last_reg] = {0};
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};
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#endif // SAA7187_H
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