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The expansion rom base register indicates the size of the expansion rom by the number of bits that remain zero after code attempts to set them all to 1. For example, a result of fffe0000 means 128K. The 11 least significant bits are ignored in the size calculation, which means the minimum rom size is indicated by fffff800 = 2K. Handle the case where an expansion rom file might not have a size that is a multiple of 2 or is not greater than 2K. Bytes between the end of the file and the end of the calculated rom size are set to 0xff.
268 lines
8.6 KiB
C++
268 lines
8.6 KiB
C++
/*
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DingusPPC - The Experimental PowerPC Macintosh emulator
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Copyright (C) 2018-22 divingkatae and maximum
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(theweirdo) spatium
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(Contact divingkatae#1017 or powermax#2286 on Discord for more info)
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This program is free software: you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation, either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <https://www.gnu.org/licenses/>.
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*/
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#include <devices/common/pci/pcidevice.h>
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#include <devices/common/viacuda.h>
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#include <endianswap.h>
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#include <loguru.hpp>
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#include <memaccess.h>
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#include <cinttypes>
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#include <fstream>
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#include <string>
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PCIDevice::PCIDevice(std::string name)
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{
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this->pci_name = name;
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this->pci_rd_stat = [this]() { return this->status; };
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this->pci_rd_cmd = [this]() { return this->command; };
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this->pci_rd_bist = []() { return 0; };
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this->pci_rd_lat_timer = [this]() { return this->lat_timer; };
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this->pci_rd_cache_lnsz = [this]() { return this->cache_ln_sz; };
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this->pci_wr_stat = [](uint16_t val) {};
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this->pci_wr_cmd = [this](uint16_t cmd) { this->command = cmd; };
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this->pci_wr_bist = [](uint8_t val) {};
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this->pci_wr_lat_timer = [this](uint8_t val) { this->lat_timer = val; };
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this->pci_wr_cache_lnsz = [this](uint8_t val) { this->cache_ln_sz = val; };
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this->pci_notify_bar_change = [](int bar_num) {};
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};
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uint32_t PCIDevice::pci_cfg_read(uint32_t reg_offs, uint32_t size)
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{
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uint32_t result;
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switch (reg_offs) {
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case PCI_CFG_DEV_ID:
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result = (this->device_id << 16) | (this->vendor_id);
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break;
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case PCI_CFG_STAT_CMD:
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result = (this->pci_rd_stat() << 16) | (this->pci_rd_cmd());
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break;
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case PCI_CFG_CLASS_REV:
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result = this->class_rev;
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break;
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case PCI_CFG_DWORD_3:
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result = (pci_rd_bist() << 24) | (this->hdr_type << 16) |
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(pci_rd_lat_timer() << 8) | pci_rd_cache_lnsz();
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break;
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case PCI_CFG_BAR0:
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case PCI_CFG_BAR1:
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case PCI_CFG_BAR2:
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case PCI_CFG_BAR3:
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case PCI_CFG_BAR4:
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case PCI_CFG_BAR5:
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result = this->bars[(reg_offs - 0x10) >> 2];
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break;
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case PCI_CFG_SUBSYS_ID:
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result = (this->subsys_id << 16) | (this->subsys_vndr);
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break;
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case PCI_CFG_ROM_BAR:
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result = this->exp_rom_bar;
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break;
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case PCI_CFG_DWORD_15:
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result = (max_lat << 24) | (min_gnt << 16) | (irq_pin << 8) | irq_line;
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break;
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case PCI_CFG_CAP_PTR:
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result = cap_ptr;
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break;
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default:
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LOG_F(
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WARNING, "%s: attempt to read from reserved/unimplemented register @%02x.%c",
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this->pci_name.c_str(), reg_offs,
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size == 4 ? 'l' : size == 2 ? 'w' : size == 1 ? 'b' : '0' + size
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);
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return 0;
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}
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if (size == 4) {
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return BYTESWAP_32(result);
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} else {
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return read_mem_rev(((uint8_t *)&result) + (reg_offs & 3), size);
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}
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}
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void PCIDevice::pci_cfg_write(uint32_t reg_offs, uint32_t value, uint32_t size)
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{
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uint32_t data;
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if (size == 4) {
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data = BYTESWAP_32(value);
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} else {
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// get current register content as DWORD and update it partially
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data = BYTESWAP_32(this->pci_cfg_read(reg_offs, 4));
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write_mem_rev(((uint8_t *)&data) + (reg_offs & 3), value, size);
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}
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switch (reg_offs) {
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case PCI_CFG_STAT_CMD:
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this->pci_wr_stat(data >> 16);
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this->pci_wr_cmd(data & 0xFFFFU);
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break;
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case PCI_CFG_DWORD_3:
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this->pci_wr_bist(data >> 24);
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this->pci_wr_lat_timer((data >> 8) & 0xFF);
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this->pci_wr_cache_lnsz(data & 0xFF);
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break;
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case PCI_CFG_BAR0:
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case PCI_CFG_BAR1:
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case PCI_CFG_BAR2:
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case PCI_CFG_BAR3:
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case PCI_CFG_BAR4:
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case PCI_CFG_BAR5:
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if (data == 0xFFFFFFFFUL) {
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this->do_bar_sizing((reg_offs - 0x10) >> 2);
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} else {
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this->set_bar_value((reg_offs - 0x10) >> 2, data);
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}
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break;
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case PCI_CFG_ROM_BAR:
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if (data == 0xFFFFF800UL) {
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this->exp_rom_bar = this->exp_bar_cfg;
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} else {
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this->exp_rom_bar = (data & 0xFFFFF801UL);
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if (this->exp_rom_bar & 1) {
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this->map_exp_rom_mem();
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} else {
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LOG_F(WARNING, "%s: unmapping of expansion ROM not implemented yet",
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this->pci_name.c_str());
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}
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}
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break;
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case PCI_CFG_DWORD_15:
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this->irq_line = data >> 24;
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break;
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default:
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LOG_F(
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WARNING, "%s: attempt to write to reserved/unimplemented register @%02x.%c = %0*x",
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this->pci_name.c_str(), reg_offs,
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size == 4 ? 'l' : size == 2 ? 'w' : size == 1 ? 'b' : '0' + size, size * 2, value
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);
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}
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}
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int PCIDevice::attach_exp_rom_image(const std::string img_path)
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{
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std::ifstream img_file;
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int result = 0;
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this->exp_bar_cfg = 0; // tell the world we got no ROM for now
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try {
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img_file.open(img_path, std::ios::in | std::ios::binary);
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if (img_file.fail()) {
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throw std::runtime_error("could not open specified ROM dump image");
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}
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// validate image file
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uint8_t buf[4] = { 0 };
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img_file.seekg(0, std::ios::beg);
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img_file.read((char *)buf, sizeof(buf));
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if (buf[0] != 0x55 || buf[1] != 0xAA) {
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throw std::runtime_error("invalid expansion ROM signature");
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}
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// determine image size
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img_file.seekg(0, std::ios::end);
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uint32_t exp_rom_image_size = img_file.tellg();
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// verify PCI struct offset
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uint32_t pci_struct_offset = 0;
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img_file.seekg(0x18, std::ios::beg);
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img_file.read((char *)&pci_struct_offset, sizeof(pci_struct_offset));
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if (pci_struct_offset > exp_rom_image_size) {
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throw std::runtime_error("invalid PCI structure offset");
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}
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// verify PCI struct signature
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img_file.seekg(pci_struct_offset, std::ios::beg);
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img_file.read((char *)buf, sizeof(buf));
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if (buf[0] != 'P' || buf[1] != 'C' || buf[2] != 'I' || buf[3] != 'R') {
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throw std::runtime_error("unexpected PCI struct signature");
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}
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// find minimum rom size for the rom file (power of 2 >= 0x800)
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for (this->exp_rom_size = 1 << 11; this->exp_rom_size < exp_rom_image_size; this->exp_rom_size <<= 1) {}
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// ROM image ok - go ahead and load it
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this->exp_rom_data = std::unique_ptr<uint8_t[]> (new uint8_t[this->exp_rom_size]);
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img_file.seekg(0, std::ios::beg);
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img_file.read((char *)this->exp_rom_data.get(), exp_rom_image_size);
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memset(&this->exp_rom_data[exp_rom_image_size], 0xff, this->exp_rom_size - exp_rom_image_size);
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if (exp_rom_image_size == this->exp_rom_size) {
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LOG_F(INFO, "%s: loaded expansion rom (%d bytes).", this->pci_name.c_str(), this->exp_rom_size);
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}
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else {
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LOG_F(WARNING, "%s: loaded expansion rom (%d bytes adjusted to %d bytes).", this->pci_name.c_str(), exp_rom_image_size, this->exp_rom_size);
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}
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this->exp_bar_cfg = ~(this->exp_rom_size - 1);
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}
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catch (const std::exception& exc) {
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LOG_F(ERROR, "PCIDevice: %s", exc.what());
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result = -1;
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}
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img_file.close();
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return result;
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}
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void PCIDevice::do_bar_sizing(int bar_num)
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{
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this->bars[bar_num] = this->bars_cfg[bar_num];
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}
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void PCIDevice::set_bar_value(int bar_num, uint32_t value)
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{
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uint32_t bar_cfg = this->bars_cfg[bar_num];
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if (bar_cfg & 1) {
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this->bars[bar_num] = (value & 0xFFFFFFFCUL) | 1;
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} else {
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if (bar_cfg & 6) {
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ABORT_F("Invalid or unsupported PCI space type: %d", (bar_cfg >> 1) & 3);
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}
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this->bars[bar_num] = (value & 0xFFFFFFF0UL) | (bar_cfg & 0xF);
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}
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this->pci_notify_bar_change(bar_num);
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}
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void PCIDevice::map_exp_rom_mem()
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{
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uint32_t rom_addr, rom_size;
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rom_addr = this->exp_rom_bar & 0xFFFFF800UL;
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rom_size = ~this->exp_bar_cfg + 1;
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if (!this->exp_rom_addr || this->exp_rom_addr != rom_addr) {
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this->host_instance->pci_register_mmio_region(rom_addr, rom_size, this);
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this->exp_rom_addr = rom_addr;
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}
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}
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