mirror of
https://github.com/dingusdev/dingusppc.git
synced 2024-11-09 23:05:16 +00:00
f61854a0ae
PCIDevice - supports_io_space method now uses a flag has_io_space which is automatically set for PCI bridges or PCI devices that have an I/O BAR. atirage - Devices that have I/O BARs don't need a supports_io_space method. mpc106 - Devices that don't have I/O methods don't need a supports_io_space method.
320 lines
10 KiB
C++
320 lines
10 KiB
C++
/*
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DingusPPC - The Experimental PowerPC Macintosh emulator
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Copyright (C) 2018-23 divingkatae and maximum
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(theweirdo) spatium
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(Contact divingkatae#1017 or powermax#2286 on Discord for more info)
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This program is free software: you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation, either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <https://www.gnu.org/licenses/>.
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*/
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#include <devices/common/pci/pcidevice.h>
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#include <endianswap.h>
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#include <loguru.hpp>
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#include <memaccess.h>
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#include <cinttypes>
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#include <fstream>
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#include <cstring>
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#include <string>
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PCIDevice::PCIDevice(std::string name)
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{
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this->name = name;
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this->pci_name = name;
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this->pci_rd_stat = [this]() { return this->status; };
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this->pci_rd_cmd = [this]() { return this->command; };
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this->pci_rd_bist = []() { return 0; };
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this->pci_rd_lat_timer = [this]() { return this->lat_timer; };
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this->pci_rd_cache_lnsz = [this]() { return this->cache_ln_sz; };
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this->pci_wr_stat = [](uint16_t val) {};
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this->pci_wr_cmd = [this](uint16_t cmd) { this->command = cmd; };
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this->pci_wr_bist = [](uint8_t val) {};
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this->pci_wr_lat_timer = [this](uint8_t val) { this->lat_timer = val; };
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this->pci_wr_cache_lnsz = [this](uint8_t val) { this->cache_ln_sz = val; };
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this->pci_notify_bar_change = [](int bar_num) {};
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};
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uint32_t PCIDevice::pci_cfg_read(uint32_t reg_offs, AccessDetails &details)
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{
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switch (reg_offs) {
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case PCI_CFG_DEV_ID:
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return (this->device_id << 16) | (this->vendor_id);
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case PCI_CFG_STAT_CMD:
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return (this->pci_rd_stat() << 16) | (this->pci_rd_cmd());
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case PCI_CFG_CLASS_REV:
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return this->class_rev;
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case PCI_CFG_DWORD_3:
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return (pci_rd_bist() << 24) | (this->hdr_type << 16) |
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(pci_rd_lat_timer() << 8) | pci_rd_cache_lnsz();
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case PCI_CFG_BAR0:
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case PCI_CFG_BAR1:
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case PCI_CFG_BAR2:
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case PCI_CFG_BAR3:
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case PCI_CFG_BAR4:
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case PCI_CFG_BAR5:
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return this->bars[(reg_offs - 0x10) >> 2];
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case PCI_CFG_SUBSYS_ID:
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return (this->subsys_id << 16) | (this->subsys_vndr);
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case PCI_CFG_ROM_BAR:
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return this->exp_rom_bar;
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case PCI_CFG_DWORD_15:
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return (max_lat << 24) | (min_gnt << 16) | (irq_pin << 8) | irq_line;
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case PCI_CFG_CAP_PTR:
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return cap_ptr;
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}
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LOG_READ_UNIMPLEMENTED_CONFIG_REGISTER();
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return 0;
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}
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void PCIDevice::pci_cfg_write(uint32_t reg_offs, uint32_t value, AccessDetails &details)
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{
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switch (reg_offs) {
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case PCI_CFG_STAT_CMD:
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this->pci_wr_stat(value >> 16);
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this->pci_wr_cmd(value & 0xFFFFU);
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break;
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case PCI_CFG_DWORD_3:
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this->pci_wr_bist(value >> 24);
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this->pci_wr_lat_timer((value >> 8) & 0xFF);
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this->pci_wr_cache_lnsz(value & 0xFF);
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break;
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case PCI_CFG_BAR0:
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case PCI_CFG_BAR1:
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case PCI_CFG_BAR2:
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case PCI_CFG_BAR3:
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case PCI_CFG_BAR4:
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case PCI_CFG_BAR5:
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this->set_bar_value((reg_offs - 0x10) >> 2, value);
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break;
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case PCI_CFG_ROM_BAR:
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this->pci_wr_exp_rom_bar(value);
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break;
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case PCI_CFG_DWORD_15:
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this->irq_line = value >> 24;
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break;
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default:
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LOG_WRITE_UNIMPLEMENTED_CONFIG_REGISTER();
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}
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}
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void PCIDevice::setup_bars(std::vector<BarConfig> cfg_data)
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{
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for (auto cfg_entry : cfg_data) {
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if (cfg_entry.bar_num > 5) {
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ABORT_F("BAR number %d out of range", cfg_entry.bar_num);
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}
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this->bars_cfg[cfg_entry.bar_num] = cfg_entry.bar_cfg;
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}
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this->finish_config_bars();
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}
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int PCIDevice::attach_exp_rom_image(const std::string img_path)
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{
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std::ifstream img_file;
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int result = 0;
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this->exp_bar_cfg = 0; // tell the world we got no ROM for now
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try {
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img_file.open(img_path, std::ios::in | std::ios::binary);
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if (img_file.fail()) {
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throw std::runtime_error("could not open specified ROM dump image");
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}
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// validate image file
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uint8_t buf[4] = { 0 };
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img_file.seekg(0, std::ios::beg);
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img_file.read((char *)buf, sizeof(buf));
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if (buf[0] != 0x55 || buf[1] != 0xAA) {
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throw std::runtime_error("invalid expansion ROM signature");
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}
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// determine image size
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img_file.seekg(0, std::ios::end);
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size_t exp_rom_image_size = img_file.tellg();
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if (exp_rom_image_size > 4*1024*1024) {
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throw std::runtime_error("expansion ROM file too large");
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}
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// verify PCI struct offset
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uint16_t pci_struct_offset = 0;
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img_file.seekg(0x18, std::ios::beg);
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img_file.read((char *)&pci_struct_offset, sizeof(pci_struct_offset));
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if (pci_struct_offset > exp_rom_image_size) {
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throw std::runtime_error("invalid PCI structure offset");
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}
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// verify PCI struct signature
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img_file.seekg(pci_struct_offset, std::ios::beg);
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img_file.read((char *)buf, sizeof(buf));
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if (buf[0] != 'P' || buf[1] != 'C' || buf[2] != 'I' || buf[3] != 'R') {
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throw std::runtime_error("unexpected PCI struct signature");
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}
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// find minimum rom size for the rom file (power of 2 >= 0x800)
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for (this->exp_rom_size = 1 << 11; this->exp_rom_size < exp_rom_image_size; this->exp_rom_size <<= 1) {}
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// ROM image ok - go ahead and load it
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this->exp_rom_data = std::unique_ptr<uint8_t[]> (new uint8_t[this->exp_rom_size]);
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img_file.seekg(0, std::ios::beg);
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img_file.read((char *)this->exp_rom_data.get(), exp_rom_image_size);
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memset(&this->exp_rom_data[exp_rom_image_size], 0xff, this->exp_rom_size - exp_rom_image_size);
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if (exp_rom_image_size == this->exp_rom_size) {
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LOG_F(INFO, "%s: loaded expansion rom (%d bytes).",
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this->pci_name.c_str(), this->exp_rom_size);
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}
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else {
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LOG_F(WARNING, "%s: loaded expansion rom (%d bytes adjusted to %d bytes).",
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this->pci_name.c_str(), (int)exp_rom_image_size, this->exp_rom_size);
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}
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this->exp_bar_cfg = ~(this->exp_rom_size - 1);
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}
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catch (const std::exception& exc) {
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LOG_F(ERROR, "PCIDevice: %s", exc.what());
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result = -1;
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}
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img_file.close();
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return result;
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}
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void PCIDevice::set_bar_value(int bar_num, uint32_t value)
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{
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uint32_t bar_cfg = this->bars_cfg[bar_num];
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switch (bars_typ[bar_num]) {
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case PCIBarType::Unused:
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return;
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case PCIBarType::Io_16_Bit:
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case PCIBarType::Io_32_Bit:
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this->bars[bar_num] = (value & bar_cfg & ~3) | (bar_cfg & 3);
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break;
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case PCIBarType::Mem_20_Bit:
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case PCIBarType::Mem_32_Bit:
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case PCIBarType::Mem_64_Bit_Lo:
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this->bars[bar_num] = (value & bar_cfg & ~0xF) | (bar_cfg & 0xF);
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break;
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case PCIBarType::Mem_64_Bit_Hi:
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this->bars[bar_num] = value & bar_cfg;
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break;
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}
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if (value != 0xFFFFFFFFUL) // don't notify the device during BAR sizing
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this->pci_notify_bar_change(bar_num);
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}
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void PCIDevice::finish_config_bars()
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{
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for (int bar_num = 0; bar_num < this->num_bars; bar_num++) {
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uint32_t bar_cfg = this->bars_cfg[bar_num];
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if (!bar_cfg) // skip unimplemented BARs
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continue;
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if (bar_cfg & 1) {
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bars_typ[bar_num] = (bar_cfg & 0xffff0000) ? PCIBarType::Io_32_Bit :
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PCIBarType::Io_16_Bit;
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has_io_space = true;
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}
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else {
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int pci_space_type = (bar_cfg >> 1) & 3;
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switch (pci_space_type) {
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case 0:
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bars_typ[bar_num] = PCIBarType::Mem_32_Bit;
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break;
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case 1:
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bars_typ[bar_num] = PCIBarType::Mem_20_Bit;
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break;
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case 2:
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if (bar_num >= num_bars - 1) {
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ABORT_F("%s: BAR %d cannot be 64-bit",
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this->pci_name.c_str(), bar_num);
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}
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else if (this->bars_cfg[bar_num+1] == 0) {
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ABORT_F("%s: 64-bit BAR %d has zero for upper 32 bits",
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this->pci_name.c_str(), bar_num);
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}
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else {
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bars_typ[bar_num++] = PCIBarType::Mem_64_Bit_Lo;
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bars_typ[bar_num ] = PCIBarType::Mem_64_Bit_Hi;
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}
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break;
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default:
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ABORT_F("%s: invalid or unsupported PCI space type %d for BAR %d",
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this->pci_name.c_str(), pci_space_type, bar_num);
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} // switch pci_space_type
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}
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} // for bar_num
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}
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void PCIDevice::map_exp_rom_mem()
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{
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uint32_t rom_addr = this->exp_rom_bar & this->exp_bar_cfg;
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if (rom_addr) {
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if (this->exp_rom_addr != rom_addr) {
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this->unmap_exp_rom_mem();
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uint32_t rom_size = ~this->exp_bar_cfg + 1;
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this->host_instance->pci_register_mmio_region(rom_addr, rom_size, this);
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this->exp_rom_addr = rom_addr;
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}
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}
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else {
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this->unmap_exp_rom_mem();
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}
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}
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void PCIDevice::unmap_exp_rom_mem()
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{
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if (this->exp_rom_addr) {
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uint32_t rom_size = ~this->exp_bar_cfg + 1;
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this->host_instance->pci_unregister_mmio_region(exp_rom_addr, rom_size, this);
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this->exp_rom_addr = 0;
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}
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}
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void PCIDevice::pci_wr_exp_rom_bar(uint32_t data)
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{
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if (!this->exp_bar_cfg) {
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return;
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}
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if ((data & this->exp_bar_cfg) == this->exp_bar_cfg) {
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// doing sizing
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this->exp_rom_bar = (data & (this->exp_bar_cfg | 1));
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} else {
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this->exp_rom_bar = (data & (this->exp_bar_cfg | 1));
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if (this->exp_rom_bar & 1) {
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this->map_exp_rom_mem();
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}
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else {
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this->unmap_exp_rom_mem();
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}
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}
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}
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