mirror of
https://github.com/dingusdev/dingusppc.git
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87 lines
2.5 KiB
C++
87 lines
2.5 KiB
C++
/*
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DingusPPC - The Experimental PowerPC Macintosh emulator
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Copyright (C) 2018-24 divingkatae and maximum
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(theweirdo) spatium
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(Contact divingkatae#1017 or powermax#2286 on Discord for more info)
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This program is free software: you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation, either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <https://www.gnu.org/licenses/>.
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*/
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/** Aspem Memory Controller definitions.
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Aspen is a custom memory controller and PCI bridge
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designed especially for Pippin.
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Kudos to Keith Kaisershot @ blitter.net for his precious technical help!
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*/
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#ifndef ASPEN_MEMCTRL_H
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#define ASPEN_MEMCTRL_H
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#include <devices/common/mmiodevice.h>
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#include <devices/memctrl/memctrlbase.h>
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#include <cinttypes>
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#include <memory>
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/** Aspen register definitions. */
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enum {
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SYSTEM_ID = 4, // 0x10
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CHIP_REV = 5, // 0x14
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MEM_CONFIG = 6, // 0x18
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GPIO_IN = 12, // 0x30
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GPIO_ENABLE = 13, // 0x34
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GPIO_OUT = 14, // 0x38
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};
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#define ASPEN_REV_1 0x01000000
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/** Aspen RAM bank size bits. */
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enum {
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BANK_SIZE_1MB = 0, // 256Kx16, 9 rows x 9 columns
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BANK_SIZE_4MB = 1, // 1Mx16, 10 rows x 10 columns
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BANK_SIZE_16MB = 2, // 4Mx16, 11 rows x 11 columns
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BANK_SIZE_8MB = 3, // 2Mx16, 11 rows x 10 columns
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};
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class AspenCtrl : public MemCtrlBase, public MMIODevice {
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public:
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AspenCtrl();
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~AspenCtrl() = default;
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static std::unique_ptr<HWComponent> create() {
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return std::unique_ptr<AspenCtrl>(new AspenCtrl());
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}
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int device_postinit() override;
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void insert_ram_dimm(int bank_num, uint32_t capacity);
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// MMIODevice methods
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uint32_t read(uint32_t rgn_start, uint32_t offset, int size) override;
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void write(uint32_t rgn_start, uint32_t offset, uint32_t value, int size) override;
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private:
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int map_phys_ram();
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uint8_t gpio_enable = 0;
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uint32_t bank_sizes[4] = {};
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uint8_t ram_config = (BANK_SIZE_16MB << 6) | (BANK_SIZE_16MB << 4) |
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(BANK_SIZE_16MB << 2) | (BANK_SIZE_16MB << 0);
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};
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#endif // ASPEN_MEMCTRL_H
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