mirror of
https://github.com/dingusdev/dingusppc.git
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Result of running IWYU (https://include-what-you-use.org/) and applying most of the suggestions about unncessary includes and forward declarations. Was motivated by observing that <thread> was being included in ppcopcodes.cpp even though it was unused (found while researching the use of threads), but seems generally good to help with build times and correctness.
311 lines
9.9 KiB
C++
311 lines
9.9 KiB
C++
/*
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DingusPPC - The Experimental PowerPC Macintosh emulator
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Copyright (C) 2018-23 divingkatae and maximum
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(theweirdo) spatium
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(Contact divingkatae#1017 or powermax#2286 on Discord for more info)
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This program is free software: you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation, either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <https://www.gnu.org/licenses/>.
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*/
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/** Bandit/Chaos ARBus-to-PCI Bridge emulation. */
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#include <devices/common/pci/bandit.h>
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#include <devices/deviceregistry.h>
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#include <devices/memctrl/memctrlbase.h>
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#include <endianswap.h>
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#include <loguru.hpp>
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#include <machines/machinebase.h>
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#include <cinttypes>
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const int MultiplyDeBruijnBitPosition2[] =
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{
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0, 1, 28, 2, 29, 14, 24, 3, 30, 22, 20, 15, 25, 17, 4, 8,
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31, 27, 13, 23, 21, 19, 16, 7, 26, 12, 18, 6, 11, 5, 10, 9
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};
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/** finds the position of the bit that is set */
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#define WHAT_BIT_SET(val) (MultiplyDeBruijnBitPosition2[(uint32_t)(val * 0x077CB531U) >> 27])
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BanditPciDevice::BanditPciDevice(int bridge_num, std::string name, int dev_id, int rev)
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: PCIDevice(name)
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{
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supports_types(HWCompType::PCI_DEV);
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// prepare the PCI config header
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this->vendor_id = PCI_VENDOR_APPLE;
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this->device_id = dev_id;
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this->class_rev = 0x06000000 | (rev & 0xFFU);
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this->cache_ln_sz = 8;
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this->command = 0x16;
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// make several PCI config space registers read-only
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this->pci_wr_cmd = [](uint16_t cmd) {}; // command register
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this->pci_wr_cache_lnsz = [](uint8_t val) {}; // cache line size register
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// set the bits in the fine address space field of the address mask register
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// that correspond to the 32MB assigned PCI address space of this Bandit.
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// This initialization is implied by the device functionality.
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this->addr_mask = 3 << ((bridge_num & 3) * 2);
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// initial PCI number + chip mode: big endian, interrupts & VGA space disabled
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this->mode_ctrl = ((bridge_num & 3) << 2) | 3;
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this->rd_hold_off_cnt = 8;
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}
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uint32_t BanditPciDevice::pci_cfg_read(uint32_t reg_offs, AccessDetails &details)
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{
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if (reg_offs < 64) {
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return PCIDevice::pci_cfg_read(reg_offs, details);
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}
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switch (reg_offs) {
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case BANDIT_ADDR_MASK:
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return this->addr_mask;
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case BANDIT_MODE_SELECT:
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return this->mode_ctrl;
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case BANDIT_ARBUS_RD_HOLD_OFF:
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return this->rd_hold_off_cnt;
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default:
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LOG_READ_UNIMPLEMENTED_CONFIG_REGISTER();
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}
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return 0;
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}
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void BanditPciDevice::pci_cfg_write(uint32_t reg_offs, uint32_t value, AccessDetails &details)
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{
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if (reg_offs < 64) {
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PCIDevice::pci_cfg_write(reg_offs, value, details);
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return;
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}
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switch (reg_offs) {
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case BANDIT_ADDR_MASK:
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this->addr_mask = value;
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this->verbose_address_space();
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return;
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case BANDIT_MODE_SELECT:
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this->mode_ctrl = value;
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return;
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case BANDIT_ARBUS_RD_HOLD_OFF:
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this->rd_hold_off_cnt = value & 0x1F;
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return;
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default:
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LOG_WRITE_UNIMPLEMENTED_CONFIG_REGISTER();
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}
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}
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void BanditPciDevice::verbose_address_space()
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{
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uint32_t mask;
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int bit_pos;
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if (!this->addr_mask) {
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return;
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}
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LOG_F(INFO, "%s address spaces:", this->pci_name.c_str());
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// verbose coarse aka 256MB memory regions
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for (mask = 0x10000, bit_pos = 0; mask != 0x80000000UL; mask <<= 1, bit_pos++) {
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if (this->addr_mask & mask) {
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uint32_t start_addr = bit_pos << 28;
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LOG_F(INFO, "- 0x%X ... 0x%X", start_addr, start_addr + 0x0FFFFFFFU);
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}
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}
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// verbose fine aka 16MB memory regions
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for (mask = 0x1, bit_pos = 0; mask != 0x10000UL; mask <<= 1, bit_pos++) {
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if (this->addr_mask & mask) {
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uint32_t start_addr = (bit_pos << 24) + 0xF0000000UL;
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LOG_F(INFO, "- 0x%X ... 0x%X", start_addr, start_addr + 0x00FFFFFFU);
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}
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}
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}
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uint32_t BanditHost::read(uint32_t rgn_start, uint32_t offset, int size)
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{
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switch (offset >> 22) {
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case 3: // CONFIG_DATA
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int bus_num, dev_num, fun_num;
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uint8_t reg_offs;
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AccessDetails details;
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PCIDevice *device;
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cfg_setup(offset, size, bus_num, dev_num, fun_num, reg_offs, details, device);
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details.flags |= PCI_CONFIG_READ;
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if (device) {
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return pci_conv_rd_data(device->pci_cfg_read(reg_offs, details), details);
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}
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LOG_READ_NON_EXISTENT_PCI_DEVICE();
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return 0xFFFFFFFFUL; // PCI spec §6.1
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case 2: // CONFIG_ADDR
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return BYTESWAP_32(this->config_addr);
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default: // I/O space
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return pci_io_read_broadcast(offset, size);
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}
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}
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void BanditHost::write(uint32_t rgn_start, uint32_t offset, uint32_t value, int size)
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{
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switch (offset >> 22) {
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case 3: // CONFIG_DATA
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int bus_num, dev_num, fun_num;
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uint8_t reg_offs;
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AccessDetails details;
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PCIDevice *device;
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cfg_setup(offset, size, bus_num, dev_num, fun_num, reg_offs, details, device);
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details.flags |= PCI_CONFIG_WRITE;
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if (device) {
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if (size == 4 && !details.offset) { // aligned DWORD writes -> fast path
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device->pci_cfg_write(reg_offs, BYTESWAP_32(value), details);
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return;
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}
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// otherwise perform necessary data transformations -> slow path
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uint32_t old_val = details.size == 4 ? 0 : device->pci_cfg_read(reg_offs, details);
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uint32_t new_val = pci_conv_wr_data(old_val, value, details);
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device->pci_cfg_write(reg_offs, new_val, details);
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return;
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}
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LOG_WRITE_NON_EXISTENT_PCI_DEVICE();
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break;
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case 2: // CONFIG_ADDR
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this->config_addr = BYTESWAP_32(value);
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break;
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default: // I/O space
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pci_io_write_broadcast(offset, size, value);
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}
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}
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inline void BanditHost::cfg_setup(uint32_t offset, int size, int &bus_num,
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int &dev_num, int &fun_num, uint8_t ®_offs,
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AccessDetails &details, PCIDevice *&device)
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{
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device = NULL;
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details.size = size;
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details.offset = offset & 3;
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fun_num = FUN_NUM();
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reg_offs = REG_NUM();
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if (this->config_addr & BANDIT_CAR_TYPE) { // type 1 configuration command
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details.flags = PCI_CONFIG_TYPE_1;
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bus_num = BUS_NUM();
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dev_num = DEV_NUM();
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device = pci_find_device(bus_num, dev_num, fun_num);
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return;
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}
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details.flags = PCI_CONFIG_TYPE_0;
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bus_num = 0; // use dummy value for bus number
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uint32_t idsel = this->config_addr & 0xFFFFF800U;
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if (!SINGLE_BIT_SET(idsel)) {
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for (dev_num = -1, idsel = this->config_addr; idsel; idsel >>= 1, dev_num++) {}
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LOG_F(ERROR, "%s: config_addr 0x%08x does not contain valid IDSEL",
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this->name.c_str(), (uint32_t)this->config_addr);
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return;
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}
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dev_num = WHAT_BIT_SET(idsel);
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if (this->dev_map.count(DEV_FUN(dev_num, fun_num))) {
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device = this->dev_map[DEV_FUN(dev_num, fun_num)];
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}
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}
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int BanditHost::device_postinit()
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{
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std::string pci_dev_name;
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static const std::map<std::string, int> pci_slots = {
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{"pci_A1", DEV_FUN(0xD,0)}, {"pci_B1", DEV_FUN(0xE,0)}, {"pci_C1", DEV_FUN(0xF,0)}
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};
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for (auto& slot : pci_slots) {
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pci_dev_name = GET_STR_PROP(slot.first);
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if (!pci_dev_name.empty()) {
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this->attach_pci_device(pci_dev_name, slot.second);
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}
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}
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return 0;
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}
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Bandit::Bandit(int bridge_num, std::string name, int dev_id, int rev)
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: BanditHost()
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{
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this->name = name;
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supports_types(HWCompType::PCI_HOST);
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this->base_addr = 0xF0000000 + ((bridge_num & 3) << 25);
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MemCtrlBase *mem_ctrl = dynamic_cast<MemCtrlBase *>
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(gMachineObj->get_comp_by_type(HWCompType::MEM_CTRL));
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// add memory mapped I/O region for Bandit control registers
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// This region has the following layout:
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// base_addr + 0x000000 --> I/O space
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// base_addr + 0x800000 --> CONFIG_ADDR
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// base_addr + 0xC00000 --> CONFIG_DATA
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// base_addr + 0x1000000 --> pass-through memory space (not included below)
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mem_ctrl->add_mmio_region(base_addr, 0x01000000, this);
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// connnect Bandit PCI device
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this->my_pci_device = unique_ptr<BanditPciDevice>(
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new BanditPciDevice(bridge_num, name, dev_id, rev)
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);
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this->pci_register_device(DEV_FUN(BANDIT_DEV,0), this->my_pci_device.get());
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}
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Chaos::Chaos(std::string name) : BanditHost()
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{
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this->name = name;
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supports_types(HWCompType::PCI_HOST);
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MemCtrlBase *mem_ctrl = dynamic_cast<MemCtrlBase *>
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(gMachineObj->get_comp_by_type(HWCompType::MEM_CTRL));
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// add memory mapped I/O region for Chaos control registers
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// This region has the following layout:
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// base_addr + 0x800000 --> CONFIG_ADDR
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// base_addr + 0xC00000 --> CONFIG_DATA
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mem_ctrl->add_mmio_region(0xF0000000UL, 0x01000000, this);
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}
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static const PropMap Bandit_Properties = {
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{"pci_A1",
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new StrProperty("")},
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{"pci_B1",
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new StrProperty("")},
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{"pci_C1",
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new StrProperty("")},
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};
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static const DeviceDescription Bandit1_Descriptor = {
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Bandit::create_first, {}, Bandit_Properties
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};
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static const DeviceDescription PsxPci1_Descriptor = {
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Bandit::create_psx_first, {}, Bandit_Properties
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};
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static const DeviceDescription Chaos_Descriptor = {
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Chaos::create, {}, {}
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};
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REGISTER_DEVICE(Bandit1, Bandit1_Descriptor);
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REGISTER_DEVICE(PsxPci1, PsxPci1_Descriptor);
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REGISTER_DEVICE(Chaos, Chaos_Descriptor);
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