124 lines
4.3 KiB
C++
124 lines
4.3 KiB
C++
/*
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DingusPPC - The Experimental PowerPC Macintosh emulator
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Copyright (C) 2018-23 divingkatae and maximum
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(theweirdo) spatium
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(Contact divingkatae#1017 or powermax#2286 on Discord for more info)
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This program is free software: you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation, either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <https://www.gnu.org/licenses/>.
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*/
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#ifndef ATI_RAGE_H
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#define ATI_RAGE_H
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#include <devices/common/pci/pcidevice.h>
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#include <devices/video/atirage128defs.h>
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#include <devices/video/displayid.h>
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#include <devices/video/videoctrl.h>
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#include <cinttypes>
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#include <memory>
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/* Rage 128 PLL register indices. */
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enum {
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CLK_PIN_CNTL = 1,
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PPLL_CNTL = 2,
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PPLL_REF_DIV = 3,
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PPLL_DIV_0 = 4,
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PPLL_DIV_1 = 5,
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PPLL_DIV_2 = 6,
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PPLL_DIV_3 = 7,
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VCLK_ECP_CNTL = 8,
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HTOTAL_CNTL = 9,
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X_MPLL_REF_FB_DIV = 10,
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XPLL_CNTL = 11,
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XDLL_CNTL = 12,
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XCLK_CNTL = 13,
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MPLL_CNTL = 14,
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MCLK_CNTL = 15,
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FCP_CNTL = 18,
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PPLL_TEST_CNTL = 42,
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P2PLL_DIV_0 = 43,
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POWER_MGMT = 47
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};
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class ATIRage128 : public PCIDevice, public VideoCtrlBase {
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public:
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ATIRage128(uint16_t dev_id);
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~ATIRage128() = default;
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static std::unique_ptr<HWComponent> create_gl() {
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return std::unique_ptr<ATIRage128>(new ATIRage128(ATI_RAGE_128_GL_DEV_ID));
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}
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static std::unique_ptr<HWComponent> create_vr() {
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return std::unique_ptr<ATIRage128>(new ATIRage128(ATI_RAGE_128_VR_DEV_ID));
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}
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static std::unique_ptr<HWComponent> create_pro_128() {
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return std::unique_ptr<ATIRage128>(new ATIRage128(ATI_RAGE_128_PRO_DEV_ID));
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}
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// MMIODevice methods
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//uint32_t read(uint32_t rgn_start, uint32_t offset, int size);
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//void write(uint32_t rgn_start, uint32_t offset, uint32_t value, int size);
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// PCI device methods
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uint32_t pci_cfg_read(uint32_t reg_offs, AccessDetails& details);
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//void pci_cfg_write(uint32_t reg_offs, uint32_t value, AccessDetails& details);
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// I/O space access methods
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// bool pci_io_read(uint32_t offset, uint32_t size, uint32_t* res);
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//bool pci_io_write(uint32_t offset, uint32_t value, uint32_t size);
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protected:
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//void notify_bar_change(int bar_num);
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const char* get_reg_name(uint32_t reg_offset);
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//bool io_access_allowed(uint32_t offset);
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uint32_t read_reg(uint32_t reg_offset, uint32_t size);
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//void write_reg(uint32_t reg_addr, uint32_t value, uint32_t size);
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//float calc_pll_freq(int scale, int fb_div);
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//void verbose_pixel_format(int crtc_index);
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//void crtc_update();
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//void crtc_enable();
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//void draw_hw_cursor(uint8_t* dst_buf, int dst_pitch);
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//void get_cursor_position(int& x, int& y);
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private:
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void change_one_bar(uint32_t& aperture, uint32_t aperture_size, uint32_t aperture_new, int bar_num);
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uint32_t regs[2048] = {}; // internal registers
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uint8_t cfg[128] = {}; // config registers
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uint8_t crt[100] = {}; // internal CRT registers
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uint8_t plls[32] = {}; // internal PLL registers
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// Video RAM variables
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std::unique_ptr<uint8_t[]> vram_ptr;
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uint32_t vram_size;
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uint32_t aperture_count = 3;
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uint32_t aperture_size[3] = {0x1000000, 0x100, 0x1000};
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uint32_t aperture_flag[3] = {0, 1, 0};
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uint32_t aperture_base = 0;
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uint32_t io_base = 0;
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uint8_t user_cfg = 8;
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std::unique_ptr<DisplayID> disp_id;
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// DAC interface state
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uint8_t dac_wr_index = 0; // current DAC color index for writing
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uint8_t dac_rd_index = 0; // current DAC color index for reading
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uint8_t dac_mask = 0; // current DAC mask
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int comp_index = 0; // current color component index
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uint8_t color_buf[3] = {}; // buffer for storing DAC color components
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};
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#endif // ATI_RAGE_H
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