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https://github.com/mlaux/gb6.git
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it would help if it would actually write to memory
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parent
160e28fe6d
commit
79c42f6397
33
src/cpu.c
33
src/cpu.c
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@ -188,11 +188,30 @@ static u16 pop(struct cpu *cpu)
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return read16(cpu, cpu->sp - 1) << 8 | read16(cpu, cpu->sp - 2);
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return read16(cpu, cpu->sp - 1) << 8 | read16(cpu, cpu->sp - 2);
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}
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}
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static u16 add16(struct cpu *cpu, u16 src)
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{
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clear_flag(cpu, FLAG_SIGN);
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int total = read_hl(cpu) + src; // promoted to int
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if (total > 0xffff) {
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set_flag(cpu, FLAG_CARRY);
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} else {
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clear_flag(cpu, FLAG_CARRY);
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}
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if (((cpu->h & 0xf) + ((src >> 8) & 0xf)) & 0x10) {
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// true if carry from bit 11 to bit 12
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set_flag(cpu, FLAG_HALF_CARRY);
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} else {
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clear_flag(cpu, FLAG_HALF_CARRY);
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}
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return total & 0xffff;
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}
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void cpu_step(struct cpu *cpu)
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void cpu_step(struct cpu *cpu)
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{
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{
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u8 temp;
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u8 temp;
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u8 opc = cpu->mem_read(cpu->mem_model, cpu->pc);
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u8 opc = cpu->mem_read(cpu->mem_model, cpu->pc);
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printf("0x%04x %s\n", cpu->pc, instructions[opc].format);
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cpu->pc++;
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cpu->pc++;
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switch (opc) {
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switch (opc) {
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case 0: // NOP
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case 0: // NOP
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@ -344,6 +363,9 @@ void cpu_step(struct cpu *cpu)
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write_hl(cpu, read16(cpu, cpu->pc));
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write_hl(cpu, read16(cpu, cpu->pc));
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cpu->pc += 2;
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cpu->pc += 2;
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break;
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break;
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case 0x29: // ADD HL,HL
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add16(cpu, read_hl(cpu));
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break;
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case 0x31: // LD SP,d16
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case 0x31: // LD SP,d16
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cpu->sp = read16(cpu, cpu->pc);
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cpu->sp = read16(cpu, cpu->pc);
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cpu->pc += 2;
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cpu->pc += 2;
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@ -355,6 +377,14 @@ void cpu_step(struct cpu *cpu)
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case 0x94:
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case 0x94:
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subtract(cpu, cpu->h);
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subtract(cpu, cpu->h);
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break;
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break;
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case 0xc0: // RET NZ
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if (!flag_isset(cpu, FLAG_ZERO)) {
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cpu->pc = pop(cpu);
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}
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break;
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case 0xc9: // RET
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cpu->pc = pop(cpu);
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break;
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case 0xcd: // CALL a16
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case 0xcd: // CALL a16
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temp = read16(cpu, cpu->pc);
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temp = read16(cpu, cpu->pc);
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cpu->pc += 2;
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cpu->pc += 2;
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@ -397,7 +427,6 @@ void cpu_step(struct cpu *cpu)
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cpu->pc++;
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cpu->pc++;
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break;
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break;
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case 0xf3: // DI
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case 0xf3: // DI
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printf("disable interrupts\n");
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break;
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break;
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default:
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default:
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printf("unknown opcode 0x%02x %s\n", opc, instructions[opc].format);
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printf("unknown opcode 0x%02x %s\n", opc, instructions[opc].format);
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18
src/dmg.c
18
src/dmg.c
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@ -1,3 +1,5 @@
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#include <stdio.h>
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#include "cpu.h"
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#include "cpu.h"
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#include "rom.h"
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#include "rom.h"
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#include "dmg.h"
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#include "dmg.h"
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@ -33,4 +35,20 @@ u8 dmg_read(void *_dmg, u16 address)
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void dmg_write(void *_dmg, u16 address, u8 data)
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void dmg_write(void *_dmg, u16 address, u8 data)
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{
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{
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struct dmg *dmg = (struct dmg *) _dmg;
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struct dmg *dmg = (struct dmg *) _dmg;
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if (address < 0x4000) {
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printf("warning: writing 0x%04x in rom\n", address);
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dmg->rom->data[address] = data;
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} else if (address < 0x8000) {
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// TODO switchable rom bank
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printf("warning: writing 0x%04x in rom\n", address);
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dmg->rom->data[address] = data;
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} else if (address < 0xa000) {
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dmg->video_ram[address - 0x8000] = data;
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} else if (address < 0xc000) {
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// TODO switchable ram bank
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} else if (address < 0xe000) {
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dmg->main_ram[address - 0xc000] = data;
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} else {
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// not sure about any of this yet
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}
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}
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}
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