Matthew Laux
9395b336e9
make wram_base and hram_base required, make dmg_new take RAM arrays, simplify and de-hack stack paths
2026-08-12 19:49:00 -05:00
Matthew Laux
6ca1ae93be
make cycles in the JIT count up again, counting down was more complicated and didn't help performance at all
2026-08-06 23:13:45 -05:00
Matthew Laux
985666d727
"deadline-gating budget_touch" omg
2026-07-27 16:49:53 -05:00
Matthew Laux
f621a0d703
use GetKeys to avoid wasting time in GetNextEvent, use shared memory access helpers instead of inlining
2026-07-27 16:42:16 -05:00
Matthew Laux
42acc41a0d
WIP compiler improvements
2026-07-27 11:24:31 -05:00
Matthew Laux
aa0bf50bfa
handle timing edge cases, don;t loop if condition is false on entry (fixes trainer entry in pokered)
2026-07-22 20:50:25 -05:00
Matthew Laux
4029b832bc
shift optimization on page table lookup, replace all fixed branch targets with patching
2026-07-14 18:37:59 -05:00
Matthew Laux
a778e8a79b
track cycles in the block then count them at the end. kind of a wash?
2026-07-14 14:27:49 -05:00
Matthew Laux
ed37a7c185
half-remove cycles_per_exit, optimize STAT interrupts, but will remove
2026-07-12 17:18:06 -05:00
Matthew Laux
a4293c0fd2
deadline scheduler for events, improve timer, and add no-op serial support - fix FFL, FFA, alleyway
...
カエルのために is now slower?
2026-07-12 00:14:56 -05:00
Matthew Laux
7610d3ce96
biased page tables, scaled index on 68020+, interrupt fixes (that may or may not have actually improved compatibility)
2026-07-08 20:12:32 -05:00
Tanner Fokkens
7caca2f056
Fix LY wait and HALT timing in CGB double speed mode
...
In double speed mode, dmg_sync_hw() halves CPU cycles before adding
to frame_cycles. The timing functions (compile_ly_wait, compile_ly_wait_reg,
compile_halt) compute D2 in PPU-domain units, but only half gets applied
to frame_cycles, causing the target LY to never be reached and an
infinite re-entry loop during game init.
Add effective_double_speed byte to JIT context and emit a runtime check
in all three timing functions to double D2 when double speed is active.
2026-02-06 16:06:36 -08:00
Matthew Laux
23f752af23
move timing functions to their own file, LY wait on registers too
2026-01-25 22:16:22 -06:00
Matthew Laux
Tanner Fokkens