In double speed mode, dmg_sync_hw() halves CPU cycles before adding
to frame_cycles. The timing functions (compile_ly_wait, compile_ly_wait_reg,
compile_halt) compute D2 in PPU-domain units, but only half gets applied
to frame_cycles, causing the target LY to never be reached and an
infinite re-entry loop during game init.
Add effective_double_speed byte to JIT context and emit a runtime check
in all three timing functions to double D2 when double speed is active.
- Remove dmg_reads/dmg_writes debug counters that ran on every memory
access, saving 2-4 cycles per read/write operation
- Replace O(n) LY calculation loop with O(1) division-based formula,
eliminating up to 154 iterations for games that poll LY infrequently
Major fixes:
- CALL, RET, RST, and their conditional variants now properly check
stack_in_ram before accessing memory via A3. Previously they assumed
A3 was always a valid native pointer, causing memory corruption when
in slow mode (A3 held raw GB SP value like 0xFFFE).
- Fixed initial SP setup to use fast mode with A3 pointing to actual
HRAM memory instead of holding the raw GB SP value.
- STOP instruction now calls runtime handler to check for CGB speed
switch instead of immediately halting. Enables double-speed mode.
- HDMA cancellation: writing to HDMA5 with bit 7=0 while HDMA is active
now cancels the transfer (fixes Pokemon Crystal).
Safety improvements:
- Added src_ptr bounds check to prevent m68k_offsets array overflow
- Added PC validation to reject execution in VRAM/external RAM
- Added PC history ring buffer for crash debugging
Tested: Klax, Link's Awakening DX, Wario Land 3 now boot successfully.
Matthew Laux
Tanner Fokkens