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7caca2f056
In double speed mode, dmg_sync_hw() halves CPU cycles before adding to frame_cycles. The timing functions (compile_ly_wait, compile_ly_wait_reg, compile_halt) compute D2 in PPU-domain units, but only half gets applied to frame_cycles, causing the target LY to never be reached and an infinite re-entry loop during game init. Add effective_double_speed byte to JIT context and emit a runtime check in all three timing functions to double D2 when double speed is active.
199 lines
7.4 KiB
C
199 lines
7.4 KiB
C
#include <stdio.h>
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#include <stdint.h>
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#include <stdlib.h>
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#include "compiler.h"
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#include "emitters.h"
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#include "interop.h"
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#include "timing.h"
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// synthesize wait for LY to reach target value
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// detects ldh a, [$44]; cp N; jr cc, back
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void compile_ly_wait(
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struct code_block *block,
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uint8_t target_ly,
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uint8_t jr_opcode,
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uint16_t next_pc
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) {
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// jr nz (0x20): loop while LY != N, exit when LY == N -> wait for N
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// jr z (0x28): loop while LY == N, exit when LY != N -> wait for N+1
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// jr c (0x38): loop while LY < N, exit when LY >= N -> wait for N
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uint8_t wait_ly = target_ly;
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if (jr_opcode == 0x28) {
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wait_ly = (target_ly + 1) % 154;
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}
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uint32_t target_cycles = wait_ly * 456;
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// load frame_cycles pointer
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emit_movea_l_disp_an_an(block, JIT_CTX_FRAME_CYCLES_PTR, REG_68K_A_CTX, REG_68K_A_SCRATCH_1);
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// load frame_cycles into d0
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emit_move_l_ind_an_dn(block, REG_68K_A_SCRATCH_1, REG_68K_D_SCRATCH_0);
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// compare frame_cycles to target
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emit_cmpi_l_imm_dn(block, target_cycles, REG_68K_D_SCRATCH_0);
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emit_bcc_s(block, 10); // if frame_cycles >= target, wait until next frame
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// same frame: d2 = target - frame_cycles
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emit_move_l_dn(block, REG_68K_D_CYCLE_COUNT, target_cycles);
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emit_sub_l_dn_dn(block, REG_68K_D_SCRATCH_0, REG_68K_D_CYCLE_COUNT);
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emit_bra_b(block, 8);
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// next frame: d2 = (70224 + target) - frame_cycles
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emit_move_l_dn(block, REG_68K_D_CYCLE_COUNT, 70224 + target_cycles);
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emit_sub_l_dn_dn(block, REG_68K_D_SCRATCH_0, REG_68K_D_CYCLE_COUNT);
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// double D2 if effective double speed is active (CPU cycles = 2x PPU cycles)
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emit_tst_b_disp_an(block, JIT_CTX_EFF_DOUBLE_SPEED, REG_68K_A_CTX);
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emit_beq_b(block, 2);
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emit_add_l_dn_dn(block, REG_68K_D_CYCLE_COUNT, REG_68K_D_CYCLE_COUNT);
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// set A to the LY value we waited for
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emit_moveq_dn(block, REG_68K_D_A, wait_ly);
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// exit to C
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emit_move_l_dn(block, REG_68K_D_NEXT_PC, next_pc);
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emit_rts(block);
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}
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// get GB register value into D0, zero-extended to word
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void compile_get_gb_reg_d0(struct code_block *block, int gb_reg)
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{
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switch (gb_reg) {
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case GB_REG_B:
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emit_move_l_dn_dn(block, REG_68K_D_BC, REG_68K_D_SCRATCH_0);
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emit_swap(block, REG_68K_D_SCRATCH_0);
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break;
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case GB_REG_C:
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emit_move_l_dn_dn(block, REG_68K_D_BC, REG_68K_D_SCRATCH_0);
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break;
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case GB_REG_D:
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emit_move_l_dn_dn(block, REG_68K_D_DE, REG_68K_D_SCRATCH_0);
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emit_swap(block, REG_68K_D_SCRATCH_0);
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break;
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case GB_REG_E:
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emit_move_l_dn_dn(block, REG_68K_D_DE, REG_68K_D_SCRATCH_0);
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break;
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case GB_REG_H:
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emit_move_w_an_dn(block, REG_68K_A_HL, REG_68K_D_SCRATCH_0);
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emit_lsr_w_imm_dn(block, 8, REG_68K_D_SCRATCH_0);
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break;
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case GB_REG_L:
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emit_move_w_an_dn(block, REG_68K_A_HL, REG_68K_D_SCRATCH_0);
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break;
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case GB_REG_HL:
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emit_move_w_an_dn(block, REG_68K_A_HL, REG_68K_D_SCRATCH_1);
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compile_call_dmg_read(block);
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break;
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default:
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printf("invalid register for compile_get_gb_reg_d0\n");
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exit(1);
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}
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emit_andi_w_dn(block, REG_68K_D_SCRATCH_0, 0xff);
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}
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// synthesize wait for LY to reach target value from a register
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// detects ldh a, [$44]; cp <reg>; jr cc, back
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void compile_ly_wait_reg(
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struct code_block *block,
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int gb_reg,
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uint8_t jr_opcode,
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uint16_t next_pc
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) {
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// Get the target LY value into D0
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compile_get_gb_reg_d0(block, gb_reg);
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// jr nz (0x20): loop while LY != N, exit when LY == N -> wait for N
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// jr z (0x28): loop while LY == N, exit when LY != N -> wait for N+1
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// jr c (0x38): loop while LY < N, exit when LY >= N -> wait for N
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if (jr_opcode == 0x28) {
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// wait_ly = (target + 1) % 154
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emit_addq_w_dn(block, REG_68K_D_SCRATCH_0, 1);
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emit_cmpi_w_imm_dn(block, 154, REG_68K_D_SCRATCH_0);
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emit_bcs_b(block, 2); // skip the clear if D0 < 154
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emit_moveq_dn(block, REG_68K_D_SCRATCH_0, 0);
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}
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// D0 = wait_ly; save to stack for later
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emit_push_l_dn(block, REG_68K_D_SCRATCH_0);
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// D0 = target_cycles = wait_ly * 456
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emit_mulu_w_imm_dn(block, 456, REG_68K_D_SCRATCH_0);
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// load frame_cycles pointer into A0
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emit_movea_l_disp_an_an(block, JIT_CTX_FRAME_CYCLES_PTR, REG_68K_A_CTX, REG_68K_A_SCRATCH_1);
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// load frame_cycles into D1
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emit_move_l_ind_an_dn(block, REG_68K_A_SCRATCH_1, REG_68K_D_SCRATCH_1);
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// compare frame_cycles (D1) to target_cycles (D0)
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emit_cmp_l_dn_dn(block, REG_68K_D_SCRATCH_0, REG_68K_D_SCRATCH_1);
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emit_bcc_s(block, 6); // if frame_cycles >= target_cycles, skip to next_frame
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// same frame: d2 = target_cycles - frame_cycles = d0 - d1
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emit_move_l_dn_dn(block, REG_68K_D_SCRATCH_0, REG_68K_D_CYCLE_COUNT);
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emit_sub_l_dn_dn(block, REG_68K_D_SCRATCH_1, REG_68K_D_CYCLE_COUNT);
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emit_bra_b(block, 10);
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// next frame: d2 = (70224 + target_cycles) - frame_cycles
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emit_move_l_dn_dn(block, REG_68K_D_SCRATCH_0, REG_68K_D_CYCLE_COUNT);
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emit_addi_l_dn(block, REG_68K_D_CYCLE_COUNT, 70224);
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emit_sub_l_dn_dn(block, REG_68K_D_SCRATCH_1, REG_68K_D_CYCLE_COUNT);
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// double D2 if effective double speed is active (CPU cycles = 2x PPU cycles)
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emit_tst_b_disp_an(block, JIT_CTX_EFF_DOUBLE_SPEED, REG_68K_A_CTX);
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emit_beq_b(block, 2);
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emit_add_l_dn_dn(block, REG_68K_D_CYCLE_COUNT, REG_68K_D_CYCLE_COUNT);
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// restore wait_ly from stack into A register
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emit_pop_l_dn(block, REG_68K_D_A);
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// exit to C
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emit_move_l_dn(block, REG_68K_D_NEXT_PC, next_pc);
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emit_rts(block);
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}
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// only good for vblank interrupts for now...
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void compile_halt(struct code_block *block, int next_pc)
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{
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// movea.l JIT_CTX_FRAME_CYCLES_PTR(a4), a0 ; 4 bytes
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// move.l (a0), d0 ; 2 bytes
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// cmpi.l #65664, d0 ; 6 bytes
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// bcc.s _frame_end ; 2 bytes
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// move.l #65664, d2 ; 6 bytes
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// sub.l d0, d2 ; 2 bytes
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// bra.s _exit ; 2 bytes
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// _frame_end
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// move.l #70224, d2 ; 6 bytes
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// sub.l d0, d2 ; 2 bytes
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// _exit
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// move.l #next_pc, d3 ; 6 bytes
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// rts ; 2 bytes
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// load frame_cycles pointer
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emit_movea_l_disp_an_an(block, JIT_CTX_FRAME_CYCLES_PTR, REG_68K_A_CTX, REG_68K_A_SCRATCH_1);
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emit_move_l_ind_an_dn(block, REG_68K_A_SCRATCH_1, REG_68K_D_SCRATCH_0);
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// see if already in vblank
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emit_cmpi_l_imm_dn(block, 65664, REG_68K_D_SCRATCH_0);
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emit_bcc_s(block, 10);
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// before vblank: d2 = 65664 - frame_cycles
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emit_move_l_dn(block, REG_68K_D_CYCLE_COUNT, 65664);
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emit_sub_l_dn_dn(block, REG_68K_D_SCRATCH_0, REG_68K_D_CYCLE_COUNT);
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emit_bra_b(block, 8);
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// in vblank: d2 = (70224 - frame_cycles) + 65664
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emit_move_l_dn(block, REG_68K_D_CYCLE_COUNT, 70224 + 65664);
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emit_sub_l_dn_dn(block, REG_68K_D_SCRATCH_0, REG_68K_D_CYCLE_COUNT);
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// double D2 if effective double speed is active (CPU cycles = 2x PPU cycles)
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emit_tst_b_disp_an(block, JIT_CTX_EFF_DOUBLE_SPEED, REG_68K_A_CTX);
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emit_beq_b(block, 2);
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emit_add_l_dn_dn(block, REG_68K_D_CYCLE_COUNT, REG_68K_D_CYCLE_COUNT);
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// exit to C
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emit_move_l_dn(block, REG_68K_D_NEXT_PC, next_pc);
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emit_rts(block);
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}
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