mirror of
https://github.com/mlaux/gb6.git
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303 lines
9.8 KiB
C
303 lines
9.8 KiB
C
/* Game Boy emulator for 68k Macs
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Compiled with Symantec THINK C 5.0
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(c) 2013 Matt Laux
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z80.c - Game Boy CPU emulation */
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#include <stdio.h>
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#include "gb_types.h"
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#include "mem_model.h"
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#include "z80.h"
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static u8 insn_cycles[] = { 0 };
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static void set(z80_regs *regs, int flag) { regs->af.ind.f |= flag; }
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static void clear(z80_regs *regs, int flag) { regs->af.ind.f &= ~flag; }
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static void inc_with_carry(z80_regs *regs, u8 *reg)
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{
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clear(regs, FLAG_SUBTRACT);
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if(*reg == 0xff || *reg == 0x0f)
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set(regs, FLAG_HALF_CARRY);
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(*reg)++;
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if(*reg == 0)
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set(regs, FLAG_ZERO);
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}
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static void dec_with_carry(z80_regs *regs, u8 *reg)
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{
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set(regs, FLAG_SUBTRACT);
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if(*reg == 0x00 || *reg == 0x10)
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set(regs, FLAG_HALF_CARRY);
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(*reg)--;
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if(*reg == 0)
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set(regs, FLAG_ZERO);
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}
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static void rotate_left(z80_regs *regs, u8 *reg)
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{
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// copy old leftmost bit to carry flag
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regs->af.ind.f = (*reg & 0x80) >> 3 | (regs->af.ind.f & ~FLAG_CARRY);
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// rotate
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*reg <<= 1;
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// restore leftmost (now rightmost) bit
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*reg |= (regs->af.ind.f & FLAG_CARRY) >> 4;
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}
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static void rotate_right(z80_regs *regs, u8 *reg)
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{
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// copy old rightmost bit to carry flag
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regs->af.ind.f = (*reg & 0x01) << 4 | (regs->af.ind.f & ~FLAG_CARRY);
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// rotate
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*reg >>= 1;
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// restore rightmost bit to left
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*reg |= (regs->af.ind.f & FLAG_CARRY) << 3;
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}
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static void xor(z80_regs *regs, u8 value)
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{
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regs->af.ind.a ^= value;
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if(regs->af.ind.a == 0)
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set(regs, FLAG_ZERO);
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clear(regs, FLAG_SUBTRACT);
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clear(regs, FLAG_HALF_CARRY);
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clear(regs, FLAG_CARRY);
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}
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z80_state *z80_create(void)
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{
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z80_state *state;
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state = (z80_state *) NewPtr(sizeof(z80_state));
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state->regs = (z80_regs *) NewPtr(sizeof(z80_regs));
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state->ram = (u8 *) NewPtr(GB_RAM_SIZE);
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state->regs->pc = 0;
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return state;
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}
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void z80_destroy(z80_state *state)
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{
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DisposPtr((char *) state->regs);
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DisposPtr((char *) state->ram);
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DisposPtr((char *) state);
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}
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void z80_dump_regs(z80_state *state)
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{
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char line1[256], line2[256], line3[256], line4[256];
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sprintf(line1, " PC: %04x, Opcode: %02x", state->current_pc, state->current_op);
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sprintf(line2, " A: %02x, F: %02x, B: %02x, C: %02x", state->regs->af.ind.a,
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state->regs->af.ind.f, state->regs->bc.ind.b, state->regs->bc.ind.c);
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sprintf(line3, " D: %02x, E: %02x, H: %02x, L: %02x", state->regs->de.ind.d,
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state->regs->de.ind.e, state->regs->hl.ind.h, state->regs->hl.ind.l);
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sprintf(line4, " SP: %04x, PC: %04x", state->regs->sp, state->regs->pc);
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line1[0] = strlen(line1);
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line2[0] = strlen(line2);
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line3[0] = strlen(line3);
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line4[0] = strlen(line4);
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ParamText((void *) line1, (void *) line2, (void *) line3, (void *) line4);
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Alert(129, NULL);
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}
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#define load(dst, src) ((dst) = (src))
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void z80_run(z80_state *state)
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{
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z80_regs *regs = state->regs;
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u16 old;
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for(;;) {
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u8 op = mem_read(regs->pc);
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state->current_op = op;
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state->current_pc = regs->pc;
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z80_dump_regs(state);
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regs->pc++;
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switch(op) {
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// 8-bit immediate loads
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case 0x06: load(regs->bc.ind.b, mem_read(regs->pc)); regs->pc++; break;
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case 0x0e: load(regs->bc.ind.c, mem_read(regs->pc)); regs->pc++; break;
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case 0x16: load(regs->de.ind.d, mem_read(regs->pc)); regs->pc++; break;
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case 0x1e: load(regs->de.ind.e, mem_read(regs->pc)); regs->pc++; break;
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case 0x26: load(regs->hl.ind.h, mem_read(regs->pc)); regs->pc++; break;
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case 0x2e: load(regs->hl.ind.l, mem_read(regs->pc)); regs->pc++; break;
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case 0x36: mem_write(regs->hl.val, mem_read(regs->pc)); regs->pc++; break;
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case 0x3e: load(regs->af.ind.a, mem_read(regs->pc)); regs->pc++; break;
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// 8-bit register -> *register copies
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// src = A
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case 0x02: mem_write(regs->bc.val, regs->af.ind.a); break; // *BC = A
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case 0x12: mem_write(regs->de.val, regs->af.ind.a); break; // *DE = A
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case 0x22: mem_write(regs->hl.val, regs->af.ind.a); regs->hl.val++; break;
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case 0x32: mem_write(regs->hl.val, regs->af.ind.a); regs->hl.val--; break;
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// dest = A
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case 0x0a: load(regs->af.ind.a, mem_read(regs->bc.val)); break; // A = *BC
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case 0x1a: load(regs->af.ind.a, mem_read(regs->de.val)); break; // A = *DE
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case 0x2a: load(regs->af.ind.a, mem_read(regs->hl.val)); regs->hl.val++; break;
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case 0x3a: load(regs->af.ind.a, mem_read(regs->hl.val)); regs->hl.val--; break;
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// dest = *HL
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case 0x70: mem_write(regs->hl.val, regs->bc.ind.b); break;
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case 0x71: mem_write(regs->hl.val, regs->bc.ind.c); break;
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case 0x72: mem_write(regs->hl.val, regs->de.ind.d); break;
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case 0x73: mem_write(regs->hl.val, regs->de.ind.e); break;
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case 0x74: mem_write(regs->hl.val, regs->hl.ind.h); break;
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case 0x75: mem_write(regs->hl.val, regs->hl.ind.l); break;
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// 0x76 is HALT
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case 0x77: mem_write(regs->hl.val, regs->af.ind.a); break;
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// 8-bit register -> register copies
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// dest = A
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case 0x78: load(regs->af.ind.a, regs->bc.ind.b); break;
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case 0x79: load(regs->af.ind.a, regs->bc.ind.c); break;
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case 0x7a: load(regs->af.ind.a, regs->de.ind.d); break;
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case 0x7b: load(regs->af.ind.a, regs->de.ind.e); break;
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case 0x7c: load(regs->af.ind.a, regs->hl.ind.h); break;
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case 0x7d: load(regs->af.ind.a, regs->hl.ind.l); break;
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case 0x7e: load(regs->af.ind.a, mem_read(regs->hl.val)); break;
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case 0x7f: break; // copy A to A
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// dest = B
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case 0x40: break; // copy B to B
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case 0x41: load(regs->bc.ind.b, regs->bc.ind.c); break;
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case 0x42: load(regs->bc.ind.b, regs->de.ind.d); break;
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case 0x43: load(regs->bc.ind.b, regs->de.ind.e); break;
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case 0x44: load(regs->bc.ind.b, regs->hl.ind.h); break;
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case 0x45: load(regs->bc.ind.b, regs->hl.ind.l); break;
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case 0x46: load(regs->bc.ind.b, mem_read(regs->hl.val)); break;
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case 0x47: load(regs->bc.ind.b, regs->af.ind.a); break;
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// dest = C
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case 0x48: load(regs->bc.ind.c, regs->bc.ind.b); break;
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case 0x49: break; // copy C to C
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case 0x4a: load(regs->bc.ind.c, regs->de.ind.d); break;
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case 0x4b: load(regs->bc.ind.c, regs->de.ind.e); break;
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case 0x4c: load(regs->bc.ind.c, regs->hl.ind.h); break;
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case 0x4d: load(regs->bc.ind.c, regs->hl.ind.l); break;
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case 0x4e: load(regs->bc.ind.c, mem_read(regs->hl.val)); break;
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case 0x4f: load(regs->bc.ind.c, regs->af.ind.a); break;
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// dest = D
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case 0x50: load(regs->de.ind.d, regs->bc.ind.b); break;
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case 0x51: load(regs->de.ind.d, regs->bc.ind.c); break;
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case 0x52: break; // copy D to D
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case 0x53: load(regs->de.ind.d, regs->de.ind.e); break;
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case 0x54: load(regs->de.ind.d, regs->hl.ind.h); break;
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case 0x55: load(regs->de.ind.d, regs->hl.ind.l); break;
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case 0x56: load(regs->de.ind.d, mem_read(regs->hl.val)); break;
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case 0x57: load(regs->de.ind.d, regs->af.ind.a); break;
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// dest = E
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case 0x58: load(regs->de.ind.e, regs->bc.ind.b); break;
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case 0x59: load(regs->de.ind.e, regs->bc.ind.c); break;
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case 0x5a: load(regs->de.ind.e, regs->de.ind.d); break;
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case 0x5b: break; // copy E to E
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case 0x5c: load(regs->de.ind.e, regs->hl.ind.h); break;
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case 0x5d: load(regs->de.ind.e, regs->hl.ind.l); break;
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case 0x5e: load(regs->de.ind.e, mem_read(regs->hl.val)); break;
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case 0x5f: load(regs->de.ind.e, regs->af.ind.a); break;
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// dest = H
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case 0x60: load(regs->hl.ind.h, regs->bc.ind.b); break;
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case 0x61: load(regs->hl.ind.h, regs->bc.ind.c); break;
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case 0x62: load(regs->hl.ind.h, regs->de.ind.d); break;
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case 0x63: load(regs->hl.ind.h, regs->de.ind.e); break;
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case 0x64: break; // copy H to H
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case 0x65: load(regs->hl.ind.h, regs->hl.ind.l); break;
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case 0x66: load(regs->hl.ind.h, mem_read(regs->hl.val)); break;
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case 0x67: load(regs->hl.ind.h, regs->af.ind.a); break;
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// dest = L
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case 0x68: load(regs->hl.ind.l, regs->bc.ind.b); break;
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case 0x69: load(regs->hl.ind.l, regs->bc.ind.c); break;
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case 0x6a: load(regs->hl.ind.l, regs->de.ind.d); break;
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case 0x6b: load(regs->hl.ind.l, regs->de.ind.e); break;
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case 0x6c: load(regs->hl.ind.l, regs->hl.ind.h); break;
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case 0x6d: break; // copy L to L
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case 0x6e: load(regs->hl.ind.l, mem_read(regs->hl.val)); break;
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case 0x6f: load(regs->hl.ind.l, regs->af.ind.a); break;
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case 0x00: break; // NOP
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case 0x01: // LD BC, 0xNNNN
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regs->bc.val = mem_read_word(regs->pc);
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regs->pc += 2;
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break;
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case 0x03: // INC BC
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regs->bc.val++;
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break;
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case 0x04: // INC B
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inc_with_carry(regs, ®s->bc.ind.b);
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break;
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case 0x05: // DEC B
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dec_with_carry(regs, ®s->bc.ind.b);
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break;
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case 0x07: // RLCA
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rotate_left(regs, ®s->af.ind.a);
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break;
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case 0x08: // LD (0xNNNN), SP
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mem_write_word(regs->pc, regs->sp);
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regs->pc += 2;
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break;
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case 0x09: // ADD HL, BC
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clear(regs, FLAG_SUBTRACT);
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old = regs->hl.val;
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regs->hl.val += regs->bc.val;
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if(regs->hl.val < old) // overflow occured
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set(regs, FLAG_CARRY);
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if(regs->hl.val >= 0x1000) // half carry on high byte
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set(regs, FLAG_HALF_CARRY);
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break;
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case 0x0b: // DEC BC
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regs->bc.val--;
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break;
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case 0x0c: // INC C
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inc_with_carry(regs, ®s->bc.ind.c);
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break;
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case 0x0d: // DEC C
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dec_with_carry(regs, ®s->bc.ind.c);
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break;
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case 0x0f: // RRCA
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rotate_right(regs, ®s->af.ind.a);
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break;
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case 0x10: // STOP
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// 2 bytes long for some reason
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regs->pc++;
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return;
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break;
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case 0x11: // LD DE, 0xNNNN
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regs->de.val = mem_read_word(regs->pc);
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regs->pc += 2;
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break;
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case 0xc3:
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regs->pc = mem_read_word(regs->pc);
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break;
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// XOR
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case 0xaf: xor(regs, regs->af.ind.a); break;
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case 0xa8: xor(regs, regs->bc.ind.b); break;
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case 0xa9: xor(regs, regs->bc.ind.c); break;
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case 0xaa: xor(regs, regs->de.ind.d); break;
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case 0xab: xor(regs, regs->de.ind.e); break;
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case 0xac: xor(regs, regs->hl.ind.h); break;
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case 0xad: xor(regs, regs->hl.ind.l); break;
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case 0xae: xor(regs, mem_read(regs->hl.val)); break;
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case 0xee: xor(regs, mem_read(regs->pc)); regs->pc++; break;
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default:
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break;
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}
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}
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} |