diff --git a/SheepShaver/src/CrossPlatform/sigsegv.cpp b/SheepShaver/src/CrossPlatform/sigsegv.cpp
index 87a8c6bf..8c6546f3 100644
--- a/SheepShaver/src/CrossPlatform/sigsegv.cpp
+++ b/SheepShaver/src/CrossPlatform/sigsegv.cpp
@@ -2606,18 +2606,25 @@ sigsegv_address_t sigsegv_get_fault_instruction_address(sigsegv_info_t *SIP)
 	return SIP->pc;
 }
 
-extern uint8_t gZeroPage[0x3000], gKernelData[0x2000];
-extern uint8_t *RAMBaseHost, *ROMEndHost;
+#if defined(__APPLE__) && defined(__x86_64__)
 
-inline static uint8_t *cnvAdr(uint32_t a) {
-	if (a < 0x3000) return &gZeroPage[a];
-	else if ((a & ~0x1fff) == 0x68ffe000 || (a & ~0x1fff) == 0x5fffe000) return &gKernelData[a & 0x1fff];
-	return (uint8_t *)(long)a;
+extern uint8_t gZeroPage[0x3000], gKernelData[0x2000];
+extern uint32_t RAMBase, ROMBase, ROMEnd;
+
+template<typename T> T safeLoad(uint32_t a) {
+	if (a < 0x3000) return *(T *)&gZeroPage[a];
+	else if ((a & ~0x1fff) == 0x68ffe000 || (a & ~0x1fff) == 0x5fffe000) return *(T *)&gKernelData[a & 0x1fff];
+	else if (a >= RAMBase && a < ROMEnd) return *(T *)(uint64_t)a;
+	return 0;
 }
-inline static bool isValidAdr(uint8_t *a) {
-	return (a >= RAMBaseHost && a < ROMEndHost) || (a >= gZeroPage && a < &gZeroPage[0x3000]) || (a >= gKernelData && a < &gKernelData[0x2000]);
+template<typename T> void safeStore(uint32_t a, T d) {
+	if (a < 0x3000) *(T *)&gZeroPage[a] = d;
+	else if ((a & ~0x1fff) == 0x68ffe000 || (a & ~0x1fff) == 0x5fffe000) *(T *)&gKernelData[a & 0x1fff] = d;
+	else if (a >= RAMBase && a < ROMBase) *(T *)(uint64_t)a = d;
 }
 
+#endif
+
 // This function handles the badaccess to memory.
 // It is called from the signal handler or the exception handler.
 static bool handle_badaccess(SIGSEGV_FAULT_HANDLER_ARGLIST_1)
@@ -2641,15 +2648,13 @@ static bool handle_badaccess(SIGSEGV_FAULT_HANDLER_ARGLIST_1)
 	switch (rip[0]) {
 		case 0x48:
 			if (rip[1] == 0xc7 && rip[2] == 0) {
-				uint8_t *p = cnvAdr(ts->__rax);
-				if (isValidAdr(p)) *(uint64_t *)p = rip[3] | rip[4] << 8 | rip[5] << 16 | rip[6] << 24;
+				safeStore<uint64_t>(ts->__rax, rip[3] | rip[4] << 8 | rip[5] << 16 | rip[6] << 24);
 				ts->__rip += 7;
 				mach_set_thread_state(SIP);
 				return true;
 			}
 			else if (rip[1] == 0xc7 && rip[2] == 0x40) {
-				uint8_t *p = cnvAdr(ts->__rax + (signed char)rip[3]);
-				if (isValidAdr(p)) *(uint64_t *)p = rip[4] | rip[5] << 8 | rip[6] << 16 | rip[7] << 24;
+				safeStore<uint64_t>(ts->__rax + (signed char)rip[3], rip[4] | rip[5] << 8 | rip[6] << 16 | rip[7] << 24);
 				ts->__rip += 8;
 				mach_set_thread_state(SIP);
 				return true;
@@ -2657,15 +2662,13 @@ static bool handle_badaccess(SIGSEGV_FAULT_HANDLER_ARGLIST_1)
 			break;
 		case 0x89:
 			if (rip[1] == 2) {
-				uint8_t *p = cnvAdr(ts->__rdx);
-				if (isValidAdr(p)) *(uint32_t *)p = ts->__rax;
+				safeStore<uint32_t>(ts->__rdx, ts->__rax);
 				ts->__rip += 2;
 				mach_set_thread_state(SIP);
 				return true;
 			}
 			else if (rip[1] == 0x10) {
-				uint8_t *p = cnvAdr(ts->__rax);
-				if (isValidAdr(p)) *(uint32_t *)p = ts->__rdx;
+				safeStore<uint32_t>(ts->__rax, ts->__rdx);
 				ts->__rip += 2;
 				mach_set_thread_state(SIP);
 				return true;
@@ -2673,8 +2676,7 @@ static bool handle_badaccess(SIGSEGV_FAULT_HANDLER_ARGLIST_1)
 			break;
 		case 0x8b:
 			if (rip[1] == 0) {
-				uint8_t *p = cnvAdr(ts->__rax);
-				ts->__rax = isValidAdr(p) ? *(uint32_t *)p : 0;
+				ts->__rax = safeLoad<uint32_t>(ts->__rax);
 				ts->__rip += 2;
 				mach_set_thread_state(SIP);
 				return true;
diff --git a/SheepShaver/src/Unix/dyngen_precompiled/basic-dyngen-ops-x86_64.hpp b/SheepShaver/src/Unix/dyngen_precompiled/basic-dyngen-ops-x86_64.hpp
index 90361874..1910e577 100644
--- a/SheepShaver/src/Unix/dyngen_precompiled/basic-dyngen-ops-x86_64.hpp
+++ b/SheepShaver/src/Unix/dyngen_precompiled/basic-dyngen-ops-x86_64.hpp
@@ -1386,7 +1386,7 @@ DEFINE_GEN(gen_op_load_s16_T0_T1_0,void,(void))
        0x44, 0x89, 0xe8, 
        TRANS_RAX,
        0x0f, 0xb7, 0x00, 
-       0x66, 0xc1, 0xc0, 0x08, 0x44, 0x0f, 0xbf, 0xe0, 
+       0x66, 0xc1, 0xc0, 0x08, 0x44, 0x0f, 0xbf, 0xe0
     };
     copy_block(op_load_s16_T0_T1_0_code, 50);
     *(uint32_t *)(code_ptr() + 27) = (uint32_t)(uintptr)gKernelData;
@@ -1403,7 +1403,7 @@ DEFINE_GEN(gen_op_load_s32_T0_T1_0,void,(void))
        0x44, 0x89, 0xe8, 
        TRANS_RAX,
        0x8b, 0x00, 
-       0x41, 0x89, 0xc4, 0x41, 0x0f, 0xcc, 
+       0x41, 0x89, 0xc4, 0x41, 0x0f, 0xcc
     };
     copy_block(op_load_s32_T0_T1_0_code, 47);
     *(uint32_t *)(code_ptr() + 27) = (uint32_t)(uintptr)gKernelData;
@@ -1446,7 +1446,7 @@ DEFINE_GEN(gen_op_load_u16_T0_T1_0,void,(void))
        0x44, 0x89, 0xe8, 
        TRANS_RAX,
        0x0f, 0xb7, 0x00, 
-       0x66, 0xc1, 0xc0, 0x08, 0x44, 0x0f, 0xb7, 0xe0, 
+       0x66, 0xc1, 0xc0, 0x08, 0x44, 0x0f, 0xb7, 0xe0
     };
     copy_block(op_load_u16_T0_T1_0_code, 50);
     *(uint32_t *)(code_ptr() + 27) = (uint32_t)(uintptr)gKernelData;
@@ -1463,7 +1463,7 @@ DEFINE_GEN(gen_op_load_u32_T0_T1_0,void,(void))
        0x44, 0x89, 0xe8, 
        TRANS_RAX,
        0x8b, 0x00, 
-       0x41, 0x89, 0xc4, 0x41, 0x0f, 0xcc, 
+       0x41, 0x89, 0xc4, 0x41, 0x0f, 0xcc
     };
     copy_block(op_load_u32_T0_T1_0_code, 47);
     *(uint32_t *)(code_ptr() + 27) = (uint32_t)(uintptr)gKernelData;
@@ -1580,7 +1580,7 @@ DEFINE_GEN(gen_op_load_s16_T0_T1_T2,void,(void))
        0x43, 0x8d, 0x04, 0x2e, 
        TRANS_RAX,
        0x0f, 0xb7, 0x00, 
-       0x66, 0xc1, 0xc0, 0x08, 0x44, 0x0f, 0xbf, 0xe0, 
+       0x66, 0xc1, 0xc0, 0x08, 0x44, 0x0f, 0xbf, 0xe0
     };
     copy_block(op_load_s16_T0_T1_T2_code, 51);
     *(uint32_t *)(code_ptr() + 28) = (uint32_t)(uintptr)gKernelData;
@@ -1598,7 +1598,7 @@ DEFINE_GEN(gen_op_load_s16_T0_T1_im,void,(long param1))
        ADD_RAX_RDX,
        TRANS_RAX,
        0x0f, 0xb7, 0x00,
-       0x66, 0xc1, 0xc0, 0x08, 0x44, 0x0f, 0xbf, 0xe0, 
+       0x66, 0xc1, 0xc0, 0x08, 0x44, 0x0f, 0xbf, 0xe0
     };
     copy_block(op_load_s16_T0_T1_im_code, 59);
     *(uint32_t *)(code_ptr() + 36) = (uint32_t)(uintptr)gKernelData;
@@ -1616,7 +1616,7 @@ DEFINE_GEN(gen_op_load_s32_T0_T1_T2,void,(void))
        0x43, 0x8d, 0x04, 0x2e, 
        TRANS_RAX,
        0x8b, 0x00, 
-       0x41, 0x89, 0xc4, 0x41, 0x0f, 0xcc, 
+       0x41, 0x89, 0xc4, 0x41, 0x0f, 0xcc
     };
     copy_block(op_load_s32_T0_T1_T2_code, 48);
     *(uint32_t *)(code_ptr() + 28) = (uint32_t)(uintptr)gKernelData;
@@ -1634,7 +1634,7 @@ DEFINE_GEN(gen_op_load_s32_T0_T1_im,void,(long param1))
        ADD_RAX_RDX,
        TRANS_RAX,
        0x8b, 0x00,
-       0x41, 0x89, 0xc4, 0x41, 0x0f, 0xcc, 
+       0x41, 0x89, 0xc4, 0x41, 0x0f, 0xcc
     };
     copy_block(op_load_s32_T0_T1_im_code, 56);
     *(uint32_t *)(code_ptr() + 36) = (uint32_t)(uintptr)gKernelData;
@@ -1652,7 +1652,7 @@ DEFINE_GEN(gen_op_load_u16_T0_T1_T2,void,(void))
        0x43, 0x8d, 0x04, 0x2e, 
        TRANS_RAX,
        0x0f, 0xb7, 0x00, 
-       0x66, 0xc1, 0xc0, 0x08, 0x44, 0x0f, 0xb7, 0xe0, 
+       0x66, 0xc1, 0xc0, 0x08, 0x44, 0x0f, 0xb7, 0xe0
     };
     copy_block(op_load_u16_T0_T1_T2_code, 51);
     *(uint32_t *)(code_ptr() + 28) = (uint32_t)(uintptr)gKernelData;
@@ -1670,7 +1670,7 @@ DEFINE_GEN(gen_op_load_u16_T0_T1_im,void,(long param1))
        ADD_RAX_RDX,
        TRANS_RAX,
        0x0f, 0xb7, 0x00,
-       0x66, 0xc1, 0xc0, 0x08, 0x44, 0x0f, 0xb7, 0xe0, 
+       0x66, 0xc1, 0xc0, 0x08, 0x44, 0x0f, 0xb7, 0xe0
     };
     copy_block(op_load_u16_T0_T1_im_code, 59);
     *(uint32_t *)(code_ptr() + 36) = (uint32_t)(uintptr)gKernelData;
@@ -1688,7 +1688,7 @@ DEFINE_GEN(gen_op_load_u32_T0_T1_T2,void,(void))
        0x43, 0x8d, 0x04, 0x2e, 
        TRANS_RAX,
        0x8b, 0x00, 
-       0x41, 0x89, 0xc4, 0x41, 0x0f, 0xcc, 
+       0x41, 0x89, 0xc4, 0x41, 0x0f, 0xcc
     };
     copy_block(op_load_u32_T0_T1_T2_code, 48);
     *(uint32_t *)(code_ptr() + 28) = (uint32_t)(uintptr)gKernelData;
@@ -1706,7 +1706,7 @@ DEFINE_GEN(gen_op_load_u32_T0_T1_im,void,(long param1))
        ADD_RAX_RDX,
        TRANS_RAX,
        0x8b, 0x00,
-       0x41, 0x89, 0xc4, 0x41, 0x0f, 0xcc, 
+       0x41, 0x89, 0xc4, 0x41, 0x0f, 0xcc
     };
     copy_block(op_load_u32_T0_T1_im_code, 56);
     *(uint32_t *)(code_ptr() + 36) = (uint32_t)(uintptr)gKernelData;
diff --git a/SheepShaver/src/Unix/dyngen_precompiled/ppc-dyngen-ops-x86_64.hpp b/SheepShaver/src/Unix/dyngen_precompiled/ppc-dyngen-ops-x86_64.hpp
index 0dbf6e61..8aaea1c0 100644
--- a/SheepShaver/src/Unix/dyngen_precompiled/ppc-dyngen-ops-x86_64.hpp
+++ b/SheepShaver/src/Unix/dyngen_precompiled/ppc-dyngen-ops-x86_64.hpp
@@ -10453,15 +10453,16 @@ DEFINE_GEN(gen_op_load_vect_VD_T0,void,(void))
        0x0f, 0xc8, 0x41, 0x89, 0x47, 0x04, 0x8d, 0x42, 0x08, 0x89, 0xc0, 
        TRANS_RAX,
        0x8b, 0x00, 
-       0x0f, 0xc8, 0x41, 0x89, 0x47, 0x08, 0x83, 0xc2, 0x0c, 0x89, 0xd2, 0x8b, 0x02, 0x0f, 0xc8, 0x41, 0x89, 0x47, 0x0c, 
+       0x0f, 0xc8, 0x41, 0x89, 0x47, 0x08, 0x83, 0xc2, 0x0c, 0x89, 0xd2, 0x8b,
+       0x02, 0x0f, 0xc8, 0x41, 0x89, 0x47, 0x0c
     };
     copy_block(op_load_vect_VD_T0_code, 162);
-    *(uint32_t *)(code_ptr() + 35) = (uint32_t)(uintptr)gKernelData;
-    *(uint32_t *)(code_ptr() + 34) = (uint32_t)(uintptr)gKernelData;
     *(uint32_t *)(code_ptr() + 32) = (uint32_t)(uintptr)gKernelData;
-    *(uint32_t *)(code_ptr() + 43) = (uint32_t)(uintptr)gZeroPage;
-    *(uint32_t *)(code_ptr() + 42) = (uint32_t)(uintptr)gZeroPage;
+    *(uint32_t *)(code_ptr() + 80) = (uint32_t)(uintptr)gKernelData;
+    *(uint32_t *)(code_ptr() + 129) = (uint32_t)(uintptr)gKernelData;
     *(uint32_t *)(code_ptr() + 40) = (uint32_t)(uintptr)gZeroPage;
+    *(uint32_t *)(code_ptr() + 88) = (uint32_t)(uintptr)gZeroPage;
+    *(uint32_t *)(code_ptr() + 137) = (uint32_t)(uintptr)gZeroPage;
     inc_code_ptr(162);
 }
 #endif
@@ -10474,7 +10475,7 @@ DEFINE_GEN(gen_op_load_word_VD_T0,void,(void))
        0x44, 0x89, 0xe2, 0x48, 0x89, 0xd0, 0x83, 0xe0, 0xfc, 
        TRANS_RAX,
        0x8b, 0x00, 
-       0x0f, 0xc8, 0xc1, 0xea, 0x02, 0x83, 0xe2, 0x03, 0x41, 0x89, 0x04, 0x97, 
+       0x0f, 0xc8, 0xc1, 0xea, 0x02, 0x83, 0xe2, 0x03, 0x41, 0x89, 0x04, 0x97
     };
     copy_block(op_load_word_VD_T0_code, 59);
     *(uint32_t *)(code_ptr() + 33) = (uint32_t)(uintptr)gKernelData;
@@ -10546,15 +10547,16 @@ DEFINE_GEN(gen_op_store_vect_VD_T0,void,(void))
        0x41, 0x8b, 0x57, 0x08, 0x0f, 0xca, 0x8d, 0x41, 0x08, 0x89, 0xc0, 
        TRANS_RAX,
        0x89, 0x10, 
-       0x41, 0x8b, 0x47, 0x0c, 0x0f, 0xc8, 0x83, 0xc1, 0x0c, 0x89, 0xc9, 0x89, 0x01, 
+       0x41, 0x8b, 0x47, 0x0c, 0x0f, 0xc8, 0x83, 0xc1, 0x0c, 0x89, 0xc9, 0x89,
+       0x01
     };
     copy_block(op_store_vect_VD_T0_code, 167);
-    *(uint32_t *)(code_ptr() + 35) = (uint32_t)(uintptr)gKernelData;
-    *(uint32_t *)(code_ptr() + 35) = (uint32_t)(uintptr)gKernelData;
     *(uint32_t *)(code_ptr() + 41) = (uint32_t)(uintptr)gKernelData;
-    *(uint32_t *)(code_ptr() + 43) = (uint32_t)(uintptr)gZeroPage;
-    *(uint32_t *)(code_ptr() + 43) = (uint32_t)(uintptr)gZeroPage;
+    *(uint32_t *)(code_ptr() + 91) = (uint32_t)(uintptr)gKernelData;
+    *(uint32_t *)(code_ptr() + 140) = (uint32_t)(uintptr)gKernelData;
     *(uint32_t *)(code_ptr() + 50) = (uint32_t)(uintptr)gZeroPage;
+    *(uint32_t *)(code_ptr() + 99) = (uint32_t)(uintptr)gZeroPage;
+    *(uint32_t *)(code_ptr() + 148) = (uint32_t)(uintptr)gZeroPage;
     inc_code_ptr(167);
 }
 #endif
@@ -10754,7 +10756,7 @@ DEFINE_GEN(gen_op_load_double_FD_T1_0,void,(void))
        0x44, 0x89, 0xe8, 
        TRANS_RAX,
        0x48, 0x8b, 0x00, 
-       0x48, 0x0f, 0xc8, 0x48, 0x89, 0x85, 0xa8, 0x08, 0x10, 0x00, 
+       0x48, 0x0f, 0xc8, 0x48, 0x89, 0x85, 0xa8, 0x08, 0x10, 0x00
     };
     copy_block(op_load_double_FD_T1_0_code, 52);
     *(uint32_t *)(code_ptr() + 27) = (uint32_t)(uintptr)gKernelData;
@@ -10771,7 +10773,9 @@ DEFINE_GEN(gen_op_load_single_FD_T1_0,void,(void))
        0x44, 0x89, 0xe8, 
        TRANS_RAX,
        0x8b, 0x00, 
-       0x0f, 0xc8, 0x89, 0x44, 0x24, 0xf4, 0xf3, 0x0f, 0x10, 0x44, 0x24, 0xf4, 0xf3, 0x0f, 0x5a, 0xc0, 0xf2, 0x0f, 0x11, 0x44, 0x24, 0xf8, 0x48, 0x8b, 0x44, 0x24, 0xf8, 0x48, 0x89, 0x85, 0xa8, 0x08, 0x10, 0x00, 
+       0x0f, 0xc8, 0x89, 0x44, 0x24, 0xf4, 0xf3, 0x0f, 0x10, 0x44, 0x24, 0xf4,
+       0xf3, 0x0f, 0x5a, 0xc0, 0xf2, 0x0f, 0x11, 0x44, 0x24, 0xf8, 0x48, 0x8b,
+       0x44, 0x24, 0xf8, 0x48, 0x89, 0x85, 0xa8, 0x08, 0x10, 0x00
     };
     copy_block(op_load_single_FD_T1_0_code, 75);
     *(uint32_t *)(code_ptr() + 27) = (uint32_t)(uintptr)gKernelData;
@@ -10942,7 +10946,7 @@ DEFINE_GEN(gen_op_load_double_FD_T1_T2,void,(void))
        0x43, 0x8d, 0x04, 0x2e, 
        TRANS_RAX,
        0x48, 0x8b, 0x00, 
-       0x48, 0x0f, 0xc8, 0x48, 0x89, 0x85, 0xa8, 0x08, 0x10, 0x00, 
+       0x48, 0x0f, 0xc8, 0x48, 0x89, 0x85, 0xa8, 0x08, 0x10, 0x00
     };
     copy_block(op_load_double_FD_T1_T2_code, 53);
     *(uint32_t *)(code_ptr() + 28) = (uint32_t)(uintptr)gKernelData;
@@ -10960,7 +10964,7 @@ DEFINE_GEN(gen_op_load_double_FD_T1_im,void,(long param1))
        ADD_RAX_RDX,
        TRANS_RAX,
        0x48, 0x8b, 0x00,
-       0x48, 0x0f, 0xc8, 0x48, 0x89, 0x85, 0xa8, 0x08, 0x10, 0x00, 
+       0x48, 0x0f, 0xc8, 0x48, 0x89, 0x85, 0xa8, 0x08, 0x10, 0x00
     };
     copy_block(op_load_double_FD_T1_im_code, 61);
     *(uint32_t *)(code_ptr() + 36) = (uint32_t)(uintptr)gKernelData;
@@ -10978,7 +10982,9 @@ DEFINE_GEN(gen_op_load_single_FD_T1_T2,void,(void))
        0x43, 0x8d, 0x04, 0x2e, 
        TRANS_RAX,
        0x8b, 0x00, 
-       0x0f, 0xc8, 0x89, 0x44, 0x24, 0xf4, 0xf3, 0x0f, 0x10, 0x44, 0x24, 0xf4, 0xf3, 0x0f, 0x5a, 0xc0, 0xf2, 0x0f, 0x11, 0x44, 0x24, 0xf8, 0x48, 0x8b, 0x44, 0x24, 0xf8, 0x48, 0x89, 0x85, 0xa8, 0x08, 0x10, 0x00, 
+       0x0f, 0xc8, 0x89, 0x44, 0x24, 0xf4, 0xf3, 0x0f, 0x10, 0x44, 0x24, 0xf4,
+       0xf3, 0x0f, 0x5a, 0xc0, 0xf2, 0x0f, 0x11, 0x44, 0x24, 0xf8, 0x48, 0x8b,
+       0x44, 0x24, 0xf8, 0x48, 0x89, 0x85, 0xa8, 0x08, 0x10, 0x00
     };
     copy_block(op_load_single_FD_T1_T2_code, 76);
     *(uint32_t *)(code_ptr() + 28) = (uint32_t)(uintptr)gKernelData;
@@ -10996,7 +11002,9 @@ DEFINE_GEN(gen_op_load_single_FD_T1_im,void,(long param1))
        ADD_RAX_RDX,
        TRANS_RAX,
        0x8b, 0x00,
-       0x0f, 0xc8, 0x89, 0x44, 0x24, 0xf4, 0xf3, 0x0f, 0x10, 0x44, 0x24, 0xf4, 0xf3, 0x0f, 0x5a, 0xc0, 0xf2, 0x0f, 0x11, 0x44, 0x24, 0xf8, 0x48, 0x8b, 0x44, 0x24, 0xf8, 0x48, 0x89, 0x85, 0xa8, 0x08, 0x10, 0x00, 
+       0x0f, 0xc8, 0x89, 0x44, 0x24, 0xf4, 0xf3, 0x0f, 0x10, 0x44, 0x24, 0xf4,
+       0xf3, 0x0f, 0x5a, 0xc0, 0xf2, 0x0f, 0x11, 0x44, 0x24, 0xf8, 0x48, 0x8b,
+       0x44, 0x24, 0xf8, 0x48, 0x89, 0x85, 0xa8, 0x08, 0x10, 0x00
     };
     copy_block(op_load_single_FD_T1_im_code, 84);
     *(uint32_t *)(code_ptr() + 36) = (uint32_t)(uintptr)gKernelData;
diff --git a/SheepShaver/src/Unix/main_unix.cpp b/SheepShaver/src/Unix/main_unix.cpp
index c9a7ac58..7d713b4a 100755
--- a/SheepShaver/src/Unix/main_unix.cpp
+++ b/SheepShaver/src/Unix/main_unix.cpp
@@ -190,7 +190,7 @@ int64 BusClockSpeed;	// Bus clock speed (Hz)
 int64 TimebaseSpeed;	// Timebase clock speed (Hz)
 uint8 *RAMBaseHost;		// Base address of Mac RAM (host address space)
 uint8 *ROMBaseHost;		// Base address of Mac ROM (host address space)
-uint8 *ROMEndHost;
+uint32 ROMEnd;
 
 #if defined(__APPLE__) && defined(__x86_64__)
 uint8 gZeroPage[0x3000], gKernelData[0x2000];
@@ -937,8 +937,8 @@ int main(int argc, char **argv)
 		}
 		RAMBase = Host2MacAddr(RAMBaseHost);
 		ROMBase = (RAMBase + RAMSize + ROM_ALIGNMENT -1) & -ROM_ALIGNMENT;
-		ROMBaseHost = Mac2HostAddr(ROMBase);
-		ROMEndHost = RAMBaseHost + RAMSize + ROM_AREA_SIZE + ROM_ALIGNMENT;
+		ROMBaseHost = RAMBaseHost + ROMBase - RAMBase;
+		ROMEnd = RAMBase + RAMSize + ROM_AREA_SIZE + ROM_ALIGNMENT;
 
 		ram_rom_areas_contiguous = true;
 #else