64-bit build for 10.10+

This commit is contained in:
kanjitalk755 2017-11-17 21:43:36 +09:00
parent e07640979e
commit 5065fb9d95
7 changed files with 92 additions and 81 deletions

4
BasiliskII/src/SDL/video_sdl.cpp Normal file → Executable file
View File

@ -198,12 +198,12 @@ static void *vm_acquire_framebuffer(uint32 size)
// always try to reallocate framebuffer at the same address
static void *fb = VM_MAP_FAILED;
if (fb != VM_MAP_FAILED) {
if (vm_acquire_fixed(fb, size) < 0) {
// if (vm_acquire_fixed(fb, size) < 0) {
#ifndef SHEEPSHAVER
printf("FATAL: Could not reallocate framebuffer at previous address\n");
#endif
fb = VM_MAP_FAILED;
}
// }
}
if (fb == VM_MAP_FAILED)
fb = vm_acquire(size, VM_MAP_DEFAULT | VM_MAP_32BIT);

4
BasiliskII/src/Unix/Darwin/lowmem.c Normal file → Executable file
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@ -107,8 +107,8 @@ void pagezero_64(struct mach_header_64 *machhead)
exit(1);
}
/* change the permissions */
sc_cmd->maxprot = target_uint32(VM_PROT_ALL);
sc_cmd->initprot = target_uint32(VM_PROT_ALL);
// sc_cmd->maxprot = target_uint32(VM_PROT_ALL);
// sc_cmd->initprot = target_uint32(VM_PROT_ALL);
}
#endif

View File

@ -1220,7 +1220,7 @@
isa = XCBuildConfiguration;
buildSettings = {
ALWAYS_SEARCH_USER_PATHS = NO;
ARCHS = "$(ARCHS_STANDARD_32_BIT)";
ARCHS = "$(ARCHS_STANDARD_32_64_BIT)";
COPY_PHASE_STRIP = NO;
GCC_DYNAMIC_NO_PIC = NO;
GCC_ENABLE_FIX_AND_CONTINUE = YES;
@ -1254,7 +1254,7 @@
isa = XCBuildConfiguration;
buildSettings = {
ALWAYS_SEARCH_USER_PATHS = NO;
ARCHS = "$(ARCHS_STANDARD_32_BIT)";
ARCHS = "$(ARCHS_STANDARD_32_64_BIT)";
COPY_PHASE_STRIP = YES;
DEBUG_INFORMATION_FORMAT = "dwarf-with-dsym";
GCC_DYNAMIC_NO_PIC = YES;
@ -1313,7 +1313,7 @@
isa = XCBuildConfiguration;
buildSettings = {
ALWAYS_SEARCH_USER_PATHS = NO;
ARCHS = "$(ARCHS_STANDARD_32_BIT)";
ARCHS = "$(ARCHS_STANDARD_32_64_BIT)";
COPY_PHASE_STRIP = NO;
FRAMEWORK_SEARCH_PATHS = /Library/Frameworks;
GCC_CW_ASM_SYNTAX = NO;
@ -1369,7 +1369,7 @@
isa = XCBuildConfiguration;
buildSettings = {
ALWAYS_SEARCH_USER_PATHS = NO;
ARCHS = "$(ARCHS_STANDARD_32_BIT)";
ARCHS = "$(ARCHS_STANDARD_32_64_BIT)";
COPY_PHASE_STRIP = NO;
DEAD_CODE_STRIPPING = NO;
FRAMEWORK_SEARCH_PATHS = /Library/Frameworks;

28
SheepShaver/src/Unix/main_unix.cpp Normal file → Executable file
View File

@ -191,6 +191,9 @@ int64 TimebaseSpeed; // Timebase clock speed (Hz)
uint8 *RAMBaseHost; // Base address of Mac RAM (host address space)
uint8 *ROMBaseHost; // Base address of Mac ROM (host address space)
#if defined(__APPLE__) && defined(__x86_64__)
uint8 gZeroPage[0x3000], gKernelData[0x2000];
#endif
// Global variables
#ifndef USE_SDL_VIDEO
@ -855,15 +858,17 @@ int main(int argc, char **argv)
goto quit;
}
#if !defined(__APPLE__) || !defined(__x86_64__)
// Create areas for Kernel Data
if (!kernel_data_init())
goto quit;
#endif
kernel_data = (KernelData *)Mac2HostAddr(KERNEL_DATA_BASE);
emulator_data = &kernel_data->ed;
KernelDataAddr = KERNEL_DATA_BASE;
D(bug("Kernel Data at %p (%08x)\n", kernel_data, KERNEL_DATA_BASE));
D(bug("Emulator Data at %p (%08x)\n", emulator_data, KERNEL_DATA_BASE + offsetof(KernelData, ed)));
#if 0
// Create area for DR Cache
if (vm_mac_acquire_fixed(DR_EMULATOR_BASE, DR_EMULATOR_SIZE) < 0) {
sprintf(str, GetString(STR_DR_EMULATOR_MMAP_ERR), strerror(errno));
@ -886,7 +891,7 @@ int main(int argc, char **argv)
#endif
DRCacheAddr = DR_CACHE_BASE;
D(bug("DR Cache at %p\n", DRCacheAddr));
#endif
// Create area for SheepShaver data
if (!SheepMem::Init()) {
sprintf(str, GetString(STR_SHEEP_MEM_MMAP_ERR), strerror(errno));
@ -1634,8 +1639,8 @@ void sigusr2_handler(int sig, siginfo_t *sip, void *scp)
switch (ReadMacInt32(XLM_RUN_MODE)) {
case MODE_68K:
// 68k emulator active, trigger 68k interrupt level 1
WriteMacInt16(ntohl(kernel_data->v[0x67c >> 2]), 1);
r->cr() |= ntohl(kernel_data->v[0x674 >> 2]);
WriteMacInt16(ReadMacInt32(0x67c), 1);
r->cr() |= ReadMacInt32(0x674);
break;
#if INTERRUPTS_IN_NATIVE_MODE
@ -1647,8 +1652,8 @@ void sigusr2_handler(int sig, siginfo_t *sip, void *scp)
sigaltstack(&extra_stack, NULL);
// Prepare for 68k interrupt level 1
WriteMacInt16(ntohl(kernel_data->v[0x67c >> 2]), 1);
WriteMacInt32(ntohl(kernel_data->v[0x658 >> 2]) + 0xdc, ReadMacInt32(ntohl(kernel_data->v[0x658 >> 2]) + 0xdc) | ntohl(kernel_data->v[0x674 >> 2]));
WriteMacInt16(ReadMacInt32(0x67c), 1);
WriteMacInt32(ReadMacInt32(0x658) + 0xdc, ReadMacInt32(ReadMacInt32(0x658) + 0xdc) | ReadMacInt32(0x674));
// Execute nanokernel interrupt routine (this will activate the 68k emulator)
DisableInterrupt();
@ -2155,10 +2160,10 @@ bool SheepMem::Init(void)
page_size = getpagesize();
// Allocate SheepShaver globals
proc = base;
if (vm_mac_acquire_fixed(base, size) < 0)
uint8 *adr = vm_mac_acquire(size);
if (adr == VM_MAP_FAILED)
return false;
proc = base = Host2MacAddr(adr);
// Allocate page with all bits set to 0, right in the middle
// This is also used to catch undesired overlaps between proc and data areas
zero_page = proc + (size / 2);
@ -2168,9 +2173,10 @@ bool SheepMem::Init(void)
#if EMULATED_PPC
// Allocate alternate stack for PowerPC interrupt routine
sig_stack = base + size;
if (vm_mac_acquire_fixed(sig_stack, SIG_STACK_SIZE) < 0)
adr = vm_mac_acquire(SIG_STACK_SIZE);
if (adr == VM_MAP_FAILED)
return false;
sig_stack = Host2MacAddr(adr);
#endif
data = base + size;

26
SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp Normal file → Executable file
View File

@ -182,7 +182,7 @@ sheepshaver_cpu::sheepshaver_cpu()
{
init_decoder();
#if PPC_ENABLE_JIT
#if PPC_ENABLE_JIT && !(defined(__APPLE__) && defined(__x86_64__))
if (PrefsFindBool("jit"))
enable_jit();
#endif
@ -478,10 +478,10 @@ void sheepshaver_cpu::interrupt(uint32 entry)
SheepVar32 trampoline = POWERPC_EXEC_RETURN;
// Prepare registers for nanokernel interrupt routine
kernel_data->v[0x004 >> 2] = htonl(gpr(1));
kernel_data->v[0x018 >> 2] = htonl(gpr(6));
WriteMacInt32(KERNEL_DATA_BASE + 0x004, gpr(1));
WriteMacInt32(KERNEL_DATA_BASE + 0x018, gpr(6));
gpr(6) = ntohl(kernel_data->v[0x65c >> 2]);
gpr(6) = ReadMacInt32(KERNEL_DATA_BASE + 0x65c);
assert(gpr(6) != 0);
WriteMacInt32(gpr(6) + 0x13c, gpr(7));
WriteMacInt32(gpr(6) + 0x144, gpr(8));
@ -492,7 +492,7 @@ void sheepshaver_cpu::interrupt(uint32 entry)
WriteMacInt32(gpr(6) + 0x16c, gpr(13));
gpr(1) = KernelDataAddr;
gpr(7) = ntohl(kernel_data->v[0x660 >> 2]);
gpr(7) = ReadMacInt32(KERNEL_DATA_BASE + 0x660);
gpr(8) = 0;
gpr(10) = trampoline.addr();
gpr(12) = trampoline.addr();
@ -564,8 +564,8 @@ void sheepshaver_cpu::execute_68k(uint32 entry, M68kRegisters *r)
gpr(25) = ReadMacInt32(XLM_68K_R25); // MSB of SR
gpr(26) = 0;
gpr(28) = 0; // VBR
gpr(29) = ntohl(kernel_data->ed.v[0x74 >> 2]); // Pointer to opcode table
gpr(30) = ntohl(kernel_data->ed.v[0x78 >> 2]); // Address of emulator
gpr(29) = ReadMacInt32(KERNEL_DATA_BASE + 0x1074); // Pointer to opcode table
gpr(30) = ReadMacInt32(KERNEL_DATA_BASE + 0x1078); // Address of emulator
gpr(31) = KernelDataAddr + 0x1000;
// Push return address (points to EXEC_RETURN opcode) on stack
@ -963,8 +963,8 @@ void HandleInterrupt(powerpc_registers *r)
switch (ReadMacInt32(XLM_RUN_MODE)) {
case MODE_68K:
// 68k emulator active, trigger 68k interrupt level 1
WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1);
r->cr.set(r->cr.get() | tswap32(kernel_data->v[0x674 >> 2]));
WriteMacInt16(ReadMacInt32(KERNEL_DATA_BASE + 0x67c), 1);
r->cr.set(r->cr.get() | ReadMacInt32(KERNEL_DATA_BASE + 0x674));
break;
#if INTERRUPTS_IN_NATIVE_MODE
@ -973,10 +973,10 @@ void HandleInterrupt(powerpc_registers *r)
if (r->gpr[1] != KernelDataAddr) {
// Prepare for 68k interrupt level 1
WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1);
WriteMacInt32(tswap32(kernel_data->v[0x658 >> 2]) + 0xdc,
ReadMacInt32(tswap32(kernel_data->v[0x658 >> 2]) + 0xdc)
| tswap32(kernel_data->v[0x674 >> 2]));
WriteMacInt16(ReadMacInt32(KERNEL_DATA_BASE + 0x67c), 1);
WriteMacInt32(ReadMacInt32(KERNEL_DATA_BASE + 0x658) + 0xdc,
ReadMacInt32(ReadMacInt32(KERNEL_DATA_BASE + 0x658) + 0xdc)
| ReadMacInt32(KERNEL_DATA_BASE + 0x674));
// Execute nanokernel interrupt routine (this will activate the 68k emulator)
DisableInterrupt();

8
SheepShaver/src/kpx_cpu/src/cpu/vm.hpp Normal file → Executable file
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@ -205,7 +205,13 @@ const uintptr VMBaseDiff = NATMEM_OFFSET;
#if REAL_ADDRESSING || DIRECT_ADDRESSING
static inline uint8 * vm_do_get_real_address(vm_addr_t addr)
{
return (uint8 *)vm_wrap_address(VMBaseDiff + addr);
uintptr a = vm_wrap_address(VMBaseDiff + addr);
#if defined(__APPLE__) && defined(__x86_64__)
extern uint8 gZeroPage[0x3000], gKernelData[0x2000];
if (a < 0x3000) return &gZeroPage[a];
else if ((a & ~0x1fff) == 0x68ffe000 || (a & ~0x1fff) == 0x5fffe000) return &gKernelData[a & 0x1fff];
#endif
return (uint8 *)a;
}
static inline vm_addr_t vm_do_get_virtual_address(uint8 *addr)
{

95
SheepShaver/src/main.cpp Normal file → Executable file
View File

@ -164,63 +164,62 @@ bool InitAll(const char *vmdir)
}
// Initialize Kernel Data
KernelData *kernel_data = (KernelData *)Mac2HostAddr(KERNEL_DATA_BASE);
memset(kernel_data, 0, sizeof(KernelData));
Mac_memset(KERNEL_DATA_BASE, 0, sizeof(KernelData));
if (ROMType == ROMTYPE_NEWWORLD) {
uint32 of_dev_tree = SheepMem::Reserve(4 * sizeof(uint32));
Mac_memset(of_dev_tree, 0, 4 * sizeof(uint32));
uint32 vector_lookup_tbl = SheepMem::Reserve(128);
uint32 vector_mask_tbl = SheepMem::Reserve(64);
memset((uint8 *)kernel_data + 0xb80, 0x3d, 0x80);
Mac_memset(KERNEL_DATA_BASE + 0xb80, 0x3d, 0x80);
Mac_memset(vector_lookup_tbl, 0, 128);
Mac_memset(vector_mask_tbl, 0, 64);
kernel_data->v[0xb80 >> 2] = htonl(ROMBase);
kernel_data->v[0xb84 >> 2] = htonl(of_dev_tree); // OF device tree base
kernel_data->v[0xb90 >> 2] = htonl(vector_lookup_tbl);
kernel_data->v[0xb94 >> 2] = htonl(vector_mask_tbl);
kernel_data->v[0xb98 >> 2] = htonl(ROMBase); // OpenPIC base
kernel_data->v[0xbb0 >> 2] = htonl(0); // ADB base
kernel_data->v[0xc20 >> 2] = htonl(RAMSize);
kernel_data->v[0xc24 >> 2] = htonl(RAMSize);
kernel_data->v[0xc30 >> 2] = htonl(RAMSize);
kernel_data->v[0xc34 >> 2] = htonl(RAMSize);
kernel_data->v[0xc38 >> 2] = htonl(0x00010020);
kernel_data->v[0xc3c >> 2] = htonl(0x00200001);
kernel_data->v[0xc40 >> 2] = htonl(0x00010000);
kernel_data->v[0xc50 >> 2] = htonl(RAMBase);
kernel_data->v[0xc54 >> 2] = htonl(RAMSize);
kernel_data->v[0xf60 >> 2] = htonl(PVR);
kernel_data->v[0xf64 >> 2] = htonl(CPUClockSpeed); // clock-frequency
kernel_data->v[0xf68 >> 2] = htonl(BusClockSpeed); // bus-frequency
kernel_data->v[0xf6c >> 2] = htonl(TimebaseSpeed); // timebase-frequency
WriteMacInt32(KERNEL_DATA_BASE + 0xb80, ROMBase);
WriteMacInt32(KERNEL_DATA_BASE + 0xb84, of_dev_tree); // OF device tree base
WriteMacInt32(KERNEL_DATA_BASE + 0xb90, vector_lookup_tbl);
WriteMacInt32(KERNEL_DATA_BASE + 0xb94, vector_mask_tbl);
WriteMacInt32(KERNEL_DATA_BASE + 0xb98, ROMBase); // OpenPIC base
WriteMacInt32(KERNEL_DATA_BASE + 0xbb0, 0); // ADB base
WriteMacInt32(KERNEL_DATA_BASE + 0xc20, RAMSize);
WriteMacInt32(KERNEL_DATA_BASE + 0xc24, RAMSize);
WriteMacInt32(KERNEL_DATA_BASE + 0xc30, RAMSize);
WriteMacInt32(KERNEL_DATA_BASE + 0xc34, RAMSize);
WriteMacInt32(KERNEL_DATA_BASE + 0xc38, 0x00010020);
WriteMacInt32(KERNEL_DATA_BASE + 0xc3c, 0x00200001);
WriteMacInt32(KERNEL_DATA_BASE + 0xc40, 0x00010000);
WriteMacInt32(KERNEL_DATA_BASE + 0xc50, RAMBase);
WriteMacInt32(KERNEL_DATA_BASE + 0xc54, RAMSize);
WriteMacInt32(KERNEL_DATA_BASE + 0xf60, PVR);
WriteMacInt32(KERNEL_DATA_BASE + 0xf64, CPUClockSpeed); // clock-frequency
WriteMacInt32(KERNEL_DATA_BASE + 0xf68, BusClockSpeed); // bus-frequency
WriteMacInt32(KERNEL_DATA_BASE + 0xf6c, TimebaseSpeed); // timebase-frequency
} else if (ROMType == ROMTYPE_GOSSAMER) {
kernel_data->v[0xc80 >> 2] = htonl(RAMSize);
kernel_data->v[0xc84 >> 2] = htonl(RAMSize);
kernel_data->v[0xc90 >> 2] = htonl(RAMSize);
kernel_data->v[0xc94 >> 2] = htonl(RAMSize);
kernel_data->v[0xc98 >> 2] = htonl(0x00010020);
kernel_data->v[0xc9c >> 2] = htonl(0x00200001);
kernel_data->v[0xca0 >> 2] = htonl(0x00010000);
kernel_data->v[0xcb0 >> 2] = htonl(RAMBase);
kernel_data->v[0xcb4 >> 2] = htonl(RAMSize);
kernel_data->v[0xf60 >> 2] = htonl(PVR);
kernel_data->v[0xf64 >> 2] = htonl(CPUClockSpeed); // clock-frequency
kernel_data->v[0xf68 >> 2] = htonl(BusClockSpeed); // bus-frequency
kernel_data->v[0xf6c >> 2] = htonl(TimebaseSpeed); // timebase-frequency
WriteMacInt32(KERNEL_DATA_BASE + 0xc80, RAMSize);
WriteMacInt32(KERNEL_DATA_BASE + 0xc84, RAMSize);
WriteMacInt32(KERNEL_DATA_BASE + 0xc90, RAMSize);
WriteMacInt32(KERNEL_DATA_BASE + 0xc94, RAMSize);
WriteMacInt32(KERNEL_DATA_BASE + 0xc98, 0x00010020);
WriteMacInt32(KERNEL_DATA_BASE + 0xc9c, 0x00200001);
WriteMacInt32(KERNEL_DATA_BASE + 0xca0, 0x00010000);
WriteMacInt32(KERNEL_DATA_BASE + 0xcb0, RAMBase);
WriteMacInt32(KERNEL_DATA_BASE + 0xcb4, RAMSize);
WriteMacInt32(KERNEL_DATA_BASE + 0xf60, PVR);
WriteMacInt32(KERNEL_DATA_BASE + 0xf64, CPUClockSpeed); // clock-frequency
WriteMacInt32(KERNEL_DATA_BASE + 0xf68, BusClockSpeed); // bus-frequency
WriteMacInt32(KERNEL_DATA_BASE + 0xf6c, TimebaseSpeed); // timebase-frequency
} else {
kernel_data->v[0xc80 >> 2] = htonl(RAMSize);
kernel_data->v[0xc84 >> 2] = htonl(RAMSize);
kernel_data->v[0xc90 >> 2] = htonl(RAMSize);
kernel_data->v[0xc94 >> 2] = htonl(RAMSize);
kernel_data->v[0xc98 >> 2] = htonl(0x00010020);
kernel_data->v[0xc9c >> 2] = htonl(0x00200001);
kernel_data->v[0xca0 >> 2] = htonl(0x00010000);
kernel_data->v[0xcb0 >> 2] = htonl(RAMBase);
kernel_data->v[0xcb4 >> 2] = htonl(RAMSize);
kernel_data->v[0xf80 >> 2] = htonl(PVR);
kernel_data->v[0xf84 >> 2] = htonl(CPUClockSpeed); // clock-frequency
kernel_data->v[0xf88 >> 2] = htonl(BusClockSpeed); // bus-frequency
kernel_data->v[0xf8c >> 2] = htonl(TimebaseSpeed); // timebase-frequency
WriteMacInt32(KERNEL_DATA_BASE + 0xc80, RAMSize);
WriteMacInt32(KERNEL_DATA_BASE + 0xc84, RAMSize);
WriteMacInt32(KERNEL_DATA_BASE + 0xc90, RAMSize);
WriteMacInt32(KERNEL_DATA_BASE + 0xc94, RAMSize);
WriteMacInt32(KERNEL_DATA_BASE + 0xc98, 0x00010020);
WriteMacInt32(KERNEL_DATA_BASE + 0xc9c, 0x00200001);
WriteMacInt32(KERNEL_DATA_BASE + 0xca0, 0x00010000);
WriteMacInt32(KERNEL_DATA_BASE + 0xcb0, RAMBase);
WriteMacInt32(KERNEL_DATA_BASE + 0xcb4, RAMSize);
WriteMacInt32(KERNEL_DATA_BASE + 0xf80, PVR);
WriteMacInt32(KERNEL_DATA_BASE + 0xf84, CPUClockSpeed); // clock-frequency
WriteMacInt32(KERNEL_DATA_BASE + 0xf88, BusClockSpeed); // bus-frequency
WriteMacInt32(KERNEL_DATA_BASE + 0xf8c, TimebaseSpeed); // timebase-frequency
}
// Initialize extra low memory