mirror of
https://github.com/kanjitalk755/macemu.git
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Now that we have AltiVec emulation, we can pretend for a G4 processor
Also make sure to actually fix PVR code for 7400
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313cddeeb2
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@ -446,7 +446,9 @@ int main(int argc, char **argv)
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PVR = 0x00040000; // Default: 604
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CPUClockSpeed = 100000000; // Default: 100MHz
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BusClockSpeed = 100000000; // Default: 100MHz
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#if !EMULATED_PPC
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#if EMULATED_PPC
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PVR = 0x000c0000; // Default: 7400 (with AltiVec)
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#else
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proc_file = fopen("/proc/cpuinfo", "r");
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if (proc_file) {
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char line[256];
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@ -482,7 +484,7 @@ int main(int argc, char **argv)
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else if (strcmp(value, "860") == 0)
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PVR = 0x00500000;
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else if (strcmp(value, "7400") == 0)
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PVR = 0x80000000;
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PVR = 0x000c0000;
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else if (strcmp(value, "7410") == 0)
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PVR = 0x800c0000;
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else
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@ -250,8 +250,8 @@ void DoPatchNameRegistry(void)
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u32.set_value(128);
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RegistryPropertyCreate(power_pc.ptr(), "tlb-size", u32.ptr(), 4);
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break;
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case 0x8000: // 7400
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case 0x800c: // 7410
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case 12: // 7400, 7410
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case 0x800c:
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u32.set_value(32);
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RegistryPropertyCreate(power_pc.ptr(), "d-cache-block-size", u32.ptr(), 4);
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u32.set_value(128);
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@ -871,7 +871,8 @@ static bool patch_nanokernel_boot(void)
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lp[8] = htonl(0x00800002); // TLB total size/TLB assoc
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break;
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// case 11: // X704?
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case 12: // ???
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case 12: // 7400, 7410
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case 0x800c:
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lp[0] = htonl(0x1000); // Page size
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lp[1] = htonl(0x8000); // Data cache size
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lp[2] = htonl(0x8000); // Inst cache size
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@ -906,18 +907,6 @@ static bool patch_nanokernel_boot(void)
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lp[7] = htonl(0x00080008); // Inst cache assoc/Data cache assoc
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lp[8] = htonl(0x00800004); // TLB total size/TLB assoc
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break;
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case 0x8000: // 7400
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case 0x800c: // 7410
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lp[0] = htonl(0x1000); // Page size
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lp[1] = htonl(0x8000); // Data cache size
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lp[2] = htonl(0x8000); // Inst cache size
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lp[3] = htonl(0x00200020); // Coherency block size/Reservation granule size
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lp[4] = htonl(0x00000020); // Unified caches/Inst cache line size
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lp[5] = htonl(0x00200020); // Data cache line size/Data cache block size touch
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lp[6] = htonl(0x00200020); // Inst cache block size/Data cache block size
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lp[7] = htonl(0x00080008); // Inst cache assoc/Data cache assoc
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lp[8] = htonl(0x00800002); // TLB total size/TLB assoc
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break;
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default:
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printf("WARNING: Unknown CPU type\n");
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break;
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