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Recognize lahf_lm from Dual Core Opterons. This enables use of LAHF/SETO

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instructions in long mode (64-bit). However, there seems to be another bug
in the JIT preventing it from being fully supported. m68k.h & codegen_x86.h
are easily fixed bug another patch is still needed.
This commit is contained in:
gbeauche 2005-04-21 09:08:57 +00:00
parent 8db2a3ef62
commit 57169c7923
2 changed files with 8 additions and 5 deletions
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12
BasiliskII/src/uae_cpu/compiler/codegen_x86.cpp
View File

@ -3607,7 +3607,7 @@ enum {
X86_PROCESSOR_K6,
X86_PROCESSOR_ATHLON,
X86_PROCESSOR_PENTIUM4,
X86_PROCESSOR_K8,
X86_PROCESSOR_X86_64,
X86_PROCESSOR_max
};
@ -3619,7 +3619,7 @@ static const char * x86_processor_string_table[X86_PROCESSOR_max] = {
"K6",
"Athlon",
"Pentium4",
"K8"
"x86-64"
};
static struct ptt {
@ -3755,12 +3755,14 @@ raw_init_cpu(void)
cpuid(0x80000000, &xlvl, NULL, NULL, NULL);
if ( (xlvl & 0xffff0000) == 0x80000000 ) {
if ( xlvl >= 0x80000001 ) {
uae_u32 features;
cpuid(0x80000001, NULL, NULL, NULL, &features);
uae_u32 features, extra_features;
cpuid(0x80000001, NULL, NULL, &extra_features, &features);
if (features & (1 << 29)) {
/* Assume x86-64 if long mode is supported */
c->x86_processor = X86_PROCESSOR_K8;
c->x86_processor = X86_PROCESSOR_X86_64;
}
if (extra_features & (1 << 0))
have_lahf_lm = true;
}
}

1
BasiliskII/src/uae_cpu/compiler/compemu_support.cpp
View File

@ -156,6 +156,7 @@ static uae_u32 current_cache_size = 0; // Cache grows upwards: how much has bee
static bool lazy_flush = true; // Flag: lazy translation cache invalidation
static bool avoid_fpu = true; // Flag: compile FPU instructions ?
static bool have_cmov = false; // target has CMOV instructions ?
static bool have_lahf_lm = true; // target has LAHF supported in long mode ?
static bool have_rat_stall = true; // target has partial register stalls ?
const bool tune_alignment = true; // Tune code alignments for running CPU ?
const bool tune_nop_fillers = true; // Tune no-op fillers for architecture