mirror of
https://github.com/kanjitalk755/macemu.git
synced 2025-02-08 10:30:45 +00:00
separate JIT code, macOS and others
This commit is contained in:
parent
42353c9698
commit
6eaa8cb232
@ -8,10 +8,8 @@
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@ -106,6 +104,8 @@
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@ -141,10 +141,8 @@
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@ -379,6 +377,8 @@
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A7B1921318C35D4700791D8D /* DiskType.m */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.objc; path = DiskType.m; sourceTree = "<group>"; };
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E4302EE21FBFE7FA00A5B500 /* lowmem.c */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.c; name = lowmem.c; path = Darwin/lowmem.c; sourceTree = "<group>"; };
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@ -414,10 +414,10 @@
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children = (
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08003F851E0624D100A3ADAB /* basic-dyngen-ops-x86_32.hpp */,
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E4C9A03D1FD55CDC00CABBF9 /* basic-dyngen-ops-x86_64_macos.hpp */,
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08003F871E0624D100A3ADAB /* basic-dyngen-ops.hpp */,
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08003F881E0624D100A3ADAB /* ppc-dyngen-ops-x86_32.hpp */,
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);
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@ -885,9 +885,9 @@
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buildActionMask = 2147483647;
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files = (
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08003F8F1E0624D100A3ADAB /* ppc-dyngen-ops-x86_32.hpp in Headers */,
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08003F901E0624D100A3ADAB /* ppc-dyngen-ops-x86_64.hpp in Headers */,
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08003F8D1E0624D100A3ADAB /* basic-dyngen-ops-x86_64.hpp in Headers */,
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||||
08003F8E1E0624D100A3ADAB /* basic-dyngen-ops.hpp in Headers */,
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||||
E4C9A03E1FD55CDC00CABBF9 /* basic-dyngen-ops-x86_64_macos.hpp in Headers */,
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E4C9A0401FD55CE700CABBF9 /* ppc-dyngen-ops-x86_64_macos.hpp in Headers */,
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08163339158C121000C449F9 /* dis-asm.h in Headers */,
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08003F8C1E0624D100A3ADAB /* basic-dyngen-ops-x86_32.hpp in Headers */,
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08003F911E0624D100A3ADAB /* ppc-dyngen-ops.hpp in Headers */,
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|
@ -1,30 +1,3 @@
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#define ADD_RAX_RCX 0x01,0xc8
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#define ADD_RDX_RCX 0x01,0xca
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#define ADD_RAX_RDX 0x01,0xd0
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#define TRANS_RAX \
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0x48,0x3D,0x00,0x30,0x00,0x00,\
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0x72,0x16,\
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0x48,0x3D,0x00,0xE0,0xFF,0x5F,\
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0x72,0x14,\
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0x48,0x25,0xFF,0x1F,0x00,0x00,\
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0x48,0x05,0x00,0x00,0x00,0x00,\
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0xEB,0x06,\
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0x48,0x05,0x00,0x00,0x00,0x00
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#define TRANS_RDX \
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0x48,0x81,0xFA,0x00,0x30,0x00,0x00,\
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0x72,0x19,\
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0x48,0x81,0xFA,0x00,0xE0,0xFF,0x5F,\
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0x72,0x17,\
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0x48,0x81,0xE2,0xFF,0x1F,0x00,0x00,\
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0x48,0x81,0xC2,0x00,0x00,0x00,0x00,\
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0xEB,0x07,\
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0x48,0x81,0xC2,0x00,0x00,0x00,0x00
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#ifdef DYNGEN_IMPL
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extern uint8 gZeroPage[0x3000], gKernelData[0x2000];
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#endif
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#ifndef DEFINE_CST
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#define DEFINE_CST(NAME, VALUE)
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#endif
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@ -1351,14 +1324,10 @@ DEFINE_GEN(gen_op_load_u8_T0_T1_0,void,(void))
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#define HAVE_gen_op_load_u8_T0_T1_0
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{
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static const uint8 op_load_u8_T0_T1_0_code[] = {
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0x44, 0x89, 0xe8,
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TRANS_RAX,
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0x44, 0x0f, 0xb6, 0x20,
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0x44, 0x89, 0xe8, 0x44, 0x0f, 0xb6, 0x20
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};
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copy_block(op_load_u8_T0_T1_0_code, 43);
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*(uint32_t *)(code_ptr() + 27) = (uint32_t)(uintptr)gKernelData;
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*(uint32_t *)(code_ptr() + 35) = (uint32_t)(uintptr)gZeroPage;
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inc_code_ptr(43);
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copy_block(op_load_u8_T0_T1_0_code, 7);
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inc_code_ptr(7);
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}
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#endif
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@ -1367,14 +1336,10 @@ DEFINE_GEN(gen_op_store_8_T0_T1_0,void,(void))
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#define HAVE_gen_op_store_8_T0_T1_0
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{
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static const uint8 op_store_8_T0_T1_0_code[] = {
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0x44, 0x89, 0xe8,
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TRANS_RAX,
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0x44, 0x88, 0x20,
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0x44, 0x89, 0xe8, 0x44, 0x88, 0x20
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};
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copy_block(op_store_8_T0_T1_0_code, 42);
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*(uint32_t *)(code_ptr() + 27) = (uint32_t)(uintptr)gKernelData;
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*(uint32_t *)(code_ptr() + 35) = (uint32_t)(uintptr)gZeroPage;
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inc_code_ptr(42);
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copy_block(op_store_8_T0_T1_0_code, 6);
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inc_code_ptr(6);
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}
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#endif
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@ -1383,15 +1348,11 @@ DEFINE_GEN(gen_op_load_s16_T0_T1_0,void,(void))
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#define HAVE_gen_op_load_s16_T0_T1_0
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{
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static const uint8 op_load_s16_T0_T1_0_code[] = {
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0x44, 0x89, 0xe8,
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TRANS_RAX,
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0x0f, 0xb7, 0x00,
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0x66, 0xc1, 0xc0, 0x08, 0x44, 0x0f, 0xbf, 0xe0
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0x44, 0x89, 0xe8, 0x0f, 0xb7, 0x00, 0x66, 0xc1, 0xc0, 0x08, 0x44, 0x0f,
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0xbf, 0xe0
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};
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copy_block(op_load_s16_T0_T1_0_code, 50);
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*(uint32_t *)(code_ptr() + 27) = (uint32_t)(uintptr)gKernelData;
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*(uint32_t *)(code_ptr() + 35) = (uint32_t)(uintptr)gZeroPage;
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inc_code_ptr(50);
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copy_block(op_load_s16_T0_T1_0_code, 14);
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inc_code_ptr(14);
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}
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#endif
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@ -1400,15 +1361,10 @@ DEFINE_GEN(gen_op_load_s32_T0_T1_0,void,(void))
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#define HAVE_gen_op_load_s32_T0_T1_0
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{
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static const uint8 op_load_s32_T0_T1_0_code[] = {
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0x44, 0x89, 0xe8,
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TRANS_RAX,
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0x8b, 0x00,
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0x41, 0x89, 0xc4, 0x41, 0x0f, 0xcc
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0x44, 0x89, 0xe8, 0x8b, 0x00, 0x41, 0x89, 0xc4, 0x41, 0x0f, 0xcc
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};
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copy_block(op_load_s32_T0_T1_0_code, 47);
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*(uint32_t *)(code_ptr() + 27) = (uint32_t)(uintptr)gKernelData;
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*(uint32_t *)(code_ptr() + 35) = (uint32_t)(uintptr)gZeroPage;
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inc_code_ptr(47);
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copy_block(op_load_s32_T0_T1_0_code, 11);
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inc_code_ptr(11);
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}
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#endif
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@ -1443,15 +1399,11 @@ DEFINE_GEN(gen_op_load_u16_T0_T1_0,void,(void))
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#define HAVE_gen_op_load_u16_T0_T1_0
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{
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static const uint8 op_load_u16_T0_T1_0_code[] = {
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0x44, 0x89, 0xe8,
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TRANS_RAX,
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0x0f, 0xb7, 0x00,
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0x66, 0xc1, 0xc0, 0x08, 0x44, 0x0f, 0xb7, 0xe0
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0x44, 0x89, 0xe8, 0x0f, 0xb7, 0x00, 0x66, 0xc1, 0xc0, 0x08, 0x44, 0x0f,
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0xb7, 0xe0
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};
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copy_block(op_load_u16_T0_T1_0_code, 50);
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*(uint32_t *)(code_ptr() + 27) = (uint32_t)(uintptr)gKernelData;
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*(uint32_t *)(code_ptr() + 35) = (uint32_t)(uintptr)gZeroPage;
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inc_code_ptr(50);
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copy_block(op_load_u16_T0_T1_0_code, 14);
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inc_code_ptr(14);
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}
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#endif
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@ -1460,15 +1412,10 @@ DEFINE_GEN(gen_op_load_u32_T0_T1_0,void,(void))
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#define HAVE_gen_op_load_u32_T0_T1_0
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{
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static const uint8 op_load_u32_T0_T1_0_code[] = {
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0x44, 0x89, 0xe8,
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TRANS_RAX,
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0x8b, 0x00,
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0x41, 0x89, 0xc4, 0x41, 0x0f, 0xcc
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0x44, 0x89, 0xe8, 0x8b, 0x00, 0x41, 0x89, 0xc4, 0x41, 0x0f, 0xcc
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};
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copy_block(op_load_u32_T0_T1_0_code, 47);
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*(uint32_t *)(code_ptr() + 27) = (uint32_t)(uintptr)gKernelData;
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*(uint32_t *)(code_ptr() + 35) = (uint32_t)(uintptr)gZeroPage;
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inc_code_ptr(47);
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copy_block(op_load_u32_T0_T1_0_code, 11);
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inc_code_ptr(11);
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}
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#endif
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@ -1477,14 +1424,10 @@ DEFINE_GEN(gen_op_load_u8_T0_T1_T2,void,(void))
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#define HAVE_gen_op_load_u8_T0_T1_T2
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{
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static const uint8 op_load_u8_T0_T1_T2_code[] = {
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0x43, 0x8d, 0x04, 0x2e,
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TRANS_RAX,
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0x44, 0x0f, 0xb6, 0x20,
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0x43, 0x8d, 0x04, 0x2e, 0x44, 0x0f, 0xb6, 0x20
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};
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copy_block(op_load_u8_T0_T1_T2_code, 44);
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*(uint32_t *)(code_ptr() + 28) = (uint32_t)(uintptr)gKernelData;
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*(uint32_t *)(code_ptr() + 36) = (uint32_t)(uintptr)gZeroPage;
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inc_code_ptr(44);
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copy_block(op_load_u8_T0_T1_T2_code, 8);
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inc_code_ptr(8);
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||||
}
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#endif
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@ -1493,16 +1436,12 @@ DEFINE_GEN(gen_op_load_u8_T0_T1_im,void,(long param1))
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#define HAVE_gen_op_load_u8_T0_T1_im
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||||
{
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||||
static const uint8 op_load_u8_T0_T1_im_code[] = {
|
||||
0x44, 0x89, 0xea, 0x48, 0x8d, 0x05, 0x00, 0x00, 0x00, 0x00,
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||||
ADD_RAX_RDX,
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||||
TRANS_RAX,
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||||
0x44, 0x0f, 0xb6, 0x20,
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||||
0x44, 0x89, 0xea, 0x48, 0x8d, 0x05, 0x00, 0x00, 0x00, 0x00, 0x44, 0x0f,
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||||
0xb6, 0x24, 0x02
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||||
};
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copy_block(op_load_u8_T0_T1_im_code, 52);
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||||
*(uint32_t *)(code_ptr() + 36) = (uint32_t)(uintptr)gKernelData;
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*(uint32_t *)(code_ptr() + 44) = (uint32_t)(uintptr)gZeroPage;
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copy_block(op_load_u8_T0_T1_im_code, 15);
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*(uint32_t *)(code_ptr() + 6) = (int32_t)((long)param1 - (long)(code_ptr() + 6 + 4)) + 0;
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||||
inc_code_ptr(52);
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||||
inc_code_ptr(15);
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}
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#endif
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||||
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@ -1511,14 +1450,11 @@ DEFINE_GEN(gen_op_store_16_T0_T1_0,void,(void))
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#define HAVE_gen_op_store_16_T0_T1_0
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||||
{
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||||
static const uint8 op_store_16_T0_T1_0_code[] = {
|
||||
0x44, 0x89, 0xea, 0x44, 0x89, 0xe0, 0x66, 0xc1, 0xc0, 0x08,
|
||||
TRANS_RDX,
|
||||
0x66, 0x89, 0x02,
|
||||
0x44, 0x89, 0xea, 0x44, 0x89, 0xe0, 0x66, 0xc1, 0xc0, 0x08, 0x66, 0x89,
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||||
0x02
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||||
};
|
||||
copy_block(op_store_16_T0_T1_0_code, 54);
|
||||
*(uint32_t *)(code_ptr() + 38) = (uint32_t)(uintptr)gKernelData;
|
||||
*(uint32_t *)(code_ptr() + 47) = (uint32_t)(uintptr)gZeroPage;
|
||||
inc_code_ptr(54);
|
||||
copy_block(op_store_16_T0_T1_0_code, 13);
|
||||
inc_code_ptr(13);
|
||||
}
|
||||
#endif
|
||||
|
||||
@ -1527,14 +1463,10 @@ DEFINE_GEN(gen_op_store_32_T0_T1_0,void,(void))
|
||||
#define HAVE_gen_op_store_32_T0_T1_0
|
||||
{
|
||||
static const uint8 op_store_32_T0_T1_0_code[] = {
|
||||
0x44, 0x89, 0xe2, 0x0f, 0xca, 0x44, 0x89, 0xe8,
|
||||
TRANS_RAX,
|
||||
0x89, 0x10,
|
||||
0x44, 0x89, 0xe2, 0x0f, 0xca, 0x44, 0x89, 0xe8, 0x89, 0x10
|
||||
};
|
||||
copy_block(op_store_32_T0_T1_0_code, 46);
|
||||
*(uint32_t *)(code_ptr() + 32) = (uint32_t)(uintptr)gKernelData;
|
||||
*(uint32_t *)(code_ptr() + 40) = (uint32_t)(uintptr)gZeroPage;
|
||||
inc_code_ptr(46);
|
||||
copy_block(op_store_32_T0_T1_0_code, 10);
|
||||
inc_code_ptr(10);
|
||||
}
|
||||
#endif
|
||||
|
||||
@ -1543,14 +1475,10 @@ DEFINE_GEN(gen_op_store_8_T0_T1_T2,void,(void))
|
||||
#define HAVE_gen_op_store_8_T0_T1_T2
|
||||
{
|
||||
static const uint8 op_store_8_T0_T1_T2_code[] = {
|
||||
0x43, 0x8d, 0x04, 0x2e,
|
||||
TRANS_RAX,
|
||||
0x44, 0x88, 0x20,
|
||||
0x43, 0x8d, 0x04, 0x2e, 0x44, 0x88, 0x20
|
||||
};
|
||||
copy_block(op_store_8_T0_T1_T2_code, 43);
|
||||
*(uint32_t *)(code_ptr() + 28) = (uint32_t)(uintptr)gKernelData;
|
||||
*(uint32_t *)(code_ptr() + 36) = (uint32_t)(uintptr)gZeroPage;
|
||||
inc_code_ptr(43);
|
||||
copy_block(op_store_8_T0_T1_T2_code, 7);
|
||||
inc_code_ptr(7);
|
||||
}
|
||||
#endif
|
||||
|
||||
@ -1559,16 +1487,12 @@ DEFINE_GEN(gen_op_store_8_T0_T1_im,void,(long param1))
|
||||
#define HAVE_gen_op_store_8_T0_T1_im
|
||||
{
|
||||
static const uint8 op_store_8_T0_T1_im_code[] = {
|
||||
0x44, 0x89, 0xea, 0x48, 0x8d, 0x05, 0x00, 0x00, 0x00, 0x00,
|
||||
ADD_RAX_RDX,
|
||||
TRANS_RAX,
|
||||
0x44, 0x88, 0x20,
|
||||
0x44, 0x89, 0xea, 0x48, 0x8d, 0x05, 0x00, 0x00, 0x00, 0x00, 0x44, 0x88,
|
||||
0x24, 0x02
|
||||
};
|
||||
copy_block(op_store_8_T0_T1_im_code, 51);
|
||||
*(uint32_t *)(code_ptr() + 36) = (uint32_t)(uintptr)gKernelData;
|
||||
*(uint32_t *)(code_ptr() + 44) = (uint32_t)(uintptr)gZeroPage;
|
||||
copy_block(op_store_8_T0_T1_im_code, 14);
|
||||
*(uint32_t *)(code_ptr() + 6) = (int32_t)((long)param1 - (long)(code_ptr() + 6 + 4)) + 0;
|
||||
inc_code_ptr(51);
|
||||
inc_code_ptr(14);
|
||||
}
|
||||
#endif
|
||||
|
||||
@ -1577,15 +1501,11 @@ DEFINE_GEN(gen_op_load_s16_T0_T1_T2,void,(void))
|
||||
#define HAVE_gen_op_load_s16_T0_T1_T2
|
||||
{
|
||||
static const uint8 op_load_s16_T0_T1_T2_code[] = {
|
||||
0x43, 0x8d, 0x04, 0x2e,
|
||||
TRANS_RAX,
|
||||
0x0f, 0xb7, 0x00,
|
||||
0x66, 0xc1, 0xc0, 0x08, 0x44, 0x0f, 0xbf, 0xe0
|
||||
0x43, 0x8d, 0x04, 0x2e, 0x0f, 0xb7, 0x00, 0x66, 0xc1, 0xc0, 0x08, 0x44,
|
||||
0x0f, 0xbf, 0xe0
|
||||
};
|
||||
copy_block(op_load_s16_T0_T1_T2_code, 51);
|
||||
*(uint32_t *)(code_ptr() + 28) = (uint32_t)(uintptr)gKernelData;
|
||||
*(uint32_t *)(code_ptr() + 36) = (uint32_t)(uintptr)gZeroPage;
|
||||
inc_code_ptr(51);
|
||||
copy_block(op_load_s16_T0_T1_T2_code, 15);
|
||||
inc_code_ptr(15);
|
||||
}
|
||||
#endif
|
||||
|
||||
@ -1594,17 +1514,12 @@ DEFINE_GEN(gen_op_load_s16_T0_T1_im,void,(long param1))
|
||||
#define HAVE_gen_op_load_s16_T0_T1_im
|
||||
{
|
||||
static const uint8 op_load_s16_T0_T1_im_code[] = {
|
||||
0x44, 0x89, 0xea, 0x48, 0x8d, 0x05, 0x00, 0x00, 0x00, 0x00,
|
||||
ADD_RAX_RDX,
|
||||
TRANS_RAX,
|
||||
0x0f, 0xb7, 0x00,
|
||||
0x66, 0xc1, 0xc0, 0x08, 0x44, 0x0f, 0xbf, 0xe0
|
||||
0x44, 0x89, 0xea, 0x48, 0x8d, 0x05, 0x00, 0x00, 0x00, 0x00, 0x0f, 0xb7,
|
||||
0x04, 0x02, 0x66, 0xc1, 0xc0, 0x08, 0x44, 0x0f, 0xbf, 0xe0
|
||||
};
|
||||
copy_block(op_load_s16_T0_T1_im_code, 59);
|
||||
*(uint32_t *)(code_ptr() + 36) = (uint32_t)(uintptr)gKernelData;
|
||||
*(uint32_t *)(code_ptr() + 44) = (uint32_t)(uintptr)gZeroPage;
|
||||
copy_block(op_load_s16_T0_T1_im_code, 22);
|
||||
*(uint32_t *)(code_ptr() + 6) = (int32_t)((long)param1 - (long)(code_ptr() + 6 + 4)) + 0;
|
||||
inc_code_ptr(59);
|
||||
inc_code_ptr(22);
|
||||
}
|
||||
#endif
|
||||
|
||||
@ -1613,15 +1528,10 @@ DEFINE_GEN(gen_op_load_s32_T0_T1_T2,void,(void))
|
||||
#define HAVE_gen_op_load_s32_T0_T1_T2
|
||||
{
|
||||
static const uint8 op_load_s32_T0_T1_T2_code[] = {
|
||||
0x43, 0x8d, 0x04, 0x2e,
|
||||
TRANS_RAX,
|
||||
0x8b, 0x00,
|
||||
0x41, 0x89, 0xc4, 0x41, 0x0f, 0xcc
|
||||
0x43, 0x8d, 0x04, 0x2e, 0x8b, 0x00, 0x41, 0x89, 0xc4, 0x41, 0x0f, 0xcc
|
||||
};
|
||||
copy_block(op_load_s32_T0_T1_T2_code, 48);
|
||||
*(uint32_t *)(code_ptr() + 28) = (uint32_t)(uintptr)gKernelData;
|
||||
*(uint32_t *)(code_ptr() + 36) = (uint32_t)(uintptr)gZeroPage;
|
||||
inc_code_ptr(48);
|
||||
copy_block(op_load_s32_T0_T1_T2_code, 12);
|
||||
inc_code_ptr(12);
|
||||
}
|
||||
#endif
|
||||
|
||||
@ -1630,17 +1540,12 @@ DEFINE_GEN(gen_op_load_s32_T0_T1_im,void,(long param1))
|
||||
#define HAVE_gen_op_load_s32_T0_T1_im
|
||||
{
|
||||
static const uint8 op_load_s32_T0_T1_im_code[] = {
|
||||
0x44, 0x89, 0xea, 0x48, 0x8d, 0x05, 0x00, 0x00, 0x00, 0x00,
|
||||
ADD_RAX_RDX,
|
||||
TRANS_RAX,
|
||||
0x8b, 0x00,
|
||||
0x41, 0x89, 0xc4, 0x41, 0x0f, 0xcc
|
||||
0x44, 0x89, 0xea, 0x48, 0x8d, 0x05, 0x00, 0x00, 0x00, 0x00, 0x8b, 0x04,
|
||||
0x02, 0x41, 0x89, 0xc4, 0x41, 0x0f, 0xcc
|
||||
};
|
||||
copy_block(op_load_s32_T0_T1_im_code, 56);
|
||||
*(uint32_t *)(code_ptr() + 36) = (uint32_t)(uintptr)gKernelData;
|
||||
*(uint32_t *)(code_ptr() + 44) = (uint32_t)(uintptr)gZeroPage;
|
||||
copy_block(op_load_s32_T0_T1_im_code, 19);
|
||||
*(uint32_t *)(code_ptr() + 6) = (int32_t)((long)param1 - (long)(code_ptr() + 6 + 4)) + 0;
|
||||
inc_code_ptr(56);
|
||||
inc_code_ptr(19);
|
||||
}
|
||||
#endif
|
||||
|
||||
@ -1649,15 +1554,11 @@ DEFINE_GEN(gen_op_load_u16_T0_T1_T2,void,(void))
|
||||
#define HAVE_gen_op_load_u16_T0_T1_T2
|
||||
{
|
||||
static const uint8 op_load_u16_T0_T1_T2_code[] = {
|
||||
0x43, 0x8d, 0x04, 0x2e,
|
||||
TRANS_RAX,
|
||||
0x0f, 0xb7, 0x00,
|
||||
0x66, 0xc1, 0xc0, 0x08, 0x44, 0x0f, 0xb7, 0xe0
|
||||
0x43, 0x8d, 0x04, 0x2e, 0x0f, 0xb7, 0x00, 0x66, 0xc1, 0xc0, 0x08, 0x44,
|
||||
0x0f, 0xb7, 0xe0
|
||||
};
|
||||
copy_block(op_load_u16_T0_T1_T2_code, 51);
|
||||
*(uint32_t *)(code_ptr() + 28) = (uint32_t)(uintptr)gKernelData;
|
||||
*(uint32_t *)(code_ptr() + 36) = (uint32_t)(uintptr)gZeroPage;
|
||||
inc_code_ptr(51);
|
||||
copy_block(op_load_u16_T0_T1_T2_code, 15);
|
||||
inc_code_ptr(15);
|
||||
}
|
||||
#endif
|
||||
|
||||
@ -1666,17 +1567,12 @@ DEFINE_GEN(gen_op_load_u16_T0_T1_im,void,(long param1))
|
||||
#define HAVE_gen_op_load_u16_T0_T1_im
|
||||
{
|
||||
static const uint8 op_load_u16_T0_T1_im_code[] = {
|
||||
0x44, 0x89, 0xea, 0x48, 0x8d, 0x05, 0x00, 0x00, 0x00, 0x00,
|
||||
ADD_RAX_RDX,
|
||||
TRANS_RAX,
|
||||
0x0f, 0xb7, 0x00,
|
||||
0x66, 0xc1, 0xc0, 0x08, 0x44, 0x0f, 0xb7, 0xe0
|
||||
0x44, 0x89, 0xea, 0x48, 0x8d, 0x05, 0x00, 0x00, 0x00, 0x00, 0x0f, 0xb7,
|
||||
0x04, 0x02, 0x66, 0xc1, 0xc0, 0x08, 0x44, 0x0f, 0xb7, 0xe0
|
||||
};
|
||||
copy_block(op_load_u16_T0_T1_im_code, 59);
|
||||
*(uint32_t *)(code_ptr() + 36) = (uint32_t)(uintptr)gKernelData;
|
||||
*(uint32_t *)(code_ptr() + 44) = (uint32_t)(uintptr)gZeroPage;
|
||||
copy_block(op_load_u16_T0_T1_im_code, 22);
|
||||
*(uint32_t *)(code_ptr() + 6) = (int32_t)((long)param1 - (long)(code_ptr() + 6 + 4)) + 0;
|
||||
inc_code_ptr(59);
|
||||
inc_code_ptr(22);
|
||||
}
|
||||
#endif
|
||||
|
||||
@ -1685,15 +1581,10 @@ DEFINE_GEN(gen_op_load_u32_T0_T1_T2,void,(void))
|
||||
#define HAVE_gen_op_load_u32_T0_T1_T2
|
||||
{
|
||||
static const uint8 op_load_u32_T0_T1_T2_code[] = {
|
||||
0x43, 0x8d, 0x04, 0x2e,
|
||||
TRANS_RAX,
|
||||
0x8b, 0x00,
|
||||
0x41, 0x89, 0xc4, 0x41, 0x0f, 0xcc
|
||||
0x43, 0x8d, 0x04, 0x2e, 0x8b, 0x00, 0x41, 0x89, 0xc4, 0x41, 0x0f, 0xcc
|
||||
};
|
||||
copy_block(op_load_u32_T0_T1_T2_code, 48);
|
||||
*(uint32_t *)(code_ptr() + 28) = (uint32_t)(uintptr)gKernelData;
|
||||
*(uint32_t *)(code_ptr() + 36) = (uint32_t)(uintptr)gZeroPage;
|
||||
inc_code_ptr(48);
|
||||
copy_block(op_load_u32_T0_T1_T2_code, 12);
|
||||
inc_code_ptr(12);
|
||||
}
|
||||
#endif
|
||||
|
||||
@ -1702,17 +1593,12 @@ DEFINE_GEN(gen_op_load_u32_T0_T1_im,void,(long param1))
|
||||
#define HAVE_gen_op_load_u32_T0_T1_im
|
||||
{
|
||||
static const uint8 op_load_u32_T0_T1_im_code[] = {
|
||||
0x44, 0x89, 0xea, 0x48, 0x8d, 0x05, 0x00, 0x00, 0x00, 0x00,
|
||||
ADD_RAX_RDX,
|
||||
TRANS_RAX,
|
||||
0x8b, 0x00,
|
||||
0x41, 0x89, 0xc4, 0x41, 0x0f, 0xcc
|
||||
0x44, 0x89, 0xea, 0x48, 0x8d, 0x05, 0x00, 0x00, 0x00, 0x00, 0x8b, 0x04,
|
||||
0x02, 0x41, 0x89, 0xc4, 0x41, 0x0f, 0xcc
|
||||
};
|
||||
copy_block(op_load_u32_T0_T1_im_code, 56);
|
||||
*(uint32_t *)(code_ptr() + 36) = (uint32_t)(uintptr)gKernelData;
|
||||
*(uint32_t *)(code_ptr() + 44) = (uint32_t)(uintptr)gZeroPage;
|
||||
copy_block(op_load_u32_T0_T1_im_code, 19);
|
||||
*(uint32_t *)(code_ptr() + 6) = (int32_t)((long)param1 - (long)(code_ptr() + 6 + 4)) + 0;
|
||||
inc_code_ptr(56);
|
||||
inc_code_ptr(19);
|
||||
}
|
||||
#endif
|
||||
|
||||
@ -1721,14 +1607,11 @@ DEFINE_GEN(gen_op_store_16_T0_T1_T2,void,(void))
|
||||
#define HAVE_gen_op_store_16_T0_T1_T2
|
||||
{
|
||||
static const uint8 op_store_16_T0_T1_T2_code[] = {
|
||||
0x43, 0x8d, 0x14, 0x2e, 0x44, 0x89, 0xe0, 0x66, 0xc1, 0xc0, 0x08,
|
||||
TRANS_RDX,
|
||||
0x66, 0x89, 0x02,
|
||||
0x43, 0x8d, 0x14, 0x2e, 0x44, 0x89, 0xe0, 0x66, 0xc1, 0xc0, 0x08, 0x66,
|
||||
0x89, 0x02
|
||||
};
|
||||
copy_block(op_store_16_T0_T1_T2_code, 55);
|
||||
*(uint32_t *)(code_ptr() + 39) = (uint32_t)(uintptr)gKernelData;
|
||||
*(uint32_t *)(code_ptr() + 48) = (uint32_t)(uintptr)gZeroPage;
|
||||
inc_code_ptr(55);
|
||||
copy_block(op_store_16_T0_T1_T2_code, 14);
|
||||
inc_code_ptr(14);
|
||||
}
|
||||
#endif
|
||||
|
||||
@ -1738,16 +1621,11 @@ DEFINE_GEN(gen_op_store_16_T0_T1_im,void,(long param1))
|
||||
{
|
||||
static const uint8 op_store_16_T0_T1_im_code[] = {
|
||||
0x44, 0x89, 0xe9, 0x44, 0x89, 0xe2, 0x66, 0xc1, 0xc2, 0x08, 0x48, 0x8d,
|
||||
0x05, 0x00, 0x00, 0x00, 0x00,
|
||||
ADD_RAX_RCX,
|
||||
TRANS_RAX,
|
||||
0x66, 0x89, 0x10,
|
||||
0x05, 0x00, 0x00, 0x00, 0x00, 0x66, 0x89, 0x14, 0x01
|
||||
};
|
||||
copy_block(op_store_16_T0_T1_im_code, 58);
|
||||
*(uint32_t *)(code_ptr() + 43) = (uint32_t)(uintptr)gKernelData;
|
||||
*(uint32_t *)(code_ptr() + 51) = (uint32_t)(uintptr)gZeroPage;
|
||||
copy_block(op_store_16_T0_T1_im_code, 21);
|
||||
*(uint32_t *)(code_ptr() + 13) = (int32_t)((long)param1 - (long)(code_ptr() + 13 + 4)) + 0;
|
||||
inc_code_ptr(58);
|
||||
inc_code_ptr(21);
|
||||
}
|
||||
#endif
|
||||
|
||||
@ -1756,14 +1634,11 @@ DEFINE_GEN(gen_op_store_32_T0_T1_T2,void,(void))
|
||||
#define HAVE_gen_op_store_32_T0_T1_T2
|
||||
{
|
||||
static const uint8 op_store_32_T0_T1_T2_code[] = {
|
||||
0x44, 0x89, 0xf2, 0x44, 0x89, 0xe1, 0x0f, 0xc9, 0x44, 0x01, 0xea,
|
||||
TRANS_RDX,
|
||||
0x89, 0x0a,
|
||||
0x44, 0x89, 0xf2, 0x44, 0x89, 0xe1, 0x0f, 0xc9, 0x44, 0x01, 0xea, 0x89,
|
||||
0x0a
|
||||
};
|
||||
copy_block(op_store_32_T0_T1_T2_code, 54);
|
||||
*(uint32_t *)(code_ptr() + 39) = (uint32_t)(uintptr)gKernelData;
|
||||
*(uint32_t *)(code_ptr() + 48) = (uint32_t)(uintptr)gZeroPage;
|
||||
inc_code_ptr(54);
|
||||
copy_block(op_store_32_T0_T1_T2_code, 13);
|
||||
inc_code_ptr(13);
|
||||
}
|
||||
#endif
|
||||
|
||||
@ -1773,16 +1648,11 @@ DEFINE_GEN(gen_op_store_32_T0_T1_im,void,(long param1))
|
||||
{
|
||||
static const uint8 op_store_32_T0_T1_im_code[] = {
|
||||
0x44, 0x89, 0xe1, 0x0f, 0xc9, 0x44, 0x89, 0xe8, 0x48, 0x8d, 0x15, 0x00,
|
||||
0x00, 0x00, 0x00,
|
||||
ADD_RAX_RDX,
|
||||
TRANS_RAX,
|
||||
0x89, 0x08,
|
||||
0x00, 0x00, 0x00, 0x89, 0x0c, 0x10
|
||||
};
|
||||
copy_block(op_store_32_T0_T1_im_code, 55);
|
||||
*(uint32_t *)(code_ptr() + 41) = (uint32_t)(uintptr)gKernelData;
|
||||
*(uint32_t *)(code_ptr() + 49) = (uint32_t)(uintptr)gZeroPage;
|
||||
copy_block(op_store_32_T0_T1_im_code, 18);
|
||||
*(uint32_t *)(code_ptr() + 11) = (int32_t)((long)param1 - (long)(code_ptr() + 11 + 4)) + 0;
|
||||
inc_code_ptr(55);
|
||||
inc_code_ptr(18);
|
||||
}
|
||||
#endif
|
||||
|
||||
|
File diff suppressed because it is too large
Load Diff
@ -1,5 +1,9 @@
|
||||
#if defined(__x86_64__)
|
||||
#ifdef __APPLE__
|
||||
#include "basic-dyngen-ops-x86_64_macos.hpp"
|
||||
#else
|
||||
#include "basic-dyngen-ops-x86_64.hpp"
|
||||
#endif
|
||||
#elif defined(__i386__)
|
||||
#include "basic-dyngen-ops-x86_32.hpp"
|
||||
#else
|
||||
|
@ -1,30 +1,3 @@
|
||||
#define ADD_RAX_RCX 0x01,0xc8
|
||||
#define ADD_RDX_RCX 0x01,0xca
|
||||
#define ADD_RAX_RDX 0x01,0xd0
|
||||
#define TRANS_RAX \
|
||||
0x48,0x3D,0x00,0x30,0x00,0x00,\
|
||||
0x72,0x16,\
|
||||
0x48,0x3D,0x00,0xE0,0xFF,0x5F,\
|
||||
0x72,0x14,\
|
||||
0x48,0x25,0xFF,0x1F,0x00,0x00,\
|
||||
0x48,0x05,0x00,0x00,0x00,0x00,\
|
||||
0xEB,0x06,\
|
||||
0x48,0x05,0x00,0x00,0x00,0x00
|
||||
|
||||
#define TRANS_RDX \
|
||||
0x48,0x81,0xFA,0x00,0x30,0x00,0x00,\
|
||||
0x72,0x19,\
|
||||
0x48,0x81,0xFA,0x00,0xE0,0xFF,0x5F,\
|
||||
0x72,0x17,\
|
||||
0x48,0x81,0xE2,0xFF,0x1F,0x00,0x00,\
|
||||
0x48,0x81,0xC2,0x00,0x00,0x00,0x00,\
|
||||
0xEB,0x07,\
|
||||
0x48,0x81,0xC2,0x00,0x00,0x00,0x00
|
||||
|
||||
#ifdef DYNGEN_IMPL
|
||||
extern uint8 gZeroPage[0x3000], gKernelData[0x2000];
|
||||
#endif
|
||||
|
||||
#ifndef DEFINE_CST
|
||||
#define DEFINE_CST(NAME, VALUE)
|
||||
#endif
|
||||
@ -10444,26 +10417,14 @@ DEFINE_GEN(gen_op_load_vect_VD_T0,void,(void))
|
||||
#define HAVE_gen_op_load_vect_VD_T0
|
||||
{
|
||||
static const uint8 op_load_vect_VD_T0_code[] = {
|
||||
0x44, 0x89, 0xe2, 0x83, 0xe2, 0xf0, 0x89, 0xd0,
|
||||
TRANS_RAX,
|
||||
0x8b, 0x00,
|
||||
0x0f, 0xc8, 0x41, 0x89, 0x07, 0x8d, 0x42, 0x04, 0x89, 0xc0,
|
||||
TRANS_RAX,
|
||||
0x8b, 0x00,
|
||||
0x0f, 0xc8, 0x41, 0x89, 0x47, 0x04, 0x8d, 0x42, 0x08, 0x89, 0xc0,
|
||||
TRANS_RAX,
|
||||
0x8b, 0x00,
|
||||
0x0f, 0xc8, 0x41, 0x89, 0x47, 0x08, 0x83, 0xc2, 0x0c, 0x89, 0xd2, 0x8b,
|
||||
0x02, 0x0f, 0xc8, 0x41, 0x89, 0x47, 0x0c
|
||||
0x44, 0x89, 0xe2, 0x83, 0xe2, 0xf0, 0x89, 0xd0, 0x8b, 0x00, 0x0f, 0xc8,
|
||||
0x41, 0x89, 0x07, 0x8d, 0x42, 0x04, 0x89, 0xc0, 0x8b, 0x00, 0x0f, 0xc8,
|
||||
0x41, 0x89, 0x47, 0x04, 0x8d, 0x42, 0x08, 0x89, 0xc0, 0x8b, 0x00, 0x0f,
|
||||
0xc8, 0x41, 0x89, 0x47, 0x08, 0x83, 0xc2, 0x0c, 0x89, 0xd2, 0x8b, 0x02,
|
||||
0x0f, 0xc8, 0x41, 0x89, 0x47, 0x0c
|
||||
};
|
||||
copy_block(op_load_vect_VD_T0_code, 162);
|
||||
*(uint32_t *)(code_ptr() + 32) = (uint32_t)(uintptr)gKernelData;
|
||||
*(uint32_t *)(code_ptr() + 80) = (uint32_t)(uintptr)gKernelData;
|
||||
*(uint32_t *)(code_ptr() + 129) = (uint32_t)(uintptr)gKernelData;
|
||||
*(uint32_t *)(code_ptr() + 40) = (uint32_t)(uintptr)gZeroPage;
|
||||
*(uint32_t *)(code_ptr() + 88) = (uint32_t)(uintptr)gZeroPage;
|
||||
*(uint32_t *)(code_ptr() + 137) = (uint32_t)(uintptr)gZeroPage;
|
||||
inc_code_ptr(162);
|
||||
copy_block(op_load_vect_VD_T0_code, 54);
|
||||
inc_code_ptr(54);
|
||||
}
|
||||
#endif
|
||||
|
||||
@ -10472,15 +10433,11 @@ DEFINE_GEN(gen_op_load_word_VD_T0,void,(void))
|
||||
#define HAVE_gen_op_load_word_VD_T0
|
||||
{
|
||||
static const uint8 op_load_word_VD_T0_code[] = {
|
||||
0x44, 0x89, 0xe2, 0x48, 0x89, 0xd0, 0x83, 0xe0, 0xfc,
|
||||
TRANS_RAX,
|
||||
0x8b, 0x00,
|
||||
0x0f, 0xc8, 0xc1, 0xea, 0x02, 0x83, 0xe2, 0x03, 0x41, 0x89, 0x04, 0x97
|
||||
0x44, 0x89, 0xe2, 0x48, 0x89, 0xd0, 0x83, 0xe0, 0xfc, 0x8b, 0x00, 0x0f,
|
||||
0xc8, 0xc1, 0xea, 0x02, 0x83, 0xe2, 0x03, 0x41, 0x89, 0x04, 0x97
|
||||
};
|
||||
copy_block(op_load_word_VD_T0_code, 59);
|
||||
*(uint32_t *)(code_ptr() + 33) = (uint32_t)(uintptr)gKernelData;
|
||||
*(uint32_t *)(code_ptr() + 41) = (uint32_t)(uintptr)gZeroPage;
|
||||
inc_code_ptr(59);
|
||||
copy_block(op_load_word_VD_T0_code, 23);
|
||||
inc_code_ptr(23);
|
||||
}
|
||||
#endif
|
||||
|
||||
@ -10538,26 +10495,13 @@ DEFINE_GEN(gen_op_store_vect_VD_T0,void,(void))
|
||||
{
|
||||
static const uint8 op_store_vect_VD_T0_code[] = {
|
||||
0x44, 0x89, 0xe1, 0x83, 0xe1, 0xf0, 0x41, 0x8b, 0x07, 0x0f, 0xc8, 0x89,
|
||||
0xca,
|
||||
TRANS_RDX,
|
||||
0x89, 0x02,
|
||||
0x41, 0x8b, 0x57, 0x04, 0x0f, 0xca, 0x8d, 0x41, 0x04, 0x89, 0xc0,
|
||||
TRANS_RAX,
|
||||
0x89, 0x10,
|
||||
0x41, 0x8b, 0x57, 0x08, 0x0f, 0xca, 0x8d, 0x41, 0x08, 0x89, 0xc0,
|
||||
TRANS_RAX,
|
||||
0x89, 0x10,
|
||||
0x41, 0x8b, 0x47, 0x0c, 0x0f, 0xc8, 0x83, 0xc1, 0x0c, 0x89, 0xc9, 0x89,
|
||||
0x01
|
||||
0xca, 0x89, 0x02, 0x41, 0x8b, 0x57, 0x04, 0x0f, 0xca, 0x8d, 0x41, 0x04,
|
||||
0x89, 0xc0, 0x89, 0x10, 0x41, 0x8b, 0x57, 0x08, 0x0f, 0xca, 0x8d, 0x41,
|
||||
0x08, 0x89, 0xc0, 0x89, 0x10, 0x41, 0x8b, 0x47, 0x0c, 0x0f, 0xc8, 0x83,
|
||||
0xc1, 0x0c, 0x89, 0xc9, 0x89, 0x01
|
||||
};
|
||||
copy_block(op_store_vect_VD_T0_code, 167);
|
||||
*(uint32_t *)(code_ptr() + 41) = (uint32_t)(uintptr)gKernelData;
|
||||
*(uint32_t *)(code_ptr() + 91) = (uint32_t)(uintptr)gKernelData;
|
||||
*(uint32_t *)(code_ptr() + 140) = (uint32_t)(uintptr)gKernelData;
|
||||
*(uint32_t *)(code_ptr() + 50) = (uint32_t)(uintptr)gZeroPage;
|
||||
*(uint32_t *)(code_ptr() + 99) = (uint32_t)(uintptr)gZeroPage;
|
||||
*(uint32_t *)(code_ptr() + 148) = (uint32_t)(uintptr)gZeroPage;
|
||||
inc_code_ptr(167);
|
||||
copy_block(op_store_vect_VD_T0_code, 54);
|
||||
inc_code_ptr(54);
|
||||
}
|
||||
#endif
|
||||
|
||||
@ -10567,14 +10511,10 @@ DEFINE_GEN(gen_op_store_word_VD_T0,void,(void))
|
||||
{
|
||||
static const uint8 op_store_word_VD_T0_code[] = {
|
||||
0x44, 0x89, 0xe0, 0x44, 0x89, 0xe2, 0xc1, 0xea, 0x02, 0x83, 0xe2, 0x03,
|
||||
0x41, 0x8b, 0x14, 0x97, 0x0f, 0xca, 0x83, 0xe0, 0xfc,
|
||||
TRANS_RAX,
|
||||
0x89, 0x10,
|
||||
0x41, 0x8b, 0x14, 0x97, 0x0f, 0xca, 0x83, 0xe0, 0xfc, 0x89, 0x10
|
||||
};
|
||||
copy_block(op_store_word_VD_T0_code, 59);
|
||||
*(uint32_t *)(code_ptr() + 45) = (uint32_t)(uintptr)gKernelData;
|
||||
*(uint32_t *)(code_ptr() + 53) = (uint32_t)(uintptr)gZeroPage;
|
||||
inc_code_ptr(59);
|
||||
copy_block(op_store_word_VD_T0_code, 23);
|
||||
inc_code_ptr(23);
|
||||
}
|
||||
#endif
|
||||
|
||||
@ -10753,15 +10693,11 @@ DEFINE_GEN(gen_op_load_double_FD_T1_0,void,(void))
|
||||
#define HAVE_gen_op_load_double_FD_T1_0
|
||||
{
|
||||
static const uint8 op_load_double_FD_T1_0_code[] = {
|
||||
0x44, 0x89, 0xe8,
|
||||
TRANS_RAX,
|
||||
0x48, 0x8b, 0x00,
|
||||
0x48, 0x0f, 0xc8, 0x48, 0x89, 0x85, 0xa8, 0x08, 0x10, 0x00
|
||||
0x44, 0x89, 0xe8, 0x48, 0x8b, 0x00, 0x48, 0x0f, 0xc8, 0x48, 0x89, 0x85,
|
||||
0xa8, 0x08, 0x10, 0x00
|
||||
};
|
||||
copy_block(op_load_double_FD_T1_0_code, 52);
|
||||
*(uint32_t *)(code_ptr() + 27) = (uint32_t)(uintptr)gKernelData;
|
||||
*(uint32_t *)(code_ptr() + 35) = (uint32_t)(uintptr)gZeroPage;
|
||||
inc_code_ptr(52);
|
||||
copy_block(op_load_double_FD_T1_0_code, 16);
|
||||
inc_code_ptr(16);
|
||||
}
|
||||
#endif
|
||||
|
||||
@ -10770,17 +10706,13 @@ DEFINE_GEN(gen_op_load_single_FD_T1_0,void,(void))
|
||||
#define HAVE_gen_op_load_single_FD_T1_0
|
||||
{
|
||||
static const uint8 op_load_single_FD_T1_0_code[] = {
|
||||
0x44, 0x89, 0xe8,
|
||||
TRANS_RAX,
|
||||
0x8b, 0x00,
|
||||
0x0f, 0xc8, 0x89, 0x44, 0x24, 0xf4, 0xf3, 0x0f, 0x10, 0x44, 0x24, 0xf4,
|
||||
0xf3, 0x0f, 0x5a, 0xc0, 0xf2, 0x0f, 0x11, 0x44, 0x24, 0xf8, 0x48, 0x8b,
|
||||
0x44, 0x24, 0xf8, 0x48, 0x89, 0x85, 0xa8, 0x08, 0x10, 0x00
|
||||
0x44, 0x89, 0xe8, 0x8b, 0x00, 0x0f, 0xc8, 0x89, 0x44, 0x24, 0xf4, 0xf3,
|
||||
0x0f, 0x10, 0x44, 0x24, 0xf4, 0xf3, 0x0f, 0x5a, 0xc0, 0xf2, 0x0f, 0x11,
|
||||
0x44, 0x24, 0xf8, 0x48, 0x8b, 0x44, 0x24, 0xf8, 0x48, 0x89, 0x85, 0xa8,
|
||||
0x08, 0x10, 0x00
|
||||
};
|
||||
copy_block(op_load_single_FD_T1_0_code, 75);
|
||||
*(uint32_t *)(code_ptr() + 27) = (uint32_t)(uintptr)gKernelData;
|
||||
*(uint32_t *)(code_ptr() + 35) = (uint32_t)(uintptr)gZeroPage;
|
||||
inc_code_ptr(75);
|
||||
copy_block(op_load_single_FD_T1_0_code, 39);
|
||||
inc_code_ptr(39);
|
||||
}
|
||||
#endif
|
||||
|
||||
@ -10943,15 +10875,11 @@ DEFINE_GEN(gen_op_load_double_FD_T1_T2,void,(void))
|
||||
#define HAVE_gen_op_load_double_FD_T1_T2
|
||||
{
|
||||
static const uint8 op_load_double_FD_T1_T2_code[] = {
|
||||
0x43, 0x8d, 0x04, 0x2e,
|
||||
TRANS_RAX,
|
||||
0x48, 0x8b, 0x00,
|
||||
0x48, 0x0f, 0xc8, 0x48, 0x89, 0x85, 0xa8, 0x08, 0x10, 0x00
|
||||
0x43, 0x8d, 0x04, 0x2e, 0x48, 0x8b, 0x00, 0x48, 0x0f, 0xc8, 0x48, 0x89,
|
||||
0x85, 0xa8, 0x08, 0x10, 0x00
|
||||
};
|
||||
copy_block(op_load_double_FD_T1_T2_code, 53);
|
||||
*(uint32_t *)(code_ptr() + 28) = (uint32_t)(uintptr)gKernelData;
|
||||
*(uint32_t *)(code_ptr() + 36) = (uint32_t)(uintptr)gZeroPage;
|
||||
inc_code_ptr(53);
|
||||
copy_block(op_load_double_FD_T1_T2_code, 17);
|
||||
inc_code_ptr(17);
|
||||
}
|
||||
#endif
|
||||
|
||||
@ -10960,17 +10888,12 @@ DEFINE_GEN(gen_op_load_double_FD_T1_im,void,(long param1))
|
||||
#define HAVE_gen_op_load_double_FD_T1_im
|
||||
{
|
||||
static const uint8 op_load_double_FD_T1_im_code[] = {
|
||||
0x44, 0x89, 0xea, 0x48, 0x8d, 0x05, 0x00, 0x00, 0x00, 0x00,
|
||||
ADD_RAX_RDX,
|
||||
TRANS_RAX,
|
||||
0x48, 0x8b, 0x00,
|
||||
0x48, 0x0f, 0xc8, 0x48, 0x89, 0x85, 0xa8, 0x08, 0x10, 0x00
|
||||
0x44, 0x89, 0xea, 0x48, 0x8d, 0x05, 0x00, 0x00, 0x00, 0x00, 0x48, 0x8b,
|
||||
0x04, 0x02, 0x48, 0x0f, 0xc8, 0x48, 0x89, 0x85, 0xa8, 0x08, 0x10, 0x00
|
||||
};
|
||||
copy_block(op_load_double_FD_T1_im_code, 61);
|
||||
*(uint32_t *)(code_ptr() + 36) = (uint32_t)(uintptr)gKernelData;
|
||||
*(uint32_t *)(code_ptr() + 44) = (uint32_t)(uintptr)gZeroPage;
|
||||
copy_block(op_load_double_FD_T1_im_code, 24);
|
||||
*(uint32_t *)(code_ptr() + 6) = (int32_t)((long)param1 - (long)(code_ptr() + 6 + 4)) + 0;
|
||||
inc_code_ptr(61);
|
||||
inc_code_ptr(24);
|
||||
}
|
||||
#endif
|
||||
|
||||
@ -10979,17 +10902,13 @@ DEFINE_GEN(gen_op_load_single_FD_T1_T2,void,(void))
|
||||
#define HAVE_gen_op_load_single_FD_T1_T2
|
||||
{
|
||||
static const uint8 op_load_single_FD_T1_T2_code[] = {
|
||||
0x43, 0x8d, 0x04, 0x2e,
|
||||
TRANS_RAX,
|
||||
0x8b, 0x00,
|
||||
0x0f, 0xc8, 0x89, 0x44, 0x24, 0xf4, 0xf3, 0x0f, 0x10, 0x44, 0x24, 0xf4,
|
||||
0xf3, 0x0f, 0x5a, 0xc0, 0xf2, 0x0f, 0x11, 0x44, 0x24, 0xf8, 0x48, 0x8b,
|
||||
0x44, 0x24, 0xf8, 0x48, 0x89, 0x85, 0xa8, 0x08, 0x10, 0x00
|
||||
0x43, 0x8d, 0x04, 0x2e, 0x8b, 0x00, 0x0f, 0xc8, 0x89, 0x44, 0x24, 0xf4,
|
||||
0xf3, 0x0f, 0x10, 0x44, 0x24, 0xf4, 0xf3, 0x0f, 0x5a, 0xc0, 0xf2, 0x0f,
|
||||
0x11, 0x44, 0x24, 0xf8, 0x48, 0x8b, 0x44, 0x24, 0xf8, 0x48, 0x89, 0x85,
|
||||
0xa8, 0x08, 0x10, 0x00
|
||||
};
|
||||
copy_block(op_load_single_FD_T1_T2_code, 76);
|
||||
*(uint32_t *)(code_ptr() + 28) = (uint32_t)(uintptr)gKernelData;
|
||||
*(uint32_t *)(code_ptr() + 36) = (uint32_t)(uintptr)gZeroPage;
|
||||
inc_code_ptr(76);
|
||||
copy_block(op_load_single_FD_T1_T2_code, 40);
|
||||
inc_code_ptr(40);
|
||||
}
|
||||
#endif
|
||||
|
||||
@ -10998,19 +10917,14 @@ DEFINE_GEN(gen_op_load_single_FD_T1_im,void,(long param1))
|
||||
#define HAVE_gen_op_load_single_FD_T1_im
|
||||
{
|
||||
static const uint8 op_load_single_FD_T1_im_code[] = {
|
||||
0x44, 0x89, 0xea, 0x48, 0x8d, 0x05, 0x00, 0x00, 0x00, 0x00,
|
||||
ADD_RAX_RDX,
|
||||
TRANS_RAX,
|
||||
0x8b, 0x00,
|
||||
0x0f, 0xc8, 0x89, 0x44, 0x24, 0xf4, 0xf3, 0x0f, 0x10, 0x44, 0x24, 0xf4,
|
||||
0xf3, 0x0f, 0x5a, 0xc0, 0xf2, 0x0f, 0x11, 0x44, 0x24, 0xf8, 0x48, 0x8b,
|
||||
0x44, 0x24, 0xf8, 0x48, 0x89, 0x85, 0xa8, 0x08, 0x10, 0x00
|
||||
0x44, 0x89, 0xea, 0x48, 0x8d, 0x05, 0x00, 0x00, 0x00, 0x00, 0x8b, 0x04,
|
||||
0x02, 0x0f, 0xc8, 0x89, 0x44, 0x24, 0xf4, 0xf3, 0x0f, 0x10, 0x44, 0x24,
|
||||
0xf4, 0xf3, 0x0f, 0x5a, 0xc0, 0xf2, 0x0f, 0x11, 0x44, 0x24, 0xf8, 0x48,
|
||||
0x8b, 0x44, 0x24, 0xf8, 0x48, 0x89, 0x85, 0xa8, 0x08, 0x10, 0x00
|
||||
};
|
||||
copy_block(op_load_single_FD_T1_im_code, 84);
|
||||
*(uint32_t *)(code_ptr() + 36) = (uint32_t)(uintptr)gKernelData;
|
||||
*(uint32_t *)(code_ptr() + 44) = (uint32_t)(uintptr)gZeroPage;
|
||||
copy_block(op_load_single_FD_T1_im_code, 47);
|
||||
*(uint32_t *)(code_ptr() + 6) = (int32_t)((long)param1 - (long)(code_ptr() + 6 + 4)) + 0;
|
||||
inc_code_ptr(84);
|
||||
inc_code_ptr(47);
|
||||
}
|
||||
#endif
|
||||
|
||||
@ -11019,14 +10933,11 @@ DEFINE_GEN(gen_op_store_double_F0_T1_0,void,(void))
|
||||
#define HAVE_gen_op_store_double_F0_T1_0
|
||||
{
|
||||
static const uint8 op_store_double_F0_T1_0_code[] = {
|
||||
0x49, 0x8b, 0x04, 0x24, 0x44, 0x89, 0xea, 0x48, 0x0f, 0xc8,
|
||||
TRANS_RDX,
|
||||
0x48, 0x89, 0x02,
|
||||
0x49, 0x8b, 0x04, 0x24, 0x44, 0x89, 0xea, 0x48, 0x0f, 0xc8, 0x48, 0x89,
|
||||
0x02
|
||||
};
|
||||
copy_block(op_store_double_F0_T1_0_code, 54);
|
||||
*(uint32_t *)(code_ptr() + 38) = (uint32_t)(uintptr)gKernelData;
|
||||
*(uint32_t *)(code_ptr() + 47) = (uint32_t)(uintptr)gZeroPage;
|
||||
inc_code_ptr(54);
|
||||
copy_block(op_store_double_F0_T1_0_code, 13);
|
||||
inc_code_ptr(13);
|
||||
}
|
||||
#endif
|
||||
|
||||
@ -11041,14 +10952,11 @@ DEFINE_GEN(gen_op_store_single_F0_T1_0,void,(void))
|
||||
0xff, 0x3f, 0x48, 0xc1, 0xe9, 0x03, 0x89, 0xc8, 0x25, 0x00, 0x00, 0x00,
|
||||
0xc0, 0x09, 0xc2, 0xeb, 0x19, 0x48, 0x89, 0x4c, 0x24, 0xf0, 0xf2, 0x0f,
|
||||
0x10, 0x44, 0x24, 0xf0, 0xf2, 0x0f, 0x5a, 0xc0, 0xf3, 0x0f, 0x11, 0x44,
|
||||
0x24, 0xfc, 0x8b, 0x54, 0x24, 0xfc, 0x0f, 0xca, 0x44, 0x89, 0xe8,
|
||||
TRANS_RAX,
|
||||
0x89, 0x10,
|
||||
0x24, 0xfc, 0x8b, 0x54, 0x24, 0xfc, 0x0f, 0xca, 0x44, 0x89, 0xe8, 0x89,
|
||||
0x10
|
||||
};
|
||||
copy_block(op_store_single_F0_T1_0_code, 121);
|
||||
*(uint32_t *)(code_ptr() + 107) = (uint32_t)(uintptr)gKernelData;
|
||||
*(uint32_t *)(code_ptr() + 115) = (uint32_t)(uintptr)gZeroPage;
|
||||
inc_code_ptr(121);
|
||||
copy_block(op_store_single_F0_T1_0_code, 85);
|
||||
inc_code_ptr(85);
|
||||
}
|
||||
#endif
|
||||
|
||||
@ -11117,14 +11025,11 @@ DEFINE_GEN(gen_op_store_double_F0_T1_T2,void,(void))
|
||||
#define HAVE_gen_op_store_double_F0_T1_T2
|
||||
{
|
||||
static const uint8 op_store_double_F0_T1_T2_code[] = {
|
||||
0x49, 0x8b, 0x04, 0x24, 0x43, 0x8d, 0x14, 0x2e, 0x48, 0x0f, 0xc8,
|
||||
TRANS_RDX,
|
||||
0x48, 0x89, 0x02,
|
||||
0x49, 0x8b, 0x04, 0x24, 0x43, 0x8d, 0x14, 0x2e, 0x48, 0x0f, 0xc8, 0x48,
|
||||
0x89, 0x02
|
||||
};
|
||||
copy_block(op_store_double_F0_T1_T2_code, 55);
|
||||
*(uint32_t *)(code_ptr() + 39) = (uint32_t)(uintptr)gKernelData;
|
||||
*(uint32_t *)(code_ptr() + 48) = (uint32_t)(uintptr)gZeroPage;
|
||||
inc_code_ptr(55);
|
||||
copy_block(op_store_double_F0_T1_T2_code, 14);
|
||||
inc_code_ptr(14);
|
||||
}
|
||||
#endif
|
||||
|
||||
@ -11134,16 +11039,11 @@ DEFINE_GEN(gen_op_store_double_F0_T1_im,void,(long param1))
|
||||
{
|
||||
static const uint8 op_store_double_F0_T1_im_code[] = {
|
||||
0x49, 0x8b, 0x04, 0x24, 0x44, 0x89, 0xe9, 0x48, 0x0f, 0xc8, 0x48, 0x8d,
|
||||
0x15, 0x00, 0x00, 0x00, 0x00,
|
||||
ADD_RDX_RCX,
|
||||
TRANS_RDX,
|
||||
0x48, 0x89, 0x02,
|
||||
0x15, 0x00, 0x00, 0x00, 0x00, 0x48, 0x89, 0x04, 0x11
|
||||
};
|
||||
copy_block(op_store_double_F0_T1_im_code, 63);
|
||||
*(uint32_t *)(code_ptr() + 47) = (uint32_t)(uintptr)gKernelData;
|
||||
*(uint32_t *)(code_ptr() + 56) = (uint32_t)(uintptr)gZeroPage;
|
||||
copy_block(op_store_double_F0_T1_im_code, 21);
|
||||
*(uint32_t *)(code_ptr() + 13) = (int32_t)((long)param1 - (long)(code_ptr() + 13 + 4)) + 0;
|
||||
inc_code_ptr(63);
|
||||
inc_code_ptr(21);
|
||||
}
|
||||
#endif
|
||||
|
||||
@ -11178,16 +11078,11 @@ DEFINE_GEN(gen_op_store_single_F0_T1_im,void,(long param1))
|
||||
0xc0, 0x09, 0xc1, 0xeb, 0x19, 0x48, 0x89, 0x54, 0x24, 0xf0, 0xf2, 0x0f,
|
||||
0x10, 0x44, 0x24, 0xf0, 0xf2, 0x0f, 0x5a, 0xc0, 0xf3, 0x0f, 0x11, 0x44,
|
||||
0x24, 0xfc, 0x8b, 0x4c, 0x24, 0xfc, 0x0f, 0xc9, 0x44, 0x89, 0xe8, 0x48,
|
||||
0x8d, 0x15, 0x00, 0x00, 0x00, 0x00,
|
||||
ADD_RAX_RDX,
|
||||
TRANS_RAX,
|
||||
0x89, 0x08,
|
||||
0x8d, 0x15, 0x00, 0x00, 0x00, 0x00, 0x89, 0x0c, 0x10
|
||||
};
|
||||
copy_block(op_store_single_F0_T1_im_code, 130);
|
||||
*(uint32_t *)(code_ptr() + 116) = (uint32_t)(uintptr)gKernelData;
|
||||
*(uint32_t *)(code_ptr() + 124) = (uint32_t)(uintptr)gZeroPage;
|
||||
copy_block(op_store_single_F0_T1_im_code, 93);
|
||||
*(uint32_t *)(code_ptr() + 86) = (int32_t)((long)param1 - (long)(code_ptr() + 86 + 4)) + 0;
|
||||
inc_code_ptr(130);
|
||||
inc_code_ptr(93);
|
||||
}
|
||||
#endif
|
||||
|
||||
|
11221
SheepShaver/src/Unix/dyngen_precompiled/ppc-dyngen-ops-x86_64_macos.hpp
Normal file
11221
SheepShaver/src/Unix/dyngen_precompiled/ppc-dyngen-ops-x86_64_macos.hpp
Normal file
File diff suppressed because it is too large
Load Diff
@ -1,5 +1,9 @@
|
||||
#if defined(__x86_64__)
|
||||
#ifdef __APPLE__
|
||||
#include "ppc-dyngen-ops-x86_64_macos.hpp"
|
||||
#else
|
||||
#include "ppc-dyngen-ops-x86_64.hpp"
|
||||
#endif
|
||||
#elif defined(__i386__)
|
||||
#include "ppc-dyngen-ops-x86_32.hpp"
|
||||
#else
|
||||
|
Loading…
x
Reference in New Issue
Block a user