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Add MMX instructions
This commit is contained in:
gbeauche
parent
8083bc1bd3
commit
736975460b
@ -1638,6 +1638,287 @@ enum {
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/* --- Media 64-bit instructions ------------------------------------------- */
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enum {
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X86_MMX_PABSB = 0x1c, // 2P
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X86_MMX_PABSW = 0x1d, // 2P
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X86_MMX_PABSD = 0x1e, // 2P
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X86_MMX_PACKSSWB = 0x63,
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X86_MMX_PACKSSDW = 0x6b,
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X86_MMX_PACKUSWB = 0x67,
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X86_MMX_PADDB = 0xfc,
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X86_MMX_PADDW = 0xfd,
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X86_MMX_PADDD = 0xfe,
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X86_MMX_PADDQ = 0xd4,
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X86_MMX_PADDSB = 0xec,
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X86_MMX_PADDSW = 0xed,
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X86_MMX_PADDUSB = 0xdc,
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X86_MMX_PADDUSW = 0xdd,
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X86_MMX_PAND = 0xdb,
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X86_MMX_PANDN = 0xdf,
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X86_MMX_PAVGB = 0xe0,
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X86_MMX_PAVGW = 0xe3,
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X86_MMX_PCMPEQB = 0x74,
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X86_MMX_PCMPEQW = 0x75,
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X86_MMX_PCMPEQD = 0x76,
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X86_MMX_PCMPGTB = 0x64,
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X86_MMX_PCMPGTW = 0x65,
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X86_MMX_PCMPGTD = 0x66,
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X86_MMX_PEXTRW = 0xc5, // 64, /r ib
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X86_MMX_PHADDW = 0x01, // 2P
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X86_MMX_PHADDD = 0x02, // 2P
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X86_MMX_PHADDSW = 0x03, // 2P
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X86_MMX_PHSUBW = 0x05, // 2P
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X86_MMX_PHSUBD = 0x06, // 2P
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X86_MMX_PHSUBSW = 0x07, // 2P
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X86_MMX_PINSRW = 0xc4, // 64, /r ib
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X86_MMX_PMADDUBSW = 0x04, // 2P
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X86_MMX_PMADDWD = 0xf5,
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X86_MMX_PMAXSW = 0xee,
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X86_MMX_PMAXUB = 0xde,
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X86_MMX_PMINSW = 0xea,
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X86_MMX_PMINUB = 0xda,
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X86_MMX_PMOVMSKB = 0xd7, // 64
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X86_MMX_PMULHRSW = 0x0b, // 2P
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X86_MMX_PMULHUW = 0xe4,
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X86_MMX_PMULHW = 0xe5,
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X86_MMX_PMULLW = 0xd5,
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X86_MMX_PMULUDQ = 0xf4,
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X86_MMX_POR = 0xeb,
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X86_MMX_PSADBW = 0xf6,
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X86_MMX_PSHUFB = 0x00, // 2P
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X86_MMX_PSHUFW = 0x70, // /r ib
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X86_MMX_PSIGNB = 0x08, // 2P
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X86_MMX_PSIGNW = 0x09, // 2P
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X86_MMX_PSIGND = 0x0a, // 2P
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X86_MMX_PSLLW = 0xf1,
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X86_MMX_PSLLWi = 0x71, // /6 ib
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X86_MMX_PSLLD = 0xf2,
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X86_MMX_PSLLDi = 0x72, // /6 ib
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X86_MMX_PSLLQ = 0xf3,
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X86_MMX_PSLLQi = 0x73, // /6 ib
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X86_MMX_PSRAW = 0xe1,
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X86_MMX_PSRAWi = 0x71, // /4 ib
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X86_MMX_PSRAD = 0xe2,
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X86_MMX_PSRADi = 0x72, // /4 ib
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X86_MMX_PSRLW = 0xd1,
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X86_MMX_PSRLWi = 0x71, // /2 ib
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X86_MMX_PSRLD = 0xd2,
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X86_MMX_PSRLDi = 0x72, // /2 ib
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X86_MMX_PSRLQ = 0xd3,
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X86_MMX_PSRLQi = 0x73, // /2 ib
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X86_MMX_PSUBB = 0xf8,
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X86_MMX_PSUBW = 0xf9,
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X86_MMX_PSUBD = 0xfa,
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X86_MMX_PSUBQ = 0xfb,
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X86_MMX_PSUBSB = 0xe8,
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X86_MMX_PSUBSW = 0xe9,
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X86_MMX_PSUBUSB = 0xd8,
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X86_MMX_PSUBUSW = 0xd9,
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X86_MMX_PUNPCKHBW = 0x68,
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X86_MMX_PUNPCKHWD = 0x69,
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X86_MMX_PUNPCKHDQ = 0x6a,
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X86_MMX_PUNPCKLBW = 0x60,
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X86_MMX_PUNPCKLWD = 0x61,
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X86_MMX_PUNPCKLDQ = 0x62,
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X86_MMX_PXOR = 0xef,
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};
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#define __MMXLrr(OP,RS,RSA,RD,RDA) (_REXLrr(RD, RS), _OO_Mrm (0x0f00|(OP) ,_b11,RDA(RD),RSA(RS) ))
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#define __MMXLmr(OP,MD,MB,MI,MS,RD,RDA) (_REXLmr(MB, MI, RD), _OO_r_X (0x0f00|(OP) ,RDA(RD) ,MD,MB,MI,MS ))
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#define __MMXLrm(OP,RS,RSA,MD,MB,MI,MS) (_REXLrm(RS, MB, MI), _OO_r_X (0x0f00|(OP) ,RSA(RS) ,MD,MB,MI,MS ))
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#define __MMXLirr(OP,IM,RS,RSA,RD,RDA) (_REXLrr(RD, RS), _OO_Mrm_B (0x0f00|(OP) ,_b11,RDA(RD),RSA(RS) ,_u8(IM)))
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#define __MMXLimr(OP,IM,MD,MB,MI,MS,RD,RDA) (_REXLmr(MB, MI, RS), _OO_r_X_B (0x0f00|(OP) ,RDA(RD) ,MD,MB,MI,MS ,_u8(IM)))
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#define __MMXQrr(OP,RS,RSA,RD,RDA) (_REXQrr(RD, RS), _OO_Mrm (0x0f00|(OP) ,_b11,RDA(RD),RSA(RS) ))
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#define __MMXQmr(OP,MD,MB,MI,MS,RD,RDA) (_REXQmr(MB, MI, RD), _OO_r_X (0x0f00|(OP) ,RDA(RD) ,MD,MB,MI,MS ))
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#define __MMXQrm(OP,RS,RSA,MD,MB,MI,MS) (_REXQrm(RS, MB, MI), _OO_r_X (0x0f00|(OP) ,RSA(RS) ,MD,MB,MI,MS ))
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#define __MMXQirr(OP,IM,RS,RSA,RD,RDA) (_REXQrr(RD, RS), _OO_Mrm_B (0x0f00|(OP) ,_b11,RDA(RD),RSA(RS) ,_u8(IM)))
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#define __MMXQimr(OP,IM,MD,MB,MI,MS,RD,RDA) (_REXQmr(MB, MI, RS), _OO_r_X_B (0x0f00|(OP) ,RDA(RD) ,MD,MB,MI,MS ,_u8(IM)))
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#define __MMX1Lrr(PX,OP,RS,RSA,RD,RDA) (_REXLrr(RD, RS), _B(0x0f),_OO_Mrm(((PX)<<8)|(OP) ,_b11,RDA(RD),RSA(RS) ))
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#define __MMX1Lmr(PX,OP,MD,MB,MI,MS,RD,RDA) (_REXLmr(MB, MI, RD), _B(0x0f),_OO_r_X(((PX)<<8)|(OP) ,RDA(RD) ,MD,MB,MI,MS ))
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#define __MMX1Lrm(PX,OP,RS,RSA,MD,MB,MI,MS) (_REXLrm(RS, MB, MI), _B(0x0f),_OO_r_X(((PX)<<8)|(OP) ,RSA(RS) ,MD,MB,MI,MS ))
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#define _MMXLrr(OP,RS,RD) __MMXLrr(OP,RS,_rM,RD,_rM)
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#define _MMXLmr(OP,MD,MB,MI,MS,RD) __MMXLmr(OP,MD,MB,MI,MS,RD,_rM)
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#define _MMXLrm(OP,RS,MD,MB,MI,MS) __MMXLrm(OP,RS,_rM,MD,MB,MI,MS)
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#define _MMXQrr(OP,RS,RD) __MMXQrr(OP,RS,_rM,RD,_rM)
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#define _MMXQmr(OP,MD,MB,MI,MS,RD) __MMXQmr(OP,MD,MB,MI,MS,RD,_rM)
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#define _MMXQrm(OP,RS,MD,MB,MI,MS) __MMXQrm(OP,RS,_rM,MD,MB,MI,MS)
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#define _2P_MMXLrr(OP,RS,RD) __MMX1Lrr(0x38, OP,RS,_rM,RD,_rM)
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#define _2P_MMXLmr(OP,MD,MB,MI,MS,RD) __MMX1Lmr(0x38, OP,MD,MB,MI,MS,RD,_rM)
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#define _2P_MMXLrm(OP,RS,MD,MB,MI,MS) __MMX1Lrm(0x38, OP,RS,_rM,MD,MB,MI,MS)
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#define MMX_MOVDMDrr(RS, RD) __MMXLrr(0x6e, RS,_r4, RD,_rM)
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#define MMX_MOVQMDrr(RS, RD) __MMXQrr(0x6e, RS,_r8, RD,_rM)
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#define MMX_MOVDMSrr(RS, RD) __MMXLrr(0x7e, RD,_r4, RS,_rM)
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#define MMX_MOVQMSrr(RS, RD) __MMXQrr(0x7e, RD,_r8, RS,_rM)
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#define MMX_MOVDmr(MD, MB, MI, MS, RD) _MMXLmr(0x6e, MD, MB, MI, MS, RD)
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#define MMX_MOVDrm(RS, MD, MB, MI, MS) _MMXLrm(0x7e, RS, MD, MB, MI, MS)
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#define MMX_MOVQrr(RS, RD) _MMXLrr(0x6f, RS, RD)
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#define MMX_MOVQmr(MD, MB, MI, MS, RD) _MMXLmr(0x6f, MD, MB, MI, MS, RD)
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#define MMX_MOVQrm(RS, MD, MB, MI, MS) _MMXLrm(0x7f, RS, MD, MB, MI, MS)
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// Original MMX instructions
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#define MMX_PACKSSWBrr(RS, RD) _MMXLrr(X86_MMX_PACKSSWB,RS,RD)
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#define MMX_PACKSSWBmr(MD,MB,MI,MS,RD) _MMXLmr(X86_MMX_PACKSSWB, MD, MB, MI, MS, RD)
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#define MMX_PACKSSDWrr(RS, RD) _MMXLrr(X86_MMX_PACKSSDW,RS,RD)
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#define MMX_PACKSSDWmr(MD,MB,MI,MS,RD) _MMXLmr(X86_MMX_PACKSSDW, MD, MB, MI, MS, RD)
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#define MMX_PACKUSWBrr(RS, RD) _MMXLrr(X86_MMX_PACKUSWB,RS,RD)
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#define MMX_PACKUSWBmr(MD,MB,MI,MS,RD) _MMXLmr(X86_MMX_PACKUSWB, MD, MB, MI, MS, RD)
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#define MMX_PADDBrr(RS, RD) _MMXLrr(X86_MMX_PADDB,RS,RD)
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#define MMX_PADDBmr(MD,MB,MI,MS,RD) _MMXLmr(X86_MMX_PADDB, MD, MB, MI, MS, RD)
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#define MMX_PADDWrr(RS, RD) _MMXLrr(X86_MMX_PADDW,RS,RD)
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#define MMX_PADDWmr(MD,MB,MI,MS,RD) _MMXLmr(X86_MMX_PADDW, MD, MB, MI, MS, RD)
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#define MMX_PADDDrr(RS, RD) _MMXLrr(X86_MMX_PADDD,RS,RD)
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#define MMX_PADDDmr(MD,MB,MI,MS,RD) _MMXLmr(X86_MMX_PADDD, MD, MB, MI, MS, RD)
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#define MMX_PADDQrr(RS, RD) _MMXLrr(X86_MMX_PADDQ,RS,RD)
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#define MMX_PADDQmr(MD,MB,MI,MS,RD) _MMXLmr(X86_MMX_PADDQ, MD, MB, MI, MS, RD)
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#define MMX_PADDSBrr(RS, RD) _MMXLrr(X86_MMX_PADDSB,RS,RD)
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#define MMX_PADDSBmr(MD,MB,MI,MS,RD) _MMXLmr(X86_MMX_PADDSB, MD, MB, MI, MS, RD)
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#define MMX_PADDSWrr(RS, RD) _MMXLrr(X86_MMX_PADDSW,RS,RD)
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#define MMX_PADDSWmr(MD,MB,MI,MS,RD) _MMXLmr(X86_MMX_PADDSW, MD, MB, MI, MS, RD)
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#define MMX_PADDUSBrr(RS, RD) _MMXLrr(X86_MMX_PADDUSB,RS,RD)
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#define MMX_PADDUSBmr(MD,MB,MI,MS,RD) _MMXLmr(X86_MMX_PADDUSB, MD, MB, MI, MS, RD)
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#define MMX_PADDUSWrr(RS, RD) _MMXLrr(X86_MMX_PADDUSW,RS,RD)
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#define MMX_PADDUSWmr(MD,MB,MI,MS,RD) _MMXLmr(X86_MMX_PADDUSW, MD, MB, MI, MS, RD)
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#define MMX_PANDrr(RS, RD) _MMXLrr(X86_MMX_PAND,RS,RD)
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#define MMX_PANDmr(MD,MB,MI,MS,RD) _MMXLmr(X86_MMX_PAND, MD, MB, MI, MS, RD)
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#define MMX_PANDNrr(RS, RD) _MMXLrr(X86_MMX_PANDN,RS,RD)
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#define MMX_PANDNmr(MD,MB,MI,MS,RD) _MMXLmr(X86_MMX_PANDN, MD, MB, MI, MS, RD)
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#define MMX_PAVGBrr(RS, RD) _MMXLrr(X86_MMX_PAVGB,RS,RD)
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#define MMX_PAVGBmr(MD,MB,MI,MS,RD) _MMXLmr(X86_MMX_PAVGB, MD, MB, MI, MS, RD)
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#define MMX_PAVGWrr(RS, RD) _MMXLrr(X86_MMX_PAVGW,RS,RD)
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#define MMX_PAVGWmr(MD,MB,MI,MS,RD) _MMXLmr(X86_MMX_PAVGW, MD, MB, MI, MS, RD)
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#define MMX_PCMPEQBrr(RS, RD) _MMXLrr(X86_MMX_PCMPEQB,RS,RD)
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#define MMX_PCMPEQBmr(MD,MB,MI,MS,RD) _MMXLmr(X86_MMX_PCMPEQB, MD, MB, MI, MS, RD)
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#define MMX_PCMPEQWrr(RS, RD) _MMXLrr(X86_MMX_PCMPEQW,RS,RD)
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#define MMX_PCMPEQWmr(MD,MB,MI,MS,RD) _MMXLmr(X86_MMX_PCMPEQW, MD, MB, MI, MS, RD)
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#define MMX_PCMPEQDrr(RS, RD) _MMXLrr(X86_MMX_PCMPEQD,RS,RD)
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#define MMX_PCMPEQDmr(MD,MB,MI,MS,RD) _MMXLmr(X86_MMX_PCMPEQD, MD, MB, MI, MS, RD)
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#define MMX_PCMPGTBrr(RS, RD) _MMXLrr(X86_MMX_PCMPGTB,RS,RD)
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#define MMX_PCMPGTBmr(MD,MB,MI,MS,RD) _MMXLmr(X86_MMX_PCMPGTB, MD, MB, MI, MS, RD)
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#define MMX_PCMPGTWrr(RS, RD) _MMXLrr(X86_MMX_PCMPGTW,RS,RD)
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#define MMX_PCMPGTWmr(MD,MB,MI,MS,RD) _MMXLmr(X86_MMX_PCMPGTW, MD, MB, MI, MS, RD)
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#define MMX_PCMPGTDrr(RS, RD) _MMXLrr(X86_MMX_PCMPGTD,RS,RD)
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#define MMX_PCMPGTDmr(MD,MB,MI,MS,RD) _MMXLmr(X86_MMX_PCMPGTD, MD, MB, MI, MS, RD)
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#define MMX_PMADDWDrr(RS, RD) _MMXLrr(X86_MMX_PMADDWD,RS,RD)
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#define MMX_PMADDWDmr(MD,MB,MI,MS,RD) _MMXLmr(X86_MMX_PMADDWD, MD, MB, MI, MS, RD)
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#define MMX_PMAXSWrr(RS, RD) _MMXLrr(X86_MMX_PMAXSW,RS,RD)
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#define MMX_PMAXSWmr(MD,MB,MI,MS,RD) _MMXLmr(X86_MMX_PMAXSW, MD, MB, MI, MS, RD)
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#define MMX_PMAXUBrr(RS, RD) _MMXLrr(X86_MMX_PMAXUB,RS,RD)
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#define MMX_PMAXUBmr(MD,MB,MI,MS,RD) _MMXLmr(X86_MMX_PMAXUB, MD, MB, MI, MS, RD)
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#define MMX_PMINSWrr(RS, RD) _MMXLrr(X86_MMX_PMINSW,RS,RD)
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#define MMX_PMINSWmr(MD,MB,MI,MS,RD) _MMXLmr(X86_MMX_PMINSW, MD, MB, MI, MS, RD)
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#define MMX_PMINUBrr(RS, RD) _MMXLrr(X86_MMX_PMINUB,RS,RD)
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#define MMX_PMINUBmr(MD,MB,MI,MS,RD) _MMXLmr(X86_MMX_PMINUB, MD, MB, MI, MS, RD)
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#define MMX_PMULHUWrr(RS, RD) _MMXLrr(X86_MMX_PMULHUW,RS,RD)
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#define MMX_PMULHUWmr(MD,MB,MI,MS,RD) _MMXLmr(X86_MMX_PMULHUW, MD, MB, MI, MS, RD)
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#define MMX_PMULHWrr(RS, RD) _MMXLrr(X86_MMX_PMULHW,RS,RD)
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#define MMX_PMULHWmr(MD,MB,MI,MS,RD) _MMXLmr(X86_MMX_PMULHW, MD, MB, MI, MS, RD)
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#define MMX_PMULLWrr(RS, RD) _MMXLrr(X86_MMX_PMULLW,RS,RD)
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#define MMX_PMULLWmr(MD,MB,MI,MS,RD) _MMXLmr(X86_MMX_PMULLW, MD, MB, MI, MS, RD)
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#define MMX_PMULUDQrr(RS, RD) _MMXLrr(X86_MMX_PMULUDQ,RS,RD)
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#define MMX_PMULUDQmr(MD,MB,MI,MS,RD) _MMXLmr(X86_MMX_PMULUDQ, MD, MB, MI, MS, RD)
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#define MMX_PORrr(RS, RD) _MMXLrr(X86_MMX_POR,RS,RD)
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#define MMX_PORmr(MD,MB,MI,MS,RD) _MMXLmr(X86_MMX_POR, MD, MB, MI, MS, RD)
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#define MMX_PSADBWrr(RS, RD) _MMXLrr(X86_MMX_PSADBW,RS,RD)
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#define MMX_PSADBWmr(MD,MB,MI,MS,RD) _MMXLmr(X86_MMX_PSADBW, MD, MB, MI, MS, RD)
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#define MMX_PSLLWir(IM, RD) __MMXLirr(X86_MMX_PSLLWi, IM, RD,_rM, _b110,_rN)
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#define MMX_PSLLWrr(RS, RD) _MMXLrr(X86_MMX_PSLLW,RS,RD)
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#define MMX_PSLLWmr(MD,MB,MI,MS,RD) _MMXLmr(X86_MMX_PSLLW, MD, MB, MI, MS, RD)
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#define MMX_PSLLDir(IM, RD) __MMXLirr(X86_MMX_PSLLDi, IM, RD,_rM, _b110,_rN)
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#define MMX_PSLLDrr(RS, RD) _MMXLrr(X86_MMX_PSLLD,RS,RD)
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#define MMX_PSLLDmr(MD,MB,MI,MS,RD) _MMXLmr(X86_MMX_PSLLD, MD, MB, MI, MS, RD)
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#define MMX_PSLLQir(IM, RD) __MMXLirr(X86_MMX_PSLLQi, IM, RD,_rM, _b110,_rN)
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#define MMX_PSLLQrr(RS, RD) _MMXLrr(X86_MMX_PSLLQ,RS,RD)
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#define MMX_PSLLQmr(MD,MB,MI,MS,RD) _MMXLmr(X86_MMX_PSLLQ, MD, MB, MI, MS, RD)
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#define MMX_PSRAWir(IM, RD) __MMXLirr(X86_MMX_PSRAWi, IM, RD,_rM, _b100,_rN)
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#define MMX_PSRAWrr(RS, RD) _MMXLrr(X86_MMX_PSRAW,RS,RD)
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#define MMX_PSRAWmr(MD,MB,MI,MS,RD) _MMXLmr(X86_MMX_PSRAW, MD, MB, MI, MS, RD)
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#define MMX_PSRADir(IM, RD) __MMXLirr(X86_MMX_PSRADi, IM, RD,_rM, _b100,_rN)
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#define MMX_PSRADrr(RS, RD) _MMXLrr(X86_MMX_PSRAD,RS,RD)
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#define MMX_PSRADmr(MD,MB,MI,MS,RD) _MMXLmr(X86_MMX_PSRAD, MD, MB, MI, MS, RD)
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#define MMX_PSRLWir(IM, RD) __MMXLirr(X86_MMX_PSRLWi, IM, RD,_rM, _b010,_rN)
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#define MMX_PSRLWrr(RS, RD) _MMXLrr(X86_MMX_PSRLW,RS,RD)
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#define MMX_PSRLWmr(MD,MB,MI,MS,RD) _MMXLmr(X86_MMX_PSRLW, MD, MB, MI, MS, RD)
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#define MMX_PSRLDir(IM, RD) __MMXLirr(X86_MMX_PSRLDi, IM, RD,_rM, _b010,_rN)
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#define MMX_PSRLDrr(RS, RD) _MMXLrr(X86_MMX_PSRLD,RS,RD)
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#define MMX_PSRLDmr(MD,MB,MI,MS,RD) _MMXLmr(X86_MMX_PSRLD, MD, MB, MI, MS, RD)
|
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#define MMX_PSRLQir(IM, RD) __MMXLirr(X86_MMX_PSRLQi, IM, RD,_rM, _b010,_rN)
|
||||
#define MMX_PSRLQrr(RS, RD) _MMXLrr(X86_MMX_PSRLQ,RS,RD)
|
||||
#define MMX_PSRLQmr(MD,MB,MI,MS,RD) _MMXLmr(X86_MMX_PSRLQ, MD, MB, MI, MS, RD)
|
||||
#define MMX_PSUBBrr(RS, RD) _MMXLrr(X86_MMX_PSUBB,RS,RD)
|
||||
#define MMX_PSUBBmr(MD,MB,MI,MS,RD) _MMXLmr(X86_MMX_PSUBB, MD, MB, MI, MS, RD)
|
||||
#define MMX_PSUBWrr(RS, RD) _MMXLrr(X86_MMX_PSUBW,RS,RD)
|
||||
#define MMX_PSUBWmr(MD,MB,MI,MS,RD) _MMXLmr(X86_MMX_PSUBW, MD, MB, MI, MS, RD)
|
||||
#define MMX_PSUBDrr(RS, RD) _MMXLrr(X86_MMX_PSUBD,RS,RD)
|
||||
#define MMX_PSUBDmr(MD,MB,MI,MS,RD) _MMXLmr(X86_MMX_PSUBD, MD, MB, MI, MS, RD)
|
||||
#define MMX_PSUBQrr(RS, RD) _MMXLrr(X86_MMX_PSUBQ,RS,RD)
|
||||
#define MMX_PSUBQmr(MD,MB,MI,MS,RD) _MMXLmr(X86_MMX_PSUBQ, MD, MB, MI, MS, RD)
|
||||
#define MMX_PSUBSBrr(RS, RD) _MMXLrr(X86_MMX_PSUBSB,RS,RD)
|
||||
#define MMX_PSUBSBmr(MD,MB,MI,MS,RD) _MMXLmr(X86_MMX_PSUBSB, MD, MB, MI, MS, RD)
|
||||
#define MMX_PSUBSWrr(RS, RD) _MMXLrr(X86_MMX_PSUBSW,RS,RD)
|
||||
#define MMX_PSUBSWmr(MD,MB,MI,MS,RD) _MMXLmr(X86_MMX_PSUBSW, MD, MB, MI, MS, RD)
|
||||
#define MMX_PSUBUSBrr(RS, RD) _MMXLrr(X86_MMX_PSUBUSB,RS,RD)
|
||||
#define MMX_PSUBUSBmr(MD,MB,MI,MS,RD) _MMXLmr(X86_MMX_PSUBUSB, MD, MB, MI, MS, RD)
|
||||
#define MMX_PSUBUSWrr(RS, RD) _MMXLrr(X86_MMX_PSUBUSW,RS,RD)
|
||||
#define MMX_PSUBUSWmr(MD,MB,MI,MS,RD) _MMXLmr(X86_MMX_PSUBUSW, MD, MB, MI, MS, RD)
|
||||
#define MMX_PUNPCKHBWrr(RS, RD) _MMXLrr(X86_MMX_PUNPCKHBW,RS,RD)
|
||||
#define MMX_PUNPCKHBWmr(MD,MB,MI,MS,RD) _MMXLmr(X86_MMX_PUNPCKHBW, MD, MB, MI, MS, RD)
|
||||
#define MMX_PUNPCKHWDrr(RS, RD) _MMXLrr(X86_MMX_PUNPCKHWD,RS,RD)
|
||||
#define MMX_PUNPCKHWDmr(MD,MB,MI,MS,RD) _MMXLmr(X86_MMX_PUNPCKHWD, MD, MB, MI, MS, RD)
|
||||
#define MMX_PUNPCKHDQrr(RS, RD) _MMXLrr(X86_MMX_PUNPCKHDQ,RS,RD)
|
||||
#define MMX_PUNPCKHDQmr(MD,MB,MI,MS,RD) _MMXLmr(X86_MMX_PUNPCKHDQ, MD, MB, MI, MS, RD)
|
||||
#define MMX_PUNPCKLBWrr(RS, RD) _MMXLrr(X86_MMX_PUNPCKLBW,RS,RD)
|
||||
#define MMX_PUNPCKLBWmr(MD,MB,MI,MS,RD) _MMXLmr(X86_MMX_PUNPCKLBW, MD, MB, MI, MS, RD)
|
||||
#define MMX_PUNPCKLWDrr(RS, RD) _MMXLrr(X86_MMX_PUNPCKLWD,RS,RD)
|
||||
#define MMX_PUNPCKLWDmr(MD,MB,MI,MS,RD) _MMXLmr(X86_MMX_PUNPCKLWD, MD, MB, MI, MS, RD)
|
||||
#define MMX_PUNPCKLDQrr(RS, RD) _MMXLrr(X86_MMX_PUNPCKLDQ,RS,RD)
|
||||
#define MMX_PUNPCKLDQmr(MD,MB,MI,MS,RD) _MMXLmr(X86_MMX_PUNPCKLDQ, MD, MB, MI, MS, RD)
|
||||
#define MMX_PXORrr(RS, RD) _MMXLrr(X86_MMX_PXOR,RS,RD)
|
||||
#define MMX_PXORmr(MD,MB,MI,MS,RD) _MMXLmr(X86_MMX_PXOR, MD, MB, MI, MS, RD)
|
||||
|
||||
#define MMX_PSHUFWirr(IM, RS, RD) __MMXLirr(X86_MMX_PSHUFW, IM, RS,_rM, RD,_rM)
|
||||
#define MMX_PSHUFWimr(IM, MD, MB, MI, MS, RD) __MMXLimr(X86_MMX_PSHUFW, IM, MD, MB, MI, MS, RD,_rM)
|
||||
#define MMX_PEXTRWLirr(IM, RS, RD) __MMXLirr(X86_MMX_PEXTRW, IM, RS,_rM, RD,_r4)
|
||||
#define MMX_PEXTRWQirr(IM, RS, RD) __MMXQirr(X86_MMX_PEXTRW, IM, RS,_rM, RD,_r8)
|
||||
#define MMX_PINSRWLirr(IM, RS, RD) __MMXLirr(X86_MMX_PINSRW, IM, RS,_r4, RD,_rM)
|
||||
#define MMX_PINSRWLimr(IM, MD, MB, MI, MS, RD) __MMXLimr(X86_MMX_PINSRW, IM, MD, MB, MI, MS, RD,_r4)
|
||||
#define MMX_PINSRWQirr(IM, RS, RD) __MMXQirr(X86_MMX_PINSRW, IM, RS,_r4, RD,_rM)
|
||||
#define MMX_PINSRWQimr(IM, MD, MB, MI, MS, RD) __MMXQimr(X86_MMX_PINSRW, IM, MD, MB, MI, MS, RD,_r8)
|
||||
|
||||
// Additionnal MMX instructions, brought by SSSE3 ISA
|
||||
#define MMX_PABSBrr(RS, RD) _2P_MMXLrr(X86_MMX_PABSB,RS,RD)
|
||||
#define MMX_PABSBmr(MD,MB,MI,MS,RD) _2P_MMXLmr(X86_MMX_PABSB, MD, MB, MI, MS, RD)
|
||||
#define MMX_PABSWrr(RS, RD) _2P_MMXLrr(X86_MMX_PABSW,RS,RD)
|
||||
#define MMX_PABSWmr(MD,MB,MI,MS,RD) _2P_MMXLmr(X86_MMX_PABSW, MD, MB, MI, MS, RD)
|
||||
#define MMX_PABSDrr(RS, RD) _2P_MMXLrr(X86_MMX_PABSD,RS,RD)
|
||||
#define MMX_PABSDmr(MD,MB,MI,MS,RD) _2P_MMXLmr(X86_MMX_PABSD, MD, MB, MI, MS, RD)
|
||||
#define MMX_PHADDWrr(RS, RD) _2P_MMXLrr(X86_MMX_PHADDW,RS,RD)
|
||||
#define MMX_PHADDWmr(MD,MB,MI,MS,RD) _2P_MMXLmr(X86_MMX_PHADDW, MD, MB, MI, MS, RD)
|
||||
#define MMX_PHADDDrr(RS, RD) _2P_MMXLrr(X86_MMX_PHADDD,RS,RD)
|
||||
#define MMX_PHADDDmr(MD,MB,MI,MS,RD) _2P_MMXLmr(X86_MMX_PHADDD, MD, MB, MI, MS, RD)
|
||||
#define MMX_PHADDSWrr(RS, RD) _2P_MMXLrr(X86_MMX_PHADDSW,RS,RD)
|
||||
#define MMX_PHADDSWmr(MD,MB,MI,MS,RD) _2P_MMXLmr(X86_MMX_PHADDSW, MD, MB, MI, MS, RD)
|
||||
#define MMX_PHSUBWrr(RS, RD) _2P_MMXLrr(X86_MMX_PHSUBW,RS,RD)
|
||||
#define MMX_PHSUBWmr(MD,MB,MI,MS,RD) _2P_MMXLmr(X86_MMX_PHSUBW, MD, MB, MI, MS, RD)
|
||||
#define MMX_PHSUBDrr(RS, RD) _2P_MMXLrr(X86_MMX_PHSUBD,RS,RD)
|
||||
#define MMX_PHSUBDmr(MD,MB,MI,MS,RD) _2P_MMXLmr(X86_MMX_PHSUBD, MD, MB, MI, MS, RD)
|
||||
#define MMX_PHSUBSWrr(RS, RD) _2P_MMXLrr(X86_MMX_PHSUBSW,RS,RD)
|
||||
#define MMX_PHSUBSWmr(MD,MB,MI,MS,RD) _2P_MMXLmr(X86_MMX_PHSUBSW, MD, MB, MI, MS, RD)
|
||||
#define MMX_PMADDUBSWrr(RS, RD) _2P_MMXLrr(X86_MMX_PMADDUBSW,RS,RD)
|
||||
#define MMX_PMADDUBSWmr(MD,MB,MI,MS,RD) _2P_MMXLmr(X86_MMX_PMADDUBSW, MD, MB, MI, MS, RD)
|
||||
#define MMX_PMULHRSWrr(RS, RD) _2P_MMXLrr(X86_MMX_PMULHRSW,RS,RD)
|
||||
#define MMX_PMULHRSWmr(MD,MB,MI,MS,RD) _2P_MMXLmr(X86_MMX_PMULHRSW, MD, MB, MI, MS, RD)
|
||||
#define MMX_PSHUFBrr(RS, RD) _2P_MMXLrr(X86_MMX_PSHUFB,RS,RD)
|
||||
#define MMX_PSHUFBmr(MD,MB,MI,MS,RD) _2P_MMXLmr(X86_MMX_PSHUFB, MD, MB, MI, MS, RD)
|
||||
#define MMX_PSIGNBrr(RS, RD) _2P_MMXLrr(X86_MMX_PSIGNB,RS,RD)
|
||||
#define MMX_PSIGNBmr(MD,MB,MI,MS,RD) _2P_MMXLmr(X86_MMX_PSIGNB, MD, MB, MI, MS, RD)
|
||||
#define MMX_PSIGNWrr(RS, RD) _2P_MMXLrr(X86_MMX_PSIGNW,RS,RD)
|
||||
#define MMX_PSIGNWmr(MD,MB,MI,MS,RD) _2P_MMXLmr(X86_MMX_PSIGNW, MD, MB, MI, MS, RD)
|
||||
#define MMX_PSIGNDrr(RS, RD) _2P_MMXLrr(X86_MMX_PSIGND,RS,RD)
|
||||
#define MMX_PSIGNDmr(MD,MB,MI,MS,RD) _2P_MMXLmr(X86_MMX_PSIGND, MD, MB, MI, MS, RD)
|
||||
|
||||
#define EMMS() _OO (0x0f77 )
|
||||
|
||||
|
||||
|
||||
@ -26,7 +26,7 @@
|
||||
***********************************************************************/
|
||||
|
||||
/*
|
||||
* STATUS: 21M variations covering unary register based operations,
|
||||
* STATUS: 26M variations covering unary register based operations,
|
||||
* reg/reg operations, imm/reg operations.
|
||||
*
|
||||
* TODO:
|
||||
@ -47,6 +47,7 @@
|
||||
static int verbose = 2;
|
||||
|
||||
#define TEST_INST_ALU 1
|
||||
#define TEST_INST_MMX 1
|
||||
#define TEST_INST_SSE 1
|
||||
#if TEST_INST_ALU
|
||||
#define TEST_INST_ALU_REG 1
|
||||
@ -55,6 +56,11 @@ static int verbose = 2;
|
||||
#define TEST_INST_ALU_IMM_REG 1
|
||||
#define TEST_INST_ALU_MEM_REG 1
|
||||
#endif
|
||||
#if TEST_INST_MMX
|
||||
#define TEST_INST_MMX_REG_REG 1
|
||||
#define TEST_INST_MMX_IMM_REG 1
|
||||
#define TEST_INST_MMX_MEM_REG 1
|
||||
#endif
|
||||
#if TEST_INST_SSE
|
||||
#define TEST_INST_SSE_REG 1
|
||||
#define TEST_INST_SSE_REG_REG 1
|
||||
@ -75,21 +81,24 @@ static int verbose = 2;
|
||||
#include "compiler/codegen_x86.h"
|
||||
|
||||
#if X86_TARGET_64BIT
|
||||
#define X86_MAX_REGS 16
|
||||
#define X86_MAX_ALU_REGS 16
|
||||
#define X86_MAX_SSE_REGS 16
|
||||
#else
|
||||
#define X86_MAX_REGS 8
|
||||
#define X86_MAX_ALU_REGS 8
|
||||
#define X86_MAX_SSE_REGS 8
|
||||
#endif
|
||||
#define X86_MAX_MMX_REGS 8
|
||||
|
||||
#define VALID_REG(r, b, n) (((unsigned)((r) - X86_##b)) < (n))
|
||||
#if X86_TARGET_64BIT
|
||||
#define VALID_REG8(r) (VALID_REG(r, AL, 16) || VALID_REG(r, AH, 4))
|
||||
#define VALID_REG64(r) VALID_REG(r, RAX, X86_MAX_REGS)
|
||||
#define VALID_REG64(r) VALID_REG(r, RAX, X86_MAX_ALU_REGS)
|
||||
#else
|
||||
#define VALID_REG8(r) (VALID_REG(r, AL, 4) || VALID_REG(r, AH, 4))
|
||||
#define VALID_REG64(r) (0)
|
||||
#endif
|
||||
#define VALID_REG16(r) VALID_REG(r, AX, X86_MAX_REGS)
|
||||
#define VALID_REG32(r) VALID_REG(r, EAX, X86_MAX_REGS)
|
||||
#define VALID_REG16(r) VALID_REG(r, AX, X86_MAX_ALU_REGS)
|
||||
#define VALID_REG32(r) VALID_REG(r, EAX, X86_MAX_ALU_REGS)
|
||||
|
||||
#define x86_emit_byte(B) emit_byte(B)
|
||||
#define x86_emit_word(W) emit_word(W)
|
||||
@ -746,7 +755,7 @@ static bool check_imm_reg(insn_t *ii, const char *name, uint32 v, int d, int mod
|
||||
return true;
|
||||
}
|
||||
|
||||
static bool check_mem_reg(insn_t *ii, const char *name, uint32 D, int B, int I, int S, int R)
|
||||
static bool check_mem_reg(insn_t *ii, const char *name, uint32 D, int B, int I, int S, int R, int Rpos = 1)
|
||||
{
|
||||
if (strcasecmp(ii->name, name) != 0) {
|
||||
fprintf(stderr, "ERROR: instruction mismatch, expected %s, got %s\n", name, ii->name);
|
||||
@ -758,8 +767,8 @@ static bool check_mem_reg(insn_t *ii, const char *name, uint32 D, int B, int I,
|
||||
return false;
|
||||
}
|
||||
|
||||
operand_t *mem = &ii->operands[0];
|
||||
operand_t *reg = &ii->operands[1];
|
||||
operand_t *mem = &ii->operands[Rpos ^ 1];
|
||||
operand_t *reg = &ii->operands[Rpos];
|
||||
|
||||
uint32 d = mem->disp;
|
||||
int b = mem->base;
|
||||
@ -795,6 +804,11 @@ static bool check_mem_reg(insn_t *ii, const char *name, uint32 D, int B, int I,
|
||||
return true;
|
||||
}
|
||||
|
||||
static inline bool check_reg_mem(insn_t *ii, const char *name, uint32 D, int B, int I, int S, int R)
|
||||
{
|
||||
return check_mem_reg(ii, name, D, B, I, S, R, 0);
|
||||
}
|
||||
|
||||
static void show_instruction(const char *buffer, const uint8 *bytes)
|
||||
{
|
||||
if (verbose > 1) {
|
||||
@ -834,7 +848,7 @@ int main(void)
|
||||
#if TEST_INST_ALU_REG
|
||||
printf("Testing reg forms\n");
|
||||
n_tests = n_failures = 0;
|
||||
for (int r = 0; r < X86_MAX_REGS; r++) {
|
||||
for (int r = 0; r < X86_MAX_ALU_REGS; r++) {
|
||||
set_target(block);
|
||||
uint8 *b = get_target();
|
||||
int i = 0;
|
||||
@ -926,8 +940,8 @@ int main(void)
|
||||
#if TEST_INST_ALU_REG_REG
|
||||
printf("Testing reg,reg forms\n");
|
||||
n_tests = n_failures = 0;
|
||||
for (int s = 0; s < X86_MAX_REGS; s++) {
|
||||
for (int d = 0; d < X86_MAX_REGS; d++) {
|
||||
for (int s = 0; s < X86_MAX_ALU_REGS; s++) {
|
||||
for (int d = 0; d < X86_MAX_ALU_REGS; d++) {
|
||||
set_target(block);
|
||||
uint8 *b = get_target();
|
||||
int i = 0;
|
||||
@ -1037,7 +1051,7 @@ int main(void)
|
||||
#if TEST_INST_ALU_CNT_REG
|
||||
printf("Testing cl,reg forms\n");
|
||||
n_tests = n_failures = 0;
|
||||
for (int d = 0; d < X86_MAX_REGS; d++) {
|
||||
for (int d = 0; d < X86_MAX_ALU_REGS; d++) {
|
||||
set_target(block);
|
||||
uint8 *b = get_target();
|
||||
int i = 0;
|
||||
@ -1115,7 +1129,7 @@ int main(void)
|
||||
n_tests = n_failures = 0;
|
||||
for (int j = 0; j < n_imm_tab_count; j++) {
|
||||
const uint32 value = imm_table[j];
|
||||
for (int d = 0; d < X86_MAX_REGS; d++) {
|
||||
for (int d = 0; d < X86_MAX_ALU_REGS; d++) {
|
||||
set_target(block);
|
||||
uint8 *b = get_target();
|
||||
int i = 0;
|
||||
@ -1233,14 +1247,14 @@ int main(void)
|
||||
n_tests = n_failures = 0;
|
||||
for (int d = 0; d < off_table_count; d++) {
|
||||
const uint32 D = off_table[d];
|
||||
for (int B = -1; B < X86_MAX_REGS; B++) {
|
||||
for (int I = -1; I < X86_MAX_REGS; I++) {
|
||||
for (int B = -1; B < X86_MAX_ALU_REGS; B++) {
|
||||
for (int I = -1; I < X86_MAX_ALU_REGS; I++) {
|
||||
if (I == X86_RSP)
|
||||
continue;
|
||||
for (int S = 1; S < 16; S *= 2) {
|
||||
if (I == -1 && S > 1)
|
||||
continue;
|
||||
for (int r = 0; r < X86_MAX_REGS; r++) {
|
||||
for (int r = 0; r < X86_MAX_ALU_REGS; r++) {
|
||||
set_target(block);
|
||||
uint8 *b = get_target();
|
||||
int i = 0;
|
||||
@ -1323,11 +1337,326 @@ int main(void)
|
||||
n_all_failures += n_failures;
|
||||
#endif
|
||||
|
||||
#if TEST_INST_MMX_REG_REG
|
||||
printf("Testing MMX reg,reg forms\n");
|
||||
n_tests = n_failures = 0;
|
||||
for (int s = 0; s < X86_MAX_MMX_REGS; s++) {
|
||||
for (int d = 0; d < X86_MAX_MMX_REGS; d++) {
|
||||
set_target(block);
|
||||
uint8 *b = get_target();
|
||||
int i = 0;
|
||||
#define GEN(INSN, GENOP) do { \
|
||||
insns[i++] = INSN; \
|
||||
MMX_##GENOP##rr(s, d); \
|
||||
} while (0)
|
||||
#define GEN64(INSN, GENOP) do { \
|
||||
if (X86_TARGET_64BIT) \
|
||||
GEN(INSN, GENOP); \
|
||||
} while (0)
|
||||
GEN("movq", MOVQ);
|
||||
GEN("packsswb", PACKSSWB);
|
||||
GEN("packssdw", PACKSSDW);
|
||||
GEN("packuswb", PACKUSWB);
|
||||
GEN("paddb", PADDB);
|
||||
GEN("paddw", PADDW);
|
||||
GEN("paddd", PADDD);
|
||||
GEN("paddq", PADDQ);
|
||||
GEN("paddsb", PADDSB);
|
||||
GEN("paddsw", PADDSW);
|
||||
GEN("paddusb", PADDUSB);
|
||||
GEN("paddusw", PADDUSW);
|
||||
GEN("pand", PAND);
|
||||
GEN("pandn", PANDN);
|
||||
GEN("pavgb", PAVGB);
|
||||
GEN("pavgw", PAVGW);
|
||||
GEN("pcmpeqb", PCMPEQB);
|
||||
GEN("pcmpeqw", PCMPEQW);
|
||||
GEN("pcmpeqd", PCMPEQD);
|
||||
GEN("pcmpgtb", PCMPGTB);
|
||||
GEN("pcmpgtw", PCMPGTW);
|
||||
GEN("pcmpgtd", PCMPGTD);
|
||||
GEN("pmaddwd", PMADDWD);
|
||||
GEN("pmaxsw", PMAXSW);
|
||||
GEN("pmaxub", PMAXUB);
|
||||
GEN("pminsw", PMINSW);
|
||||
GEN("pminub", PMINUB);
|
||||
GEN("pmulhuw", PMULHUW);
|
||||
GEN("pmulhw", PMULHW);
|
||||
GEN("pmullw", PMULLW);
|
||||
GEN("pmuludq", PMULUDQ);
|
||||
GEN("por", POR);
|
||||
GEN("psadbw", PSADBW);
|
||||
GEN("psllw", PSLLW);
|
||||
GEN("pslld", PSLLD);
|
||||
GEN("psllq", PSLLQ);
|
||||
GEN("psraw", PSRAW);
|
||||
GEN("psrad", PSRAD);
|
||||
GEN("psrlw", PSRLW);
|
||||
GEN("psrld", PSRLD);
|
||||
GEN("psrlq", PSRLQ);
|
||||
GEN("psubb", PSUBB);
|
||||
GEN("psubw", PSUBW);
|
||||
GEN("psubd", PSUBD);
|
||||
GEN("psubq", PSUBQ);
|
||||
GEN("psubsb", PSUBSB);
|
||||
GEN("psubsw", PSUBSW);
|
||||
GEN("psubusb", PSUBUSB);
|
||||
GEN("psubusw", PSUBUSW);
|
||||
GEN("punpckhbw", PUNPCKHBW);
|
||||
GEN("punpckhwd", PUNPCKHWD);
|
||||
GEN("punpckhdq", PUNPCKHDQ);
|
||||
GEN("punpcklbw", PUNPCKLBW);
|
||||
GEN("punpcklwd", PUNPCKLWD);
|
||||
GEN("punpckldq", PUNPCKLDQ);
|
||||
GEN("pxor", PXOR);
|
||||
GEN("pabsb", PABSB);
|
||||
GEN("pabsw", PABSW);
|
||||
GEN("pabsd", PABSD);
|
||||
GEN("phaddw", PHADDW);
|
||||
GEN("phaddd", PHADDD);
|
||||
GEN("phaddsw", PHADDSW);
|
||||
GEN("phsubw", PHSUBW);
|
||||
GEN("phsubd", PHSUBD);
|
||||
GEN("phsubsw", PHSUBSW);
|
||||
GEN("pmaddubsw", PMADDUBSW);
|
||||
GEN("pmulhrsw", PMULHRSW);
|
||||
GEN("pshufb", PSHUFB);
|
||||
GEN("psignb", PSIGNB);
|
||||
GEN("psignw", PSIGNW);
|
||||
GEN("psignd", PSIGND);
|
||||
#undef GEN64
|
||||
#undef GEN
|
||||
int last_insn = i;
|
||||
uint8 *e = get_target();
|
||||
|
||||
uint8 *p = b;
|
||||
i = 0;
|
||||
while (p < e) {
|
||||
int n = disass_x86(buffer, (uintptr)p);
|
||||
insn_t ii;
|
||||
parse_insn(&ii, buffer);
|
||||
|
||||
if (!check_reg_reg(&ii, insns[i], s, d)) {
|
||||
show_instruction(buffer, p);
|
||||
n_failures++;
|
||||
}
|
||||
|
||||
p += n;
|
||||
i += 1;
|
||||
n_tests++;
|
||||
}
|
||||
if (i != last_insn)
|
||||
abort();
|
||||
}
|
||||
}
|
||||
printf(" done %ld/%ld\n", n_tests - n_failures, n_tests);
|
||||
n_all_tests += n_tests;
|
||||
n_all_failures += n_failures;
|
||||
#endif
|
||||
|
||||
static const uint8 imm8_table[] = {
|
||||
0x00, 0x01, 0x02, 0x03,
|
||||
0x06, 0x07, 0x08, 0x09,
|
||||
0x0e, 0x0f, 0x10, 0x11,
|
||||
0x1e, 0x1f, 0x20, 0x21,
|
||||
0xfc, 0xfd, 0xfe, 0xff,
|
||||
};
|
||||
const int n_imm8_tab_count = sizeof(imm8_table)/sizeof(imm8_table[0]);
|
||||
|
||||
#if TEST_INST_MMX_IMM_REG
|
||||
printf("Testing imm,reg forms\n");
|
||||
n_tests = n_failures = 0;
|
||||
for (int j = 0; j < n_imm8_tab_count; j++) {
|
||||
const uint8 value = imm8_table[j];
|
||||
for (int d = 0; d < X86_MAX_MMX_REGS; d++) {
|
||||
set_target(block);
|
||||
uint8 *b = get_target();
|
||||
int i = 0;
|
||||
#define GEN(INSN, GENOP) do { \
|
||||
insns[i] = INSN; \
|
||||
modes[i] = 1; \
|
||||
i++; MMX_##GENOP##ir(value, d); \
|
||||
} while (0)
|
||||
GEN("psllw", PSLLW);
|
||||
GEN("pslld", PSLLD);
|
||||
GEN("psllq", PSLLQ);
|
||||
GEN("psraw", PSRAW);
|
||||
GEN("psrad", PSRAD);
|
||||
GEN("psrlw", PSRLW);
|
||||
GEN("psrld", PSRLD);
|
||||
GEN("psrlq", PSRLQ);
|
||||
#undef GEN
|
||||
int last_insn = i;
|
||||
uint8 *e = get_target();
|
||||
|
||||
uint8 *p = b;
|
||||
i = 0;
|
||||
while (p < e) {
|
||||
int n = disass_x86(buffer, (uintptr)p);
|
||||
insn_t ii;
|
||||
parse_insn(&ii, buffer);
|
||||
|
||||
if (!check_imm_reg(&ii, insns[i], value, d, modes[i])) {
|
||||
show_instruction(buffer, p);
|
||||
n_failures++;
|
||||
}
|
||||
|
||||
p += n;
|
||||
i += 1;
|
||||
n_tests++;
|
||||
}
|
||||
if (i != last_insn)
|
||||
abort();
|
||||
}
|
||||
}
|
||||
printf(" done %ld/%ld\n", n_tests - n_failures, n_tests);
|
||||
n_all_tests += n_tests;
|
||||
n_all_failures += n_failures;
|
||||
#endif
|
||||
|
||||
#if TEST_INST_MMX_MEM_REG
|
||||
printf("Testing MMX mem,reg forms\n");
|
||||
n_tests = n_failures = 0;
|
||||
for (int d = 0; d < off_table_count; d++) {
|
||||
const uint32 D = off_table[d];
|
||||
for (int B = -1; B < X86_MAX_ALU_REGS; B++) {
|
||||
for (int I = -1; I < X86_MAX_ALU_REGS; I++) {
|
||||
if (I == X86_RSP)
|
||||
continue;
|
||||
for (int S = 1; S < 16; S *= 2) {
|
||||
if (I == -1 && S > 1)
|
||||
continue;
|
||||
for (int r = 0; r < X86_MAX_MMX_REGS; r++) {
|
||||
set_target(block);
|
||||
uint8 *b = get_target();
|
||||
int i = 0;
|
||||
#define _GENrm(INSN, GENOP) do { \
|
||||
insns[i] = INSN; \
|
||||
modes[i] = 0; \
|
||||
i++; MMX_##GENOP##rm(r, D, B, I, S); \
|
||||
} while (0)
|
||||
#define _GENmr(INSN, GENOP) do { \
|
||||
insns[i] = INSN; \
|
||||
modes[i] = 1; \
|
||||
i++; MMX_##GENOP##mr(D, B, I, S, r); \
|
||||
} while (0)
|
||||
#define GEN(INSN, GENOP) do { \
|
||||
_GENmr(INSN, GENOP); \
|
||||
} while (0)
|
||||
_GENmr("movd", MOVD);
|
||||
_GENrm("movd", MOVD);
|
||||
_GENmr("movq", MOVQ);
|
||||
_GENrm("movq", MOVQ);
|
||||
GEN("packsswb", PACKSSWB);
|
||||
GEN("packssdw", PACKSSDW);
|
||||
GEN("packuswb", PACKUSWB);
|
||||
GEN("paddb", PADDB);
|
||||
GEN("paddw", PADDW);
|
||||
GEN("paddd", PADDD);
|
||||
GEN("paddq", PADDQ);
|
||||
GEN("paddsb", PADDSB);
|
||||
GEN("paddsw", PADDSW);
|
||||
GEN("paddusb", PADDUSB);
|
||||
GEN("paddusw", PADDUSW);
|
||||
GEN("pand", PAND);
|
||||
GEN("pandn", PANDN);
|
||||
GEN("pavgb", PAVGB);
|
||||
GEN("pavgw", PAVGW);
|
||||
GEN("pcmpeqb", PCMPEQB);
|
||||
GEN("pcmpeqw", PCMPEQW);
|
||||
GEN("pcmpeqd", PCMPEQD);
|
||||
GEN("pcmpgtb", PCMPGTB);
|
||||
GEN("pcmpgtw", PCMPGTW);
|
||||
GEN("pcmpgtd", PCMPGTD);
|
||||
GEN("pmaddwd", PMADDWD);
|
||||
GEN("pmaxsw", PMAXSW);
|
||||
GEN("pmaxub", PMAXUB);
|
||||
GEN("pminsw", PMINSW);
|
||||
GEN("pminub", PMINUB);
|
||||
GEN("pmulhuw", PMULHUW);
|
||||
GEN("pmulhw", PMULHW);
|
||||
GEN("pmullw", PMULLW);
|
||||
GEN("pmuludq", PMULUDQ);
|
||||
GEN("por", POR);
|
||||
GEN("psadbw", PSADBW);
|
||||
GEN("psllw", PSLLW);
|
||||
GEN("pslld", PSLLD);
|
||||
GEN("psllq", PSLLQ);
|
||||
GEN("psraw", PSRAW);
|
||||
GEN("psrad", PSRAD);
|
||||
GEN("psrlw", PSRLW);
|
||||
GEN("psrld", PSRLD);
|
||||
GEN("psrlq", PSRLQ);
|
||||
GEN("psubb", PSUBB);
|
||||
GEN("psubw", PSUBW);
|
||||
GEN("psubd", PSUBD);
|
||||
GEN("psubq", PSUBQ);
|
||||
GEN("psubsb", PSUBSB);
|
||||
GEN("psubsw", PSUBSW);
|
||||
GEN("psubusb", PSUBUSB);
|
||||
GEN("psubusw", PSUBUSW);
|
||||
GEN("punpckhbw", PUNPCKHBW);
|
||||
GEN("punpckhwd", PUNPCKHWD);
|
||||
GEN("punpckhdq", PUNPCKHDQ);
|
||||
GEN("punpcklbw", PUNPCKLBW);
|
||||
GEN("punpcklwd", PUNPCKLWD);
|
||||
GEN("punpckldq", PUNPCKLDQ);
|
||||
GEN("pxor", PXOR);
|
||||
GEN("pabsb", PABSB);
|
||||
GEN("pabsw", PABSW);
|
||||
GEN("pabsd", PABSD);
|
||||
GEN("phaddw", PHADDW);
|
||||
GEN("phaddd", PHADDD);
|
||||
GEN("phaddsw", PHADDSW);
|
||||
GEN("phsubw", PHSUBW);
|
||||
GEN("phsubd", PHSUBD);
|
||||
GEN("phsubsw", PHSUBSW);
|
||||
GEN("pmaddubsw", PMADDUBSW);
|
||||
GEN("pmulhrsw", PMULHRSW);
|
||||
GEN("pshufb", PSHUFB);
|
||||
GEN("psignb", PSIGNB);
|
||||
GEN("psignw", PSIGNW);
|
||||
GEN("psignd", PSIGND);
|
||||
#undef GEN
|
||||
#undef _GENmr
|
||||
#undef _GENrm
|
||||
int last_insn = i;
|
||||
uint8 *e = get_target();
|
||||
|
||||
uint8 *p = b;
|
||||
i = 0;
|
||||
while (p < e) {
|
||||
int n = disass_x86(buffer, (uintptr)p);
|
||||
insn_t ii;
|
||||
parse_insn(&ii, buffer);
|
||||
|
||||
if (!check_mem_reg(&ii, insns[i], D, B, I, S, r, modes[i])) {
|
||||
show_instruction(buffer, p);
|
||||
n_failures++;
|
||||
}
|
||||
|
||||
p += n;
|
||||
i += 1;
|
||||
n_tests++;
|
||||
show_status(n_tests);
|
||||
}
|
||||
if (i != last_insn)
|
||||
abort();
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
printf(" done %ld/%ld\n", n_tests - n_failures, n_tests);
|
||||
n_all_tests += n_tests;
|
||||
n_all_failures += n_failures;
|
||||
#endif
|
||||
|
||||
#if TEST_INST_SSE_REG_REG
|
||||
printf("Testing SSE reg,reg forms\n");
|
||||
n_tests = n_failures = 0;
|
||||
for (int s = 0; s < X86_MAX_REGS; s++) {
|
||||
for (int d = 0; d < X86_MAX_REGS; d++) {
|
||||
for (int s = 0; s < X86_MAX_SSE_REGS; s++) {
|
||||
for (int d = 0; d < X86_MAX_SSE_REGS; d++) {
|
||||
set_target(block);
|
||||
uint8 *b = get_target();
|
||||
int i = 0;
|
||||
@ -1465,14 +1794,14 @@ int main(void)
|
||||
n_tests = n_failures = 0;
|
||||
for (int d = 0; d < off_table_count; d++) {
|
||||
const uint32 D = off_table[d];
|
||||
for (int B = -1; B < X86_MAX_REGS; B++) {
|
||||
for (int I = -1; I < X86_MAX_REGS; I++) {
|
||||
for (int B = -1; B < X86_MAX_ALU_REGS; B++) {
|
||||
for (int I = -1; I < X86_MAX_ALU_REGS; I++) {
|
||||
if (I == X86_RSP)
|
||||
continue;
|
||||
for (int S = 1; S < 16; S *= 2) {
|
||||
if (I == -1 && S > 1)
|
||||
continue;
|
||||
for (int r = 0; r < X86_MAX_REGS; r++) {
|
||||
for (int r = 0; r < X86_MAX_SSE_REGS; r++) {
|
||||
set_target(block);
|
||||
uint8 *b = get_target();
|
||||
int i = 0;
|
||||
|
||||
Loading…
Reference in New Issue
Block a user