diff --git a/SheepShaver/src/Unix/dyngen_precompiled/ppc-execute-impl.cpp b/SheepShaver/src/Unix/dyngen_precompiled/ppc-execute-impl.cpp index 07706ac9..a01eb54c 100644 --- a/SheepShaver/src/Unix/dyngen_precompiled/ppc-execute-impl.cpp +++ b/SheepShaver/src/Unix/dyngen_precompiled/ppc-execute-impl.cpp @@ -57,6 +57,7 @@ template void powerpc_cpu::execute_fp_arith(uint32); template void powerpc_cpu::execute_fp_arith(uint32); template void powerpc_cpu::execute_fp_round(uint32); +template void powerpc_cpu::execute_fp_arith(uint32); template void powerpc_cpu::execute_fp_arith(uint32); template void powerpc_cpu::execute_fp_arith(uint32); template void powerpc_cpu::execute_fp_arith(uint32); @@ -258,7 +259,7 @@ template void powerpc_cpu::execute_vector_arith, operand_vD_V16QI, operand_vA_V16QI, operand_vB_V16QI, operand_vC_NONE, fake_bit_field< bool, false >, 0 >(uint32); template void powerpc_cpu::execute_vector_arith, operand_vD_V8HI, operand_vA_V8HI, operand_vB_V8HI, operand_vC_NONE, fake_bit_field< bool, false >, 0 >(uint32); template void powerpc_cpu::execute_vector_arith, operand_vD_V4SI, operand_vA_V4SI, operand_vB_V4SI, operand_vC_NONE, fake_bit_field< bool, false >, 0 >(uint32); -template void powerpc_cpu::execute_vector_arith, 0 >(uint32); +template void powerpc_cpu::execute_vector_arith, 0 >(uint32); template void powerpc_cpu::execute_vector_arith, 0 >(uint32); template void powerpc_cpu::execute_vector_shift<-1>(uint32); template void powerpc_cpu::execute_vector_arith, operand_vD_V16QI, operand_vA_V16QI, operand_vB_V16QI, operand_vC_NONE, fake_bit_field< bool, false >, 0 >(uint32); diff --git a/SheepShaver/src/kpx_cpu/src/cpu/ppc/ppc-decode.cpp b/SheepShaver/src/kpx_cpu/src/cpu/ppc/ppc-decode.cpp index 972f26ec..08916087 100644 --- a/SheepShaver/src/kpx_cpu/src/cpu/ppc/ppc-decode.cpp +++ b/SheepShaver/src/kpx_cpu/src/cpu/ppc/ppc-decode.cpp @@ -475,6 +475,11 @@ const powerpc_cpu::instr_info_t powerpc_cpu::powerpc_ii_table[] = { PPC_I(FRSP), X_form, 63, 12, CFLOW_NORMAL }, + { "frsqrte", + EXECUTE_FP_ARITH(double, frsqrte, RD, RB, NONE, NONE, RC_BIT_G, false), + PPC_I(FRSQRTE), + A_form, 63, 26, CFLOW_NORMAL + }, { "fsel", EXECUTE_FP_ARITH(double, fsel, RD, RA, RC, RB, RC_BIT_G, false), PPC_I(FSEL), @@ -1551,7 +1556,7 @@ const powerpc_cpu::instr_info_t powerpc_cpu::powerpc_ii_table[] = { VX_form, 4, 132, CFLOW_NORMAL }, { "vrsqrtefp", - EXECUTE_VECTOR_ARITH(frsqrt, V4SF, NONE, V4SF, NONE), + EXECUTE_VECTOR_ARITH(frsqrte, V4SF, NONE, V4SF, NONE), PPC_I(VRSQRTEFP), VX_form, 4, 330, CFLOW_NORMAL }, diff --git a/SheepShaver/src/kpx_cpu/src/cpu/ppc/ppc-dyngen-ops.cpp b/SheepShaver/src/kpx_cpu/src/cpu/ppc/ppc-dyngen-ops.cpp index 7f9e9f0b..41d57c54 100644 --- a/SheepShaver/src/kpx_cpu/src/cpu/ppc/ppc-dyngen-ops.cpp +++ b/SheepShaver/src/kpx_cpu/src/cpu/ppc/ppc-dyngen-ops.cpp @@ -481,6 +481,7 @@ DEFINE_OP(fmov_FD_F2, FD_dw = F2_dw); DEFINE_OP(fabs_FD_F0, FD = do_fabs(F0)); DEFINE_OP(fneg_FD_F0, FD = do_fneg(F0)); DEFINE_OP(fnabs_FD_F0, FD = do_fnabs(F0)); +DEFINE_OP(frsqrte_FD_F0, FD = do_frsqrte(F0)); DEFINE_OP(fadd_FD_F0_F1, FD = do_fadd(F0, F1)); DEFINE_OP(fsub_FD_F0_F1, FD = do_fsub(F0, F1)); diff --git a/SheepShaver/src/kpx_cpu/src/cpu/ppc/ppc-instructions.hpp b/SheepShaver/src/kpx_cpu/src/cpu/ppc/ppc-instructions.hpp index c42b61d1..b24042b3 100644 --- a/SheepShaver/src/kpx_cpu/src/cpu/ppc/ppc-instructions.hpp +++ b/SheepShaver/src/kpx_cpu/src/cpu/ppc/ppc-instructions.hpp @@ -100,6 +100,7 @@ enum powerpc_instruction { PPC_I(FNMSUB), PPC_I(FNMSUBS), PPC_I(FRSP), + PPC_I(FRSQRTE), PPC_I(FSEL), PPC_I(FSUB), PPC_I(FSUBS), diff --git a/SheepShaver/src/kpx_cpu/src/cpu/ppc/ppc-operations.hpp b/SheepShaver/src/kpx_cpu/src/cpu/ppc/ppc-operations.hpp index 47b56493..50719ffa 100644 --- a/SheepShaver/src/kpx_cpu/src/cpu/ppc/ppc-operations.hpp +++ b/SheepShaver/src/kpx_cpu/src/cpu/ppc/ppc-operations.hpp @@ -153,7 +153,7 @@ DEFINE_OP2(fsubs, float, x - y); DEFINE_OP1(exp2, float, exp2f(x)); DEFINE_OP1(log2, float, log2f(x)); DEFINE_OP1(fres, float, 1 / x); -DEFINE_OP1(frsqrt, float, 1 / sqrt(x)); +DEFINE_OP1(frsqrte, float, 1 / sqrt(x)); DEFINE_OP1(frsim, float, floorf(x)); DEFINE_OP1(frsin, float, roundf(x)); DEFINE_OP1(frsip, float, ceilf(x));