mirror of
https://github.com/kanjitalk755/macemu.git
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Windows specific sysdeps.h
This commit is contained in:
gbeauche
parent
87c8860b92
commit
7f7b2185c2
402
BasiliskII/src/Windows/sysdeps.h
Executable file
402
BasiliskII/src/Windows/sysdeps.h
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/*
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* sysdeps.h - System dependent definitions for Windows
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*
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* Basilisk II (C) 1997-2005 Christian Bauer
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#ifndef SYSDEPS_H
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#define SYSDEPS_H
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#ifndef __STDC__
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#error "Your compiler is not ANSI. Get a real one."
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#endif
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#include "config.h"
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#include "user_strings_windows.h"
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#ifndef STDC_HEADERS
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#error "You don't have ANSI C header files."
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#endif
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#ifndef WIN32
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#define WIN32
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#endif
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#include <assert.h>
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#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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#include <time.h>
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#ifdef __WIN32__
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#include <windows.h>
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#endif
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#include <sys/types.h>
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/* Mac and host address space are distinct */
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#ifndef REAL_ADDRESSING
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#define REAL_ADDRESSING 0
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#endif
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#if REAL_ADDRESSING
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#error "Real Addressing mode can't work without proper kernel support"
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#endif
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/* Using 68k emulator */
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#define EMULATED_68K 1
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/* The m68k emulator uses a prefetch buffer ? */
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#define USE_PREFETCH_BUFFER 0
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/* Mac ROM is write protected when banked memory is used */
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#if REAL_ADDRESSING || DIRECT_ADDRESSING
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# define ROM_IS_WRITE_PROTECTED 0
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# define USE_SCRATCHMEM_SUBTERFUGE 1
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#else
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# define ROM_IS_WRITE_PROTECTED 1
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#endif
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/* Direct Addressing requires Video on SEGV signals in plain X11 mode */
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#if DIRECT_ADDRESSING && (!ENABLE_VOSF && !USE_SDL_VIDEO)
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# undef ENABLE_VOSF
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# define ENABLE_VOSF 1
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#endif
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/* ExtFS is supported */
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#define SUPPORTS_EXTFS 1
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/* Data types */
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typedef unsigned char uint8;
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typedef signed char int8;
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#if SIZEOF_SHORT == 2
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typedef unsigned short uint16;
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typedef short int16;
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#elif SIZEOF_INT == 2
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typedef unsigned int uint16;
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typedef int int16;
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#else
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#error "No 2 byte type, you lose."
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#endif
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#if SIZEOF_INT == 4
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typedef unsigned int uint32;
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typedef int int32;
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#elif SIZEOF_LONG == 4
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typedef unsigned long uint32;
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typedef long int32;
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#else
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#error "No 4 byte type, you lose."
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#endif
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#if SIZEOF_LONG == 8
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typedef unsigned long uint64;
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typedef long int64;
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#define VAL64(a) (a ## l)
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#define UVAL64(a) (a ## ul)
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#elif SIZEOF_LONG_LONG == 8
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typedef unsigned long long uint64;
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typedef long long int64;
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#define VAL64(a) (a ## LL)
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#define UVAL64(a) (a ## uLL)
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#else
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#error "No 8 byte type, you lose."
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#endif
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#if SIZEOF_VOID_P == 4
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typedef uint32 uintptr;
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typedef int32 intptr;
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#elif SIZEOF_VOID_P == 8
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typedef uint64 uintptr;
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typedef int64 intptr;
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#else
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#error "Unsupported size of pointer"
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#endif
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#ifdef __WIN32__
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typedef int64 loff_t;
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#endif
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#ifndef HAVE_CADDR_T
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typedef char * caddr_t;
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#endif
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/* Time data type for Time Manager emulation */
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typedef int64 tm_time_t;
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/* Define codes for all the float formats that we know of.
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* Though we only handle IEEE format. */
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#define UNKNOWN_FLOAT_FORMAT 0
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#define IEEE_FLOAT_FORMAT 1
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#define VAX_FLOAT_FORMAT 2
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#define IBM_FLOAT_FORMAT 3
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#define C4X_FLOAT_FORMAT 4
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/* UAE CPU data types */
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#define uae_s8 int8
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#define uae_u8 uint8
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#define uae_s16 int16
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#define uae_u16 uint16
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#define uae_s32 int32
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#define uae_u32 uint32
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#define uae_s64 int64
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#define uae_u64 uint64
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typedef uae_u32 uaecptr;
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/* Alignment restrictions */
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#if defined(__i386__) || defined(__powerpc__) || defined(__m68k__) || defined(__x86_64__)
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# define CPU_CAN_ACCESS_UNALIGNED
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#endif
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/* Timing functions */
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extern void timer_init(void);
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extern uint64 GetTicks_usec(void);
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extern void Delay_usec(uint32 usec);
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/* Spinlocks */
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#ifdef __GNUC__
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#if defined(__powerpc__) || defined(__ppc__)
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#define HAVE_TEST_AND_SET 1
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static inline int testandset(volatile int *p)
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{
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int ret;
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__asm__ __volatile__("0: lwarx %0,0,%1\n"
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" xor. %0,%3,%0\n"
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" bne 1f\n"
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" stwcx. %2,0,%1\n"
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" bne- 0b\n"
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"1: "
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: "=&r" (ret)
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: "r" (p), "r" (1), "r" (0)
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: "cr0", "memory");
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return ret;
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}
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#endif
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#if defined(__i386__) || defined(__x86_64__)
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#define HAVE_TEST_AND_SET 1
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static inline int testandset(volatile int *p)
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{
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long int ret;
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/* Note: the "xchg" instruction does not need a "lock" prefix */
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__asm__ __volatile__("xchgl %k0, %1"
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: "=r" (ret), "=m" (*p)
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: "0" (1), "m" (*p)
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: "memory");
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return ret;
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}
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#endif
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#ifdef __alpha__
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#define HAVE_TEST_AND_SET 1
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static inline int testandset(volatile int *p)
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{
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int ret;
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unsigned long one;
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__asm__ __volatile__("0: mov 1,%2\n"
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" ldl_l %0,%1\n"
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" stl_c %2,%1\n"
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" beq %2,1f\n"
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".subsection 2\n"
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"1: br 0b\n"
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".previous"
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: "=r" (ret), "=m" (*p), "=r" (one)
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: "m" (*p));
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return ret;
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}
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#endif
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#endif /* __GNUC__ */
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typedef volatile int spinlock_t;
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static const spinlock_t SPIN_LOCK_UNLOCKED = 0;
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#if HAVE_TEST_AND_SET
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#define HAVE_SPINLOCKS 1
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static inline void spin_lock(spinlock_t *lock)
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{
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while (testandset(lock));
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}
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static inline void spin_unlock(spinlock_t *lock)
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{
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*lock = 0;
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}
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static inline int spin_trylock(spinlock_t *lock)
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{
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return !testandset(lock);
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}
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#else
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static inline void spin_lock(spinlock_t *lock)
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{
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}
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static inline void spin_unlock(spinlock_t *lock)
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{
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}
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static inline int spin_trylock(spinlock_t *lock)
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{
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return 1;
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}
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#endif
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/* UAE CPU defines */
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#ifdef WORDS_BIGENDIAN
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#ifdef CPU_CAN_ACCESS_UNALIGNED
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/* Big-endian CPUs which can do unaligned accesses */
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static inline uae_u32 do_get_mem_long(uae_u32 *a) {return *a;}
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static inline uae_u32 do_get_mem_word(uae_u16 *a) {return *a;}
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static inline void do_put_mem_long(uae_u32 *a, uae_u32 v) {*a = v;}
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static inline void do_put_mem_word(uae_u16 *a, uae_u32 v) {*a = v;}
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#else /* CPU_CAN_ACCESS_UNALIGNED */
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/* Big-endian CPUs which can not do unaligned accesses (this is not the most efficient way to do this...) */
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static inline uae_u32 do_get_mem_long(uae_u32 *a) {uint8 *b = (uint8 *)a; return (b[0] << 24) | (b[1] << 16) | (b[2] << 8) | b[3];}
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static inline uae_u32 do_get_mem_word(uae_u16 *a) {uint8 *b = (uint8 *)a; return (b[0] << 8) | b[1];}
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static inline void do_put_mem_long(uae_u32 *a, uae_u32 v) {uint8 *b = (uint8 *)a; b[0] = v >> 24; b[1] = v >> 16; b[2] = v >> 8; b[3] = v;}
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static inline void do_put_mem_word(uae_u16 *a, uae_u32 v) {uint8 *b = (uint8 *)a; b[0] = v >> 8; b[1] = v;}
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#endif /* CPU_CAN_ACCESS_UNALIGNED */
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#else /* WORDS_BIGENDIAN */
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#if defined(__i386__) || defined(__x86_64__)
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/* Intel x86 */
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#define X86_PPRO_OPT
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static inline uae_u32 do_get_mem_long(uae_u32 *a) {uint32 retval; __asm__ ("bswap %0" : "=r" (retval) : "0" (*a) : "cc"); return retval;}
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#ifdef X86_PPRO_OPT
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static inline uae_u32 do_get_mem_word(uae_u16 *a) {uint32 retval; __asm__ ("movzwl %w1,%k0\n\tshll $16,%k0\n\tbswapl %k0\n" : "=&r" (retval) : "m" (*a) : "cc"); return retval;}
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#else
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static inline uae_u32 do_get_mem_word(uae_u16 *a) {uint32 retval; __asm__ ("xorl %k0,%k0\n\tmovw %w1,%w0\n\trolw $8,%w0" : "=&r" (retval) : "m" (*a) : "cc"); return retval;}
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#endif
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#define HAVE_GET_WORD_UNSWAPPED
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#define do_get_mem_word_unswapped(a) ((uae_u32)*((uae_u16 *)(a)))
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static inline void do_put_mem_long(uae_u32 *a, uae_u32 v) {__asm__ ("bswap %0" : "=r" (v) : "0" (v) : "cc"); *a = v;}
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#ifdef X86_PPRO_OPT
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static inline void do_put_mem_word(uae_u16 *a, uae_u32 v) {__asm__ ("bswapl %0" : "=&r" (v) : "0" (v << 16) : "cc"); *a = v;}
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#else
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static inline void do_put_mem_word(uae_u16 *a, uae_u32 v) {__asm__ ("rolw $8,%0" : "=r" (v) : "0" (v) : "cc"); *a = v;}
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#endif
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#define HAVE_OPTIMIZED_BYTESWAP_32
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/* bswap doesn't affect condition codes */
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static inline uae_u32 do_byteswap_32_g(uae_u32 v) {__asm__ ("bswap %0" : "=r" (v) : "0" (v)); return v;}
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#define HAVE_OPTIMIZED_BYTESWAP_16
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#ifdef X86_PPRO_OPT
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static inline uae_u32 do_byteswap_16_g(uae_u32 v) {__asm__ ("bswapl %0" : "=&r" (v) : "0" (v << 16) : "cc"); return v;}
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#else
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static inline uae_u32 do_byteswap_16_g(uae_u32 v) {__asm__ ("rolw $8,%0" : "=r" (v) : "0" (v) : "cc"); return v;}
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#endif
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#elif defined(CPU_CAN_ACCESS_UNALIGNED)
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/* Other little-endian CPUs which can do unaligned accesses */
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static inline uae_u32 do_get_mem_long(uae_u32 *a) {uint32 x = *a; return (x >> 24) | (x >> 8) & 0xff00 | (x << 8) & 0xff0000 | (x << 24);}
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static inline uae_u32 do_get_mem_word(uae_u16 *a) {uint16 x = *a; return (x >> 8) | (x << 8);}
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static inline void do_put_mem_long(uae_u32 *a, uae_u32 v) {*a = (v >> 24) | (v >> 8) & 0xff00 | (v << 8) & 0xff0000 | (v << 24);}
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static inline void do_put_mem_word(uae_u16 *a, uae_u32 v) {*a = (v >> 8) | (v << 8);}
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#else /* CPU_CAN_ACCESS_UNALIGNED */
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/* Other little-endian CPUs which can not do unaligned accesses (this needs optimization) */
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static inline uae_u32 do_get_mem_long(uae_u32 *a) {uint8 *b = (uint8 *)a; return (b[0] << 24) | (b[1] << 16) | (b[2] << 8) | b[3];}
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static inline uae_u32 do_get_mem_word(uae_u16 *a) {uint8 *b = (uint8 *)a; return (b[0] << 8) | b[1];}
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static inline void do_put_mem_long(uae_u32 *a, uae_u32 v) {uint8 *b = (uint8 *)a; b[0] = v >> 24; b[1] = v >> 16; b[2] = v >> 8; b[3] = v;}
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static inline void do_put_mem_word(uae_u16 *a, uae_u32 v) {uint8 *b = (uint8 *)a; b[0] = v >> 8; b[1] = v;}
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#endif /* CPU_CAN_ACCESS_UNALIGNED */
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#endif /* WORDS_BIGENDIAN */
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#ifndef HAVE_OPTIMIZED_BYTESWAP_32
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static inline uae_u32 do_byteswap_32_g(uae_u32 v)
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{ return (((v >> 24) & 0xff) | ((v >> 8) & 0xff00) | ((v & 0xff) << 24) | ((v & 0xff00) << 8)); }
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#endif
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#ifndef HAVE_OPTIMIZED_BYTESWAP_16
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static inline uae_u32 do_byteswap_16_g(uae_u32 v)
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{ return (((v >> 8) & 0xff) | ((v & 0xff) << 8)); }
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#endif
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#define do_byteswap_16_c(x) \
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((((x) >> 8) & 0xff) | (((x) & 0xff) << 8))
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#define do_byteswap_32_c(x) \
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((((x) & 0xff000000) >> 24) | (((x) & 0x00ff0000) >> 8) | \
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(((x) & 0x0000ff00) << 8) | (((x) & 0x000000ff) << 24))
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#if defined(__GNUC__)
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#define do_byteswap_16(x) \
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(__extension__ \
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({ register uint16 __v, __x = (x); \
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if (__builtin_constant_p(__x)) \
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__v = do_byteswap_16_c(__x); \
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else \
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__v = do_byteswap_16_g(__x); \
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__v; }))
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#define do_byteswap_32(x) \
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(__extension__ \
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({ register uint32 __v, __x = (x); \
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if (__builtin_constant_p(__x)) \
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__v = do_byteswap_32_c(__x); \
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else \
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__v = do_byteswap_32_g(__x); \
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__v; }))
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#else
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#define do_byteswap_16(x) do_byteswap_16_g(x)
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#define do_byteswap_32(x) do_byteswap_32_g(x)
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#endif
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/* Byte-swapping routines */
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#if defined(__i386__) || defined(__x86_64__)
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#define ntohl(x) do_byteswap_32(x)
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#define ntohs(x) do_byteswap_16(x)
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#define htonl(x) do_byteswap_32(x)
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#define htons(x) do_byteswap_16(x)
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#endif
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#define do_get_mem_byte(a) ((uae_u32)*((uae_u8 *)(a)))
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#define do_put_mem_byte(a, v) (*(uae_u8 *)(a) = (v))
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#define call_mem_get_func(func, addr) ((*func)(addr))
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#define call_mem_put_func(func, addr, v) ((*func)(addr, v))
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#define __inline__ inline
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#define CPU_EMU_SIZE 0
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#undef NO_INLINE_MEMORY_ACCESS
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#undef MD_HAVE_MEM_1_FUNCS
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#define ENUMDECL typedef enum
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#define ENUMNAME(name) name
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#define write_log printf
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#define ATTRIBUTE_PACKED __attribute__((packed))
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#if defined(X86_ASSEMBLY) || defined(X86_64_ASSEMBLY)
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#define ASM_SYM_FOR_FUNC(a) __asm__(a)
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#else
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#define ASM_SYM_FOR_FUNC(a)
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#endif
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#ifndef REGPARAM
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# define REGPARAM
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#endif
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#define REGPARAM2
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#endif
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