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Optimize gen_mov_32_REG_im(0) case

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This commit is contained in:
gbeauche 2004-01-24 17:50:32 +00:00
parent 82808234fa
commit 9c6b42b014
2 changed files with 22 additions and 3 deletions
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3
SheepShaver/src/kpx_cpu/src/cpu/jit/basic-dyngen-ops.cpp
View File

@ -90,6 +90,9 @@ DEFINE_OP(mov_32_T1_A0, T1 = A0);
DEFINE_OP(mov_32_A0_im, A0 = PARAM1); DEFINE_OP(mov_32_A0_im, A0 = PARAM1);
DEFINE_OP(mov_32_A0_T0, A0 = T0); DEFINE_OP(mov_32_A0_T0, A0 = T0);
DEFINE_OP(mov_32_A0_T1, A0 = T1); DEFINE_OP(mov_32_A0_T1, A0 = T1);
DEFINE_OP(mov_32_T0_0, T0 = 0);
DEFINE_OP(mov_32_T1_0, T1 = 0);
DEFINE_OP(mov_32_A0_0, A0 = 0);
void OPPROTO op_mov_ad_A0_im(void) void OPPROTO op_mov_ad_A0_im(void)
{ {

22
SheepShaver/src/kpx_cpu/src/cpu/jit/basic-dyngen.hpp
View File

@ -96,13 +96,13 @@ public:
#define DEFINE_ALIAS(NAME, N) DEFINE_ALIAS_##N(NAME) #define DEFINE_ALIAS(NAME, N) DEFINE_ALIAS_##N(NAME)
// Register moves // Register moves
DEFINE_ALIAS(mov_32_T0_im,1); void gen_mov_32_T0_im(int32 value);
DEFINE_ALIAS(mov_32_T0_T1,0); DEFINE_ALIAS(mov_32_T0_T1,0);
DEFINE_ALIAS(mov_32_T0_A0,0); DEFINE_ALIAS(mov_32_T0_A0,0);
DEFINE_ALIAS(mov_32_T1_im,1); void gen_mov_32_T1_im(int32 value);
DEFINE_ALIAS(mov_32_T1_T0,0); DEFINE_ALIAS(mov_32_T1_T0,0);
DEFINE_ALIAS(mov_32_T1_A0,0); DEFINE_ALIAS(mov_32_T1_A0,0);
DEFINE_ALIAS(mov_32_A0_im,1); void gen_mov_32_A0_im(int32 value);
DEFINE_ALIAS(mov_32_A0_T0,0); DEFINE_ALIAS(mov_32_A0_T0,0);
DEFINE_ALIAS(mov_32_A0_T1,0); DEFINE_ALIAS(mov_32_A0_T1,0);
DEFINE_ALIAS(mov_ad_A0_im,1); DEFINE_ALIAS(mov_ad_A0_im,1);
@ -271,6 +271,22 @@ basic_dyngen::gen_end() const
return !full_translation_cache(); return !full_translation_cache();
} }
#define DEFINE_OP(REG) \
inline void \
basic_dyngen::gen_mov_32_##REG##_im(int32 value) \
{ \
if (value == 0) \
gen_op_mov_32_##REG##_0(); \
else \
gen_op_mov_32_##REG##_im(value); \
}
DEFINE_OP(T0);
DEFINE_OP(T1);
DEFINE_OP(A0);
#undef DEFINE_OP
#define DEFINE_OP(OP,REG) \ #define DEFINE_OP(OP,REG) \
inline void \ inline void \
basic_dyngen::gen_##OP##_32_##REG##_im(int32 value) \ basic_dyngen::gen_##OP##_32_##REG##_im(int32 value) \