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Fix IA-32 testandset(), make spinlock_t volatile int.
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@ -219,7 +219,7 @@ static inline uint64 tswap64(uint64 x) { return bswap_64(x); }
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#ifdef __powerpc__
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#define HAVE_TEST_AND_SET 1
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static inline int testandset(int *p)
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static inline int testandset(volatile int *p)
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{
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int ret;
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__asm__ __volatile__("0: lwarx %0,0,%1 ;"
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@ -237,14 +237,14 @@ static inline int testandset(int *p)
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#ifdef __i386__
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#define HAVE_TEST_AND_SET 1
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static inline int testandset(int *p)
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static inline int testandset(volatile int *p)
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{
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char ret;
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int ret;
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long int readval;
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__asm__ __volatile__("lock; cmpxchgl %3, %1; sete %0"
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: "=q" (ret), "=m" (*p), "=a" (readval)
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: "r" (1), "m" (*p), "a" (0)
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/* Note: the "xchg" instruction does not need a "lock" prefix */
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__asm__ __volatile__("xchgl %0, %1"
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: "=r" (ret), "=m" (*p), "=a" (readval)
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: "0" (1), "m" (*p)
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: "memory");
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return ret;
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}
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@ -252,7 +252,7 @@ static inline int testandset(int *p)
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#ifdef __s390__
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#define HAVE_TEST_AND_SET 1
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static inline int testandset(int *p)
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static inline int testandset(volatile int *p)
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{
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int ret;
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@ -267,7 +267,7 @@ static inline int testandset(int *p)
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#ifdef __alpha__
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#define HAVE_TEST_AND_SET 1
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static inline int testandset(int *p)
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static inline int testandset(volatile int *p)
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{
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int ret;
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unsigned long one;
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@ -287,7 +287,7 @@ static inline int testandset(int *p)
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#ifdef __sparc__
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#define HAVE_TEST_AND_SET 1
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static inline int testandset(int *p)
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static inline int testandset(volatile int *p)
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{
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int ret;
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@ -302,7 +302,7 @@ static inline int testandset(int *p)
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#ifdef __arm__
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#define HAVE_TEST_AND_SET 1
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static inline int testandset(int *p)
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static inline int testandset(volatile int *p)
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{
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register unsigned int ret;
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__asm__ __volatile__("swp %0, %1, [%2]"
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@ -317,7 +317,7 @@ static inline int testandset(int *p)
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#if HAVE_TEST_AND_SET
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#define HAVE_SPINLOCKS 1
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typedef int spinlock_t;
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typedef volatile int spinlock_t;
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static const spinlock_t SPIN_LOCK_UNLOCKED = 0;
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