Extend NativeOp count to 64 (6-bit value), aka fix NATIVE_FILLRECT opcpdes.

Translate NQD_{bitblt,fillrect,invrect} to direct native calls.
Use Mac2HostAddr() for converting Mac base address to native.
This commit is contained in:
gbeauche 2004-04-22 22:54:47 +00:00
parent 8b40a7e721
commit ba7bfc478e
3 changed files with 33 additions and 18 deletions

View File

@ -1696,7 +1696,7 @@ void NQD_invrect(uint32 p)
// And perform the inversion
const int bpp = bytes_per_pixel(ReadMacInt32(p + acclDestPixelSize));
const int dest_row_bytes = (int32)ReadMacInt32(p + acclDestRowBytes);
uint8 *dest = (uint8 *)(ReadMacInt32(p + acclDestBaseAddr) + (dest_Y * dest_row_bytes) + (dest_X * bpp));
uint8 *dest = Mac2HostAddr(ReadMacInt32(p + acclDestBaseAddr) + (dest_Y * dest_row_bytes) + (dest_X * bpp));
width *= bpp;
switch (bpp) {
case 1:
@ -1806,7 +1806,7 @@ void NQD_fillrect(uint32 p)
// And perform the fill
const int bpp = bytes_per_pixel(ReadMacInt32(p + acclDestPixelSize));
const int dest_row_bytes = (int32)ReadMacInt32(p + acclDestRowBytes);
uint8 *dest = (uint8 *)(ReadMacInt32(p + acclDestBaseAddr) + (dest_Y * dest_row_bytes) + (dest_X * bpp));
uint8 *dest = Mac2HostAddr(ReadMacInt32(p + acclDestBaseAddr) + (dest_Y * dest_row_bytes) + (dest_X * bpp));
width *= bpp;
switch (bpp) {
case 1:
@ -1874,8 +1874,8 @@ void NQD_bitblt(uint32 p)
if ((int32)ReadMacInt32(p + acclSrcRowBytes) > 0) {
const int src_row_bytes = (int32)ReadMacInt32(p + acclSrcRowBytes);
const int dst_row_bytes = (int32)ReadMacInt32(p + acclDestRowBytes);
uint8 *src = (uint8 *)ReadMacInt32(p + acclSrcBaseAddr) + (src_Y * src_row_bytes) + (src_X * bpp);
uint8 *dst = (uint8 *)ReadMacInt32(p + acclDestBaseAddr) + (dest_Y * dst_row_bytes) + (dest_X * bpp);
uint8 *src = Mac2HostAddr(ReadMacInt32(p + acclSrcBaseAddr) + (src_Y * src_row_bytes) + (src_X * bpp));
uint8 *dst = Mac2HostAddr(ReadMacInt32(p + acclDestBaseAddr) + (dest_Y * dst_row_bytes) + (dest_X * bpp));
for (int i = 0; i < height; i++) {
memcpy(dst, src, width);
src += src_row_bytes;
@ -1885,8 +1885,8 @@ void NQD_bitblt(uint32 p)
else {
const int src_row_bytes = -(int32)ReadMacInt32(p + acclSrcRowBytes);
const int dst_row_bytes = -(int32)ReadMacInt32(p + acclDestRowBytes);
uint8 *src = (uint8 *)ReadMacInt32(p + acclSrcBaseAddr) + ((src_Y + height - 1) * src_row_bytes) + (src_X * bpp);
uint8 *dst = (uint8 *)ReadMacInt32(p + acclDestBaseAddr) + ((dest_Y + height - 1) * dst_row_bytes) + (dest_X * bpp);
uint8 *src = Mac2HostAddr(ReadMacInt32(p + acclSrcBaseAddr) + ((src_Y + height - 1) * src_row_bytes) + (src_X * bpp));
uint8 *dst = Mac2HostAddr(ReadMacInt32(p + acclDestBaseAddr) + ((dest_Y + height - 1) * dst_row_bytes) + (dest_X * bpp));
for (int i = height - 1; i >= 0; i--) {
memcpy(dst, src, width);
src -= src_row_bytes;

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@ -225,14 +225,14 @@ void sheepshaver_cpu::init_decoder()
static void NativeOp(int selector);
/* NativeOp instruction format:
+------------+--------------------------+--+----------+------------+
+------------+-------------------------+--+-----------+------------+
| 6 | |FN| OP | 2 |
+------------+--------------------------+--+----------+------------+
0 5 |6 19 20 21 25 26 31
+------------+-------------------------+--+-----------+------------+
0 5 |6 18 19 20 25 26 31
*/
typedef bit_field< 20, 20 > FN_field;
typedef bit_field< 21, 25 > NATIVE_OP_field;
typedef bit_field< 19, 19 > FN_field;
typedef bit_field< 20, 25 > NATIVE_OP_field;
typedef bit_field< 26, 31 > EMUL_OP_field;
// Execute EMUL_OP routine
@ -362,6 +362,21 @@ bool sheepshaver_cpu::compile1(codegen_context_t & cg_context)
dg.gen_invoke_T0_T1_T2((void (*)(uint32, uint32, uint32))check_load_invoc);
compiled = true;
break;
case NATIVE_BITBLT:
dg.gen_load_T0_GPR(3);
dg.gen_invoke_T0((void (*)(uint32))NQD_bitblt);
compiled = true;
break;
case NATIVE_INVRECT:
dg.gen_load_T0_GPR(3);
dg.gen_invoke_T0((void (*)(uint32))NQD_invrect);
compiled = true;
break;
case NATIVE_FILLRECT:
dg.gen_load_T0_GPR(3);
dg.gen_invoke_T0((void (*)(uint32))NQD_fillrect);
compiled = true;
break;
}
if (FN_field::test(opcode)) {
if (compiled) {

View File

@ -37,14 +37,14 @@
/* NativeOp instruction format:
+------------+--------------------------+--+----------+------------+
+------------+-------------------------+--+-----------+------------+
| 6 | |FN| OP | 2 |
+------------+--------------------------+--+----------+------------+
0 5 |6 19 20 21 25 26 31
+------------+-------------------------+--+-----------+------------+
0 5 |6 18 19 20 25 26 31
*/
#define POWERPC_NATIVE_OP(LR, OP) \
(POWERPC_EMUL_OP | ((LR) << 11) | (((uint32)OP) << 6) | 2)
#define POWERPC_NATIVE_OP(FN, OP) \
(POWERPC_EMUL_OP | ((FN) << 12) | (((uint32)OP) << 6) | 2)
/*
* Return the fake PowerPC opcode to handle specified native code