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Make VSCR an uint32, don't bother splitting it into NJ, SAT values since

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the gain is almost nil and actually hurts performance in JIT mode.
This commit is contained in:
gbeauche 2006-07-17 06:46:56 +00:00
parent 53f79caf8c
commit c306dfc4fd
1 changed files with 8 additions and 27 deletions
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35
SheepShaver/src/kpx_cpu/src/cpu/ppc/ppc-registers.hpp
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@ -168,36 +168,17 @@ union powerpc_fpr {
class powerpc_vscr class powerpc_vscr
{ {
uint8 nj; uint32 vscr;
uint8 sat;
public: public:
powerpc_vscr(); powerpc_vscr() : vscr(0) { }
void set(uint32 v); void set(uint32 v) { vscr = v; }
uint32 get() const; uint32 get() const { return vscr; }
uint32 get_nj() const { return nj; } uint32 get_nj() const { return vscr & VSCR_NJ_field::mask(); }
void set_nj(int v) { nj = v; } void set_nj(bool v) { VSCR_NJ_field::insert(vscr, v); }
uint32 get_sat() const { return sat; } uint32 get_sat() const { return vscr & VSCR_SAT_field::mask(); }
void set_sat(int v) { sat = v; } void set_sat(bool v) { VSCR_SAT_field::insert(vscr, v); }
}; };
inline
powerpc_vscr::powerpc_vscr()
: nj(0), sat(0)
{ }
inline uint32
powerpc_vscr::get() const
{
return (nj << 16) | sat;
}
inline void
powerpc_vscr::set(uint32 v)
{
nj = VSCR_NJ_field::extract(v);
sat = VSCR_SAT_field::extract(v);
}
/** /**
* Vector register * Vector register