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https://github.com/kanjitalk755/macemu.git
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Emulate CMOV in the new code generator for processors that don't support
this intruction
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@ -462,7 +462,16 @@ LENDFUNC(READ,WRITE,2,raw_setcc_m,(MEMW d, IMM cc))
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LOWFUNC(READ,NONE,3,raw_cmov_l_rr,(RW4 d, R4 s, IMM cc))
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{
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CMOVLrr(cc, s, d);
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if (have_cmov)
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CMOVLrr(cc, s, d);
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else { /* replacement using branch and mov */
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#if defined(__x86_64__)
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write_log("x86-64 implementations are bound to have CMOV!\n");
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abort();
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#endif
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JCCSii(cc^1, 2);
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MOVLrr(s, d);
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}
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}
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LENDFUNC(READ,NONE,3,raw_cmov_l_rr,(RW4 d, R4 s, IMM cc))
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@ -620,13 +629,31 @@ LENDFUNC(NONE,READ,4,raw_mov_l_rm_indexed,(W4 d, IMM base, R4 index, IMM factor)
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LOWFUNC(NONE,READ,5,raw_cmov_l_rm_indexed,(W4 d, IMM base, R4 index, IMM factor, IMM cond))
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{
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CMOVLmr(cond, base, X86_NOREG, index, factor, d);
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if (have_cmov)
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CMOVLmr(cond, base, X86_NOREG, index, factor, d);
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else { /* replacement using branch and mov */
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#if defined(__x86_64__)
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write_log("x86-64 implementations are bound to have CMOV!\n");
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abort();
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#endif
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JCCSii(cond^1, 7);
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MOVLmr(base, X86_NOREG, index, factor, d);
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}
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}
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LENDFUNC(NONE,READ,5,raw_cmov_l_rm_indexed,(W4 d, IMM base, R4 index, IMM factor, IMM cond))
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LOWFUNC(NONE,READ,3,raw_cmov_l_rm,(W4 d, IMM mem, IMM cond))
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{
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CMOVLmr(cond, mem, X86_NOREG, X86_NOREG, 1, d);
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if (have_cmov)
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CMOVLmr(cond, mem, X86_NOREG, X86_NOREG, 1, d);
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else { /* replacement using branch and mov */
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#if defined(__x86_64__)
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write_log("x86-64 implementations are bound to have CMOV!\n");
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abort();
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#endif
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JCCSii(cond^1, 6);
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MOVLmr(mem, X86_NOREG, X86_NOREG, 1, d);
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}
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}
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LENDFUNC(NONE,READ,3,raw_cmov_l_rm,(W4 d, IMM mem, IMM cond))
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