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Emulate CMOV in the new code generator for processors that don't support

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This commit is contained in:
gbeauche 2003-03-19 17:05:02 +00:00
parent 06af072a40
commit ecab19aa4e
1 changed files with 30 additions and 3 deletions
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33
BasiliskII/src/uae_cpu/compiler/codegen_x86.cpp
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@ -462,7 +462,16 @@ LENDFUNC(READ,WRITE,2,raw_setcc_m,(MEMW d, IMM cc))
LOWFUNC(READ,NONE,3,raw_cmov_l_rr,(RW4 d, R4 s, IMM cc))
{
CMOVLrr(cc, s, d);
if (have_cmov)
CMOVLrr(cc, s, d);
else { /* replacement using branch and mov */
#if defined(__x86_64__)
write_log("x86-64 implementations are bound to have CMOV!\n");
abort();
#endif
JCCSii(cc^1, 2);
MOVLrr(s, d);
}
}
LENDFUNC(READ,NONE,3,raw_cmov_l_rr,(RW4 d, R4 s, IMM cc))
@ -620,13 +629,31 @@ LENDFUNC(NONE,READ,4,raw_mov_l_rm_indexed,(W4 d, IMM base, R4 index, IMM factor)
LOWFUNC(NONE,READ,5,raw_cmov_l_rm_indexed,(W4 d, IMM base, R4 index, IMM factor, IMM cond))
{
CMOVLmr(cond, base, X86_NOREG, index, factor, d);
if (have_cmov)
CMOVLmr(cond, base, X86_NOREG, index, factor, d);
else { /* replacement using branch and mov */
#if defined(__x86_64__)
write_log("x86-64 implementations are bound to have CMOV!\n");
abort();
#endif
JCCSii(cond^1, 7);
MOVLmr(base, X86_NOREG, index, factor, d);
}
}
LENDFUNC(NONE,READ,5,raw_cmov_l_rm_indexed,(W4 d, IMM base, R4 index, IMM factor, IMM cond))
LOWFUNC(NONE,READ,3,raw_cmov_l_rm,(W4 d, IMM mem, IMM cond))
{
CMOVLmr(cond, mem, X86_NOREG, X86_NOREG, 1, d);
if (have_cmov)
CMOVLmr(cond, mem, X86_NOREG, X86_NOREG, 1, d);
else { /* replacement using branch and mov */
#if defined(__x86_64__)
write_log("x86-64 implementations are bound to have CMOV!\n");
abort();
#endif
JCCSii(cond^1, 6);
MOVLmr(mem, X86_NOREG, X86_NOREG, 1, d);
}
}
LENDFUNC(NONE,READ,3,raw_cmov_l_rm,(W4 d, IMM mem, IMM cond))