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64-bit JIT

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This commit is contained in:
kanjitalk755 2017-11-22 11:27:42 +09:00
parent 164935017b
commit f170a527b2
5 changed files with 447 additions and 155 deletions
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62
SheepShaver/src/CrossPlatform/sigsegv.cpp
View File

@ -2606,6 +2606,18 @@ sigsegv_address_t sigsegv_get_fault_instruction_address(sigsegv_info_t *SIP)
return SIP->pc; return SIP->pc;
} }
extern uint8_t gZeroPage[0x3000], gKernelData[0x2000];
extern uint8_t *RAMBaseHost, *ROMEndHost;
inline static uint8_t *cnvAdr(uint32_t a) {
if (a < 0x3000) return &gZeroPage[a];
else if ((a & ~0x1fff) == 0x68ffe000 || (a & ~0x1fff) == 0x5fffe000) return &gKernelData[a & 0x1fff];
return (uint8_t *)(long)a;
}
inline static bool isValidAdr(uint8_t *a) {
return (a >= RAMBaseHost && a < ROMEndHost) || (a >= gZeroPage && a < &gZeroPage[0x3000]) || (a >= gKernelData && a < &gKernelData[0x2000]);
}
// This function handles the badaccess to memory. // This function handles the badaccess to memory.
// It is called from the signal handler or the exception handler. // It is called from the signal handler or the exception handler.
static bool handle_badaccess(SIGSEGV_FAULT_HANDLER_ARGLIST_1) static bool handle_badaccess(SIGSEGV_FAULT_HANDLER_ARGLIST_1)
@ -2620,6 +2632,56 @@ static bool handle_badaccess(SIGSEGV_FAULT_HANDLER_ARGLIST_1)
#endif #endif
sigsegv_info_t * const SIP = &SI; sigsegv_info_t * const SIP = &SI;
if (!SIP->has_thr_state)
mach_get_thread_state(SIP);
#if defined(__APPLE__) && defined(__x86_64__)
x86_thread_state64_t *ts = &SIP->thr_state;
uint8_t *rip = (uint8_t *)ts->__rip;
switch (rip[0]) {
case 0x48:
if (rip[1] == 0xc7 && rip[2] == 0) {
uint8_t *p = cnvAdr(ts->__rax);
if (isValidAdr(p)) *(uint64_t *)p = rip[3] | rip[4] << 8 | rip[5] << 16 | rip[6] << 24;
ts->__rip += 7;
mach_set_thread_state(SIP);
return true;
}
else if (rip[1] == 0xc7 && rip[2] == 0x40) {
uint8_t *p = cnvAdr(ts->__rax + (signed char)rip[3]);
if (isValidAdr(p)) *(uint64_t *)p = rip[4] | rip[5] << 8 | rip[6] << 16 | rip[7] << 24;
ts->__rip += 8;
mach_set_thread_state(SIP);
return true;
}
break;
case 0x89:
if (rip[1] == 2) {
uint8_t *p = cnvAdr(ts->__rdx);
if (isValidAdr(p)) *(uint32_t *)p = ts->__rax;
ts->__rip += 2;
mach_set_thread_state(SIP);
return true;
}
else if (rip[1] == 0x10) {
uint8_t *p = cnvAdr(ts->__rax);
if (isValidAdr(p)) *(uint32_t *)p = ts->__rdx;
ts->__rip += 2;
mach_set_thread_state(SIP);
return true;
}
break;
case 0x8b:
if (rip[1] == 0) {
uint8_t *p = cnvAdr(ts->__rax);
ts->__rax = isValidAdr(p) ? *(uint32_t *)p : 0;
ts->__rip += 2;
mach_set_thread_state(SIP);
return true;
}
break;
}
#endif
// Call user's handler and reinstall the global handler, if required // Call user's handler and reinstall the global handler, if required
switch (SIGSEGV_FAULT_HANDLER_INVOKE(SIP)) { switch (SIGSEGV_FAULT_HANDLER_INVOKE(SIP)) {
case SIGSEGV_RETURN_SUCCESS: case SIGSEGV_RETURN_SUCCESS:

300
SheepShaver/src/Unix/dyngen_precompiled/basic-dyngen-ops-x86_64.hpp
View File

@ -1,3 +1,30 @@
#define ADD_RAX_RCX 0x01,0xc8
#define ADD_RDX_RCX 0x01,0xca
#define ADD_RAX_RDX 0x01,0xd0
#define TRANS_RAX \
0x48,0x3D,0x00,0x30,0x00,0x00,\
0x72,0x16,\
0x48,0x3D,0x00,0xE0,0xFF,0x5F,\
0x72,0x14,\
0x48,0x25,0xFF,0x1F,0x00,0x00,\
0x48,0x05,0x00,0x00,0x00,0x00,\
0xEB,0x06,\
0x48,0x05,0x00,0x00,0x00,0x00
#define TRANS_RDX \
0x48,0x81,0xFA,0x00,0x30,0x00,0x00,\
0x72,0x19,\
0x48,0x81,0xFA,0x00,0xE0,0xFF,0x5F,\
0x72,0x17,\
0x48,0x81,0xE2,0xFF,0x1F,0x00,0x00,\
0x48,0x81,0xC2,0x00,0x00,0x00,0x00,\
0xEB,0x07,\
0x48,0x81,0xC2,0x00,0x00,0x00,0x00
#ifdef DYNGEN_IMPL
extern uint8 gZeroPage[0x3000], gKernelData[0x2000];
#endif
#ifndef DEFINE_CST #ifndef DEFINE_CST
#define DEFINE_CST(NAME, VALUE) #define DEFINE_CST(NAME, VALUE)
#endif #endif
@ -1324,10 +1351,14 @@ DEFINE_GEN(gen_op_load_u8_T0_T1_0,void,(void))
#define HAVE_gen_op_load_u8_T0_T1_0 #define HAVE_gen_op_load_u8_T0_T1_0
{ {
static const uint8 op_load_u8_T0_T1_0_code[] = { static const uint8 op_load_u8_T0_T1_0_code[] = {
0x44, 0x89, 0xe8, 0x44, 0x0f, 0xb6, 0x20 0x44, 0x89, 0xe8,
TRANS_RAX,
0x44, 0x0f, 0xb6, 0x20,
}; };
copy_block(op_load_u8_T0_T1_0_code, 7); copy_block(op_load_u8_T0_T1_0_code, 43);
inc_code_ptr(7); *(uint32_t *)(code_ptr() + 27) = (uint32_t)(uintptr)gKernelData;
*(uint32_t *)(code_ptr() + 35) = (uint32_t)(uintptr)gZeroPage;
inc_code_ptr(43);
} }
#endif #endif
@ -1336,10 +1367,14 @@ DEFINE_GEN(gen_op_store_8_T0_T1_0,void,(void))
#define HAVE_gen_op_store_8_T0_T1_0 #define HAVE_gen_op_store_8_T0_T1_0
{ {
static const uint8 op_store_8_T0_T1_0_code[] = { static const uint8 op_store_8_T0_T1_0_code[] = {
0x44, 0x89, 0xe8, 0x44, 0x88, 0x20 0x44, 0x89, 0xe8,
TRANS_RAX,
0x44, 0x88, 0x20,
}; };
copy_block(op_store_8_T0_T1_0_code, 6); copy_block(op_store_8_T0_T1_0_code, 42);
inc_code_ptr(6); *(uint32_t *)(code_ptr() + 27) = (uint32_t)(uintptr)gKernelData;
*(uint32_t *)(code_ptr() + 35) = (uint32_t)(uintptr)gZeroPage;
inc_code_ptr(42);
} }
#endif #endif
@ -1348,11 +1383,15 @@ DEFINE_GEN(gen_op_load_s16_T0_T1_0,void,(void))
#define HAVE_gen_op_load_s16_T0_T1_0 #define HAVE_gen_op_load_s16_T0_T1_0
{ {
static const uint8 op_load_s16_T0_T1_0_code[] = { static const uint8 op_load_s16_T0_T1_0_code[] = {
0x44, 0x89, 0xe8, 0x0f, 0xb7, 0x00, 0x66, 0xc1, 0xc0, 0x08, 0x44, 0x0f, 0x44, 0x89, 0xe8,
0xbf, 0xe0 TRANS_RAX,
0x0f, 0xb7, 0x00,
0x66, 0xc1, 0xc0, 0x08, 0x44, 0x0f, 0xbf, 0xe0,
}; };
copy_block(op_load_s16_T0_T1_0_code, 14); copy_block(op_load_s16_T0_T1_0_code, 50);
inc_code_ptr(14); *(uint32_t *)(code_ptr() + 27) = (uint32_t)(uintptr)gKernelData;
*(uint32_t *)(code_ptr() + 35) = (uint32_t)(uintptr)gZeroPage;
inc_code_ptr(50);
} }
#endif #endif
@ -1361,10 +1400,15 @@ DEFINE_GEN(gen_op_load_s32_T0_T1_0,void,(void))
#define HAVE_gen_op_load_s32_T0_T1_0 #define HAVE_gen_op_load_s32_T0_T1_0
{ {
static const uint8 op_load_s32_T0_T1_0_code[] = { static const uint8 op_load_s32_T0_T1_0_code[] = {
0x44, 0x89, 0xe8, 0x8b, 0x00, 0x41, 0x89, 0xc4, 0x41, 0x0f, 0xcc 0x44, 0x89, 0xe8,
TRANS_RAX,
0x8b, 0x00,
0x41, 0x89, 0xc4, 0x41, 0x0f, 0xcc,
}; };
copy_block(op_load_s32_T0_T1_0_code, 11); copy_block(op_load_s32_T0_T1_0_code, 47);
inc_code_ptr(11); *(uint32_t *)(code_ptr() + 27) = (uint32_t)(uintptr)gKernelData;
*(uint32_t *)(code_ptr() + 35) = (uint32_t)(uintptr)gZeroPage;
inc_code_ptr(47);
} }
#endif #endif
@ -1399,11 +1443,15 @@ DEFINE_GEN(gen_op_load_u16_T0_T1_0,void,(void))
#define HAVE_gen_op_load_u16_T0_T1_0 #define HAVE_gen_op_load_u16_T0_T1_0
{ {
static const uint8 op_load_u16_T0_T1_0_code[] = { static const uint8 op_load_u16_T0_T1_0_code[] = {
0x44, 0x89, 0xe8, 0x0f, 0xb7, 0x00, 0x66, 0xc1, 0xc0, 0x08, 0x44, 0x0f, 0x44, 0x89, 0xe8,
0xb7, 0xe0 TRANS_RAX,
0x0f, 0xb7, 0x00,
0x66, 0xc1, 0xc0, 0x08, 0x44, 0x0f, 0xb7, 0xe0,
}; };
copy_block(op_load_u16_T0_T1_0_code, 14); copy_block(op_load_u16_T0_T1_0_code, 50);
inc_code_ptr(14); *(uint32_t *)(code_ptr() + 27) = (uint32_t)(uintptr)gKernelData;
*(uint32_t *)(code_ptr() + 35) = (uint32_t)(uintptr)gZeroPage;
inc_code_ptr(50);
} }
#endif #endif
@ -1412,10 +1460,15 @@ DEFINE_GEN(gen_op_load_u32_T0_T1_0,void,(void))
#define HAVE_gen_op_load_u32_T0_T1_0 #define HAVE_gen_op_load_u32_T0_T1_0
{ {
static const uint8 op_load_u32_T0_T1_0_code[] = { static const uint8 op_load_u32_T0_T1_0_code[] = {
0x44, 0x89, 0xe8, 0x8b, 0x00, 0x41, 0x89, 0xc4, 0x41, 0x0f, 0xcc 0x44, 0x89, 0xe8,
TRANS_RAX,
0x8b, 0x00,
0x41, 0x89, 0xc4, 0x41, 0x0f, 0xcc,
}; };
copy_block(op_load_u32_T0_T1_0_code, 11); copy_block(op_load_u32_T0_T1_0_code, 47);
inc_code_ptr(11); *(uint32_t *)(code_ptr() + 27) = (uint32_t)(uintptr)gKernelData;
*(uint32_t *)(code_ptr() + 35) = (uint32_t)(uintptr)gZeroPage;
inc_code_ptr(47);
} }
#endif #endif
@ -1424,10 +1477,14 @@ DEFINE_GEN(gen_op_load_u8_T0_T1_T2,void,(void))
#define HAVE_gen_op_load_u8_T0_T1_T2 #define HAVE_gen_op_load_u8_T0_T1_T2
{ {
static const uint8 op_load_u8_T0_T1_T2_code[] = { static const uint8 op_load_u8_T0_T1_T2_code[] = {
0x43, 0x8d, 0x04, 0x2e, 0x44, 0x0f, 0xb6, 0x20 0x43, 0x8d, 0x04, 0x2e,
TRANS_RAX,
0x44, 0x0f, 0xb6, 0x20,
}; };
copy_block(op_load_u8_T0_T1_T2_code, 8); copy_block(op_load_u8_T0_T1_T2_code, 44);
inc_code_ptr(8); *(uint32_t *)(code_ptr() + 28) = (uint32_t)(uintptr)gKernelData;
*(uint32_t *)(code_ptr() + 36) = (uint32_t)(uintptr)gZeroPage;
inc_code_ptr(44);
} }
#endif #endif
@ -1436,12 +1493,16 @@ DEFINE_GEN(gen_op_load_u8_T0_T1_im,void,(long param1))
#define HAVE_gen_op_load_u8_T0_T1_im #define HAVE_gen_op_load_u8_T0_T1_im
{ {
static const uint8 op_load_u8_T0_T1_im_code[] = { static const uint8 op_load_u8_T0_T1_im_code[] = {
0x44, 0x89, 0xea, 0x48, 0x8d, 0x05, 0x00, 0x00, 0x00, 0x00, 0x44, 0x0f, 0x44, 0x89, 0xea, 0x48, 0x8d, 0x05, 0x00, 0x00, 0x00, 0x00,
0xb6, 0x24, 0x02 ADD_RAX_RDX,
TRANS_RAX,
0x44, 0x0f, 0xb6, 0x20,
}; };
copy_block(op_load_u8_T0_T1_im_code, 15); copy_block(op_load_u8_T0_T1_im_code, 52);
*(uint32_t *)(code_ptr() + 36) = (uint32_t)(uintptr)gKernelData;
*(uint32_t *)(code_ptr() + 44) = (uint32_t)(uintptr)gZeroPage;
*(uint32_t *)(code_ptr() + 6) = (int32_t)((long)param1 - (long)(code_ptr() + 6 + 4)) + 0; *(uint32_t *)(code_ptr() + 6) = (int32_t)((long)param1 - (long)(code_ptr() + 6 + 4)) + 0;
inc_code_ptr(15); inc_code_ptr(52);
} }
#endif #endif
@ -1450,11 +1511,14 @@ DEFINE_GEN(gen_op_store_16_T0_T1_0,void,(void))
#define HAVE_gen_op_store_16_T0_T1_0 #define HAVE_gen_op_store_16_T0_T1_0
{ {
static const uint8 op_store_16_T0_T1_0_code[] = { static const uint8 op_store_16_T0_T1_0_code[] = {
0x44, 0x89, 0xea, 0x44, 0x89, 0xe0, 0x66, 0xc1, 0xc0, 0x08, 0x66, 0x89, 0x44, 0x89, 0xea, 0x44, 0x89, 0xe0, 0x66, 0xc1, 0xc0, 0x08,
0x02 TRANS_RDX,
0x66, 0x89, 0x02,
}; };
copy_block(op_store_16_T0_T1_0_code, 13); copy_block(op_store_16_T0_T1_0_code, 54);
inc_code_ptr(13); *(uint32_t *)(code_ptr() + 38) = (uint32_t)(uintptr)gKernelData;
*(uint32_t *)(code_ptr() + 47) = (uint32_t)(uintptr)gZeroPage;
inc_code_ptr(54);
} }
#endif #endif
@ -1463,10 +1527,14 @@ DEFINE_GEN(gen_op_store_32_T0_T1_0,void,(void))
#define HAVE_gen_op_store_32_T0_T1_0 #define HAVE_gen_op_store_32_T0_T1_0
{ {
static const uint8 op_store_32_T0_T1_0_code[] = { static const uint8 op_store_32_T0_T1_0_code[] = {
0x44, 0x89, 0xe2, 0x0f, 0xca, 0x44, 0x89, 0xe8, 0x89, 0x10 0x44, 0x89, 0xe2, 0x0f, 0xca, 0x44, 0x89, 0xe8,
TRANS_RAX,
0x89, 0x10,
}; };
copy_block(op_store_32_T0_T1_0_code, 10); copy_block(op_store_32_T0_T1_0_code, 46);
inc_code_ptr(10); *(uint32_t *)(code_ptr() + 32) = (uint32_t)(uintptr)gKernelData;
*(uint32_t *)(code_ptr() + 40) = (uint32_t)(uintptr)gZeroPage;
inc_code_ptr(46);
} }
#endif #endif
@ -1475,10 +1543,14 @@ DEFINE_GEN(gen_op_store_8_T0_T1_T2,void,(void))
#define HAVE_gen_op_store_8_T0_T1_T2 #define HAVE_gen_op_store_8_T0_T1_T2
{ {
static const uint8 op_store_8_T0_T1_T2_code[] = { static const uint8 op_store_8_T0_T1_T2_code[] = {
0x43, 0x8d, 0x04, 0x2e, 0x44, 0x88, 0x20 0x43, 0x8d, 0x04, 0x2e,
TRANS_RAX,
0x44, 0x88, 0x20,
}; };
copy_block(op_store_8_T0_T1_T2_code, 7); copy_block(op_store_8_T0_T1_T2_code, 43);
inc_code_ptr(7); *(uint32_t *)(code_ptr() + 28) = (uint32_t)(uintptr)gKernelData;
*(uint32_t *)(code_ptr() + 36) = (uint32_t)(uintptr)gZeroPage;
inc_code_ptr(43);
} }
#endif #endif
@ -1487,12 +1559,16 @@ DEFINE_GEN(gen_op_store_8_T0_T1_im,void,(long param1))
#define HAVE_gen_op_store_8_T0_T1_im #define HAVE_gen_op_store_8_T0_T1_im
{ {
static const uint8 op_store_8_T0_T1_im_code[] = { static const uint8 op_store_8_T0_T1_im_code[] = {
0x44, 0x89, 0xea, 0x48, 0x8d, 0x05, 0x00, 0x00, 0x00, 0x00, 0x44, 0x88, 0x44, 0x89, 0xea, 0x48, 0x8d, 0x05, 0x00, 0x00, 0x00, 0x00,
0x24, 0x02 ADD_RAX_RDX,
TRANS_RAX,
0x44, 0x88, 0x20,
}; };
copy_block(op_store_8_T0_T1_im_code, 14); copy_block(op_store_8_T0_T1_im_code, 51);
*(uint32_t *)(code_ptr() + 36) = (uint32_t)(uintptr)gKernelData;
*(uint32_t *)(code_ptr() + 44) = (uint32_t)(uintptr)gZeroPage;
*(uint32_t *)(code_ptr() + 6) = (int32_t)((long)param1 - (long)(code_ptr() + 6 + 4)) + 0; *(uint32_t *)(code_ptr() + 6) = (int32_t)((long)param1 - (long)(code_ptr() + 6 + 4)) + 0;
inc_code_ptr(14); inc_code_ptr(51);
} }
#endif #endif
@ -1501,11 +1577,15 @@ DEFINE_GEN(gen_op_load_s16_T0_T1_T2,void,(void))
#define HAVE_gen_op_load_s16_T0_T1_T2 #define HAVE_gen_op_load_s16_T0_T1_T2
{ {
static const uint8 op_load_s16_T0_T1_T2_code[] = { static const uint8 op_load_s16_T0_T1_T2_code[] = {
0x43, 0x8d, 0x04, 0x2e, 0x0f, 0xb7, 0x00, 0x66, 0xc1, 0xc0, 0x08, 0x44, 0x43, 0x8d, 0x04, 0x2e,
0x0f, 0xbf, 0xe0 TRANS_RAX,
0x0f, 0xb7, 0x00,
0x66, 0xc1, 0xc0, 0x08, 0x44, 0x0f, 0xbf, 0xe0,
}; };
copy_block(op_load_s16_T0_T1_T2_code, 15); copy_block(op_load_s16_T0_T1_T2_code, 51);
inc_code_ptr(15); *(uint32_t *)(code_ptr() + 28) = (uint32_t)(uintptr)gKernelData;
*(uint32_t *)(code_ptr() + 36) = (uint32_t)(uintptr)gZeroPage;
inc_code_ptr(51);
} }
#endif #endif
@ -1514,12 +1594,17 @@ DEFINE_GEN(gen_op_load_s16_T0_T1_im,void,(long param1))
#define HAVE_gen_op_load_s16_T0_T1_im #define HAVE_gen_op_load_s16_T0_T1_im
{ {
static const uint8 op_load_s16_T0_T1_im_code[] = { static const uint8 op_load_s16_T0_T1_im_code[] = {
0x44, 0x89, 0xea, 0x48, 0x8d, 0x05, 0x00, 0x00, 0x00, 0x00, 0x0f, 0xb7, 0x44, 0x89, 0xea, 0x48, 0x8d, 0x05, 0x00, 0x00, 0x00, 0x00,
0x04, 0x02, 0x66, 0xc1, 0xc0, 0x08, 0x44, 0x0f, 0xbf, 0xe0 ADD_RAX_RDX,
TRANS_RAX,
0x0f, 0xb7, 0x00,
0x66, 0xc1, 0xc0, 0x08, 0x44, 0x0f, 0xbf, 0xe0,
}; };
copy_block(op_load_s16_T0_T1_im_code, 22); copy_block(op_load_s16_T0_T1_im_code, 59);
*(uint32_t *)(code_ptr() + 36) = (uint32_t)(uintptr)gKernelData;
*(uint32_t *)(code_ptr() + 44) = (uint32_t)(uintptr)gZeroPage;
*(uint32_t *)(code_ptr() + 6) = (int32_t)((long)param1 - (long)(code_ptr() + 6 + 4)) + 0; *(uint32_t *)(code_ptr() + 6) = (int32_t)((long)param1 - (long)(code_ptr() + 6 + 4)) + 0;
inc_code_ptr(22); inc_code_ptr(59);
} }
#endif #endif
@ -1528,10 +1613,15 @@ DEFINE_GEN(gen_op_load_s32_T0_T1_T2,void,(void))
#define HAVE_gen_op_load_s32_T0_T1_T2 #define HAVE_gen_op_load_s32_T0_T1_T2
{ {
static const uint8 op_load_s32_T0_T1_T2_code[] = { static const uint8 op_load_s32_T0_T1_T2_code[] = {
0x43, 0x8d, 0x04, 0x2e, 0x8b, 0x00, 0x41, 0x89, 0xc4, 0x41, 0x0f, 0xcc 0x43, 0x8d, 0x04, 0x2e,
TRANS_RAX,
0x8b, 0x00,
0x41, 0x89, 0xc4, 0x41, 0x0f, 0xcc,
}; };
copy_block(op_load_s32_T0_T1_T2_code, 12); copy_block(op_load_s32_T0_T1_T2_code, 48);
inc_code_ptr(12); *(uint32_t *)(code_ptr() + 28) = (uint32_t)(uintptr)gKernelData;
*(uint32_t *)(code_ptr() + 36) = (uint32_t)(uintptr)gZeroPage;
inc_code_ptr(48);
} }
#endif #endif
@ -1540,12 +1630,17 @@ DEFINE_GEN(gen_op_load_s32_T0_T1_im,void,(long param1))
#define HAVE_gen_op_load_s32_T0_T1_im #define HAVE_gen_op_load_s32_T0_T1_im
{ {
static const uint8 op_load_s32_T0_T1_im_code[] = { static const uint8 op_load_s32_T0_T1_im_code[] = {
0x44, 0x89, 0xea, 0x48, 0x8d, 0x05, 0x00, 0x00, 0x00, 0x00, 0x8b, 0x04, 0x44, 0x89, 0xea, 0x48, 0x8d, 0x05, 0x00, 0x00, 0x00, 0x00,
0x02, 0x41, 0x89, 0xc4, 0x41, 0x0f, 0xcc ADD_RAX_RDX,
TRANS_RAX,
0x8b, 0x00,
0x41, 0x89, 0xc4, 0x41, 0x0f, 0xcc,
}; };
copy_block(op_load_s32_T0_T1_im_code, 19); copy_block(op_load_s32_T0_T1_im_code, 56);
*(uint32_t *)(code_ptr() + 36) = (uint32_t)(uintptr)gKernelData;
*(uint32_t *)(code_ptr() + 44) = (uint32_t)(uintptr)gZeroPage;
*(uint32_t *)(code_ptr() + 6) = (int32_t)((long)param1 - (long)(code_ptr() + 6 + 4)) + 0; *(uint32_t *)(code_ptr() + 6) = (int32_t)((long)param1 - (long)(code_ptr() + 6 + 4)) + 0;
inc_code_ptr(19); inc_code_ptr(56);
} }
#endif #endif
@ -1554,11 +1649,15 @@ DEFINE_GEN(gen_op_load_u16_T0_T1_T2,void,(void))
#define HAVE_gen_op_load_u16_T0_T1_T2 #define HAVE_gen_op_load_u16_T0_T1_T2
{ {
static const uint8 op_load_u16_T0_T1_T2_code[] = { static const uint8 op_load_u16_T0_T1_T2_code[] = {
0x43, 0x8d, 0x04, 0x2e, 0x0f, 0xb7, 0x00, 0x66, 0xc1, 0xc0, 0x08, 0x44, 0x43, 0x8d, 0x04, 0x2e,
0x0f, 0xb7, 0xe0 TRANS_RAX,
0x0f, 0xb7, 0x00,
0x66, 0xc1, 0xc0, 0x08, 0x44, 0x0f, 0xb7, 0xe0,
}; };
copy_block(op_load_u16_T0_T1_T2_code, 15); copy_block(op_load_u16_T0_T1_T2_code, 51);
inc_code_ptr(15); *(uint32_t *)(code_ptr() + 28) = (uint32_t)(uintptr)gKernelData;
*(uint32_t *)(code_ptr() + 36) = (uint32_t)(uintptr)gZeroPage;
inc_code_ptr(51);
} }
#endif #endif
@ -1567,12 +1666,17 @@ DEFINE_GEN(gen_op_load_u16_T0_T1_im,void,(long param1))
#define HAVE_gen_op_load_u16_T0_T1_im #define HAVE_gen_op_load_u16_T0_T1_im
{ {
static const uint8 op_load_u16_T0_T1_im_code[] = { static const uint8 op_load_u16_T0_T1_im_code[] = {
0x44, 0x89, 0xea, 0x48, 0x8d, 0x05, 0x00, 0x00, 0x00, 0x00, 0x0f, 0xb7, 0x44, 0x89, 0xea, 0x48, 0x8d, 0x05, 0x00, 0x00, 0x00, 0x00,
0x04, 0x02, 0x66, 0xc1, 0xc0, 0x08, 0x44, 0x0f, 0xb7, 0xe0 ADD_RAX_RDX,
TRANS_RAX,
0x0f, 0xb7, 0x00,
0x66, 0xc1, 0xc0, 0x08, 0x44, 0x0f, 0xb7, 0xe0,
}; };
copy_block(op_load_u16_T0_T1_im_code, 22); copy_block(op_load_u16_T0_T1_im_code, 59);
*(uint32_t *)(code_ptr() + 36) = (uint32_t)(uintptr)gKernelData;
*(uint32_t *)(code_ptr() + 44) = (uint32_t)(uintptr)gZeroPage;
*(uint32_t *)(code_ptr() + 6) = (int32_t)((long)param1 - (long)(code_ptr() + 6 + 4)) + 0; *(uint32_t *)(code_ptr() + 6) = (int32_t)((long)param1 - (long)(code_ptr() + 6 + 4)) + 0;
inc_code_ptr(22); inc_code_ptr(59);
} }
#endif #endif
@ -1581,10 +1685,15 @@ DEFINE_GEN(gen_op_load_u32_T0_T1_T2,void,(void))
#define HAVE_gen_op_load_u32_T0_T1_T2 #define HAVE_gen_op_load_u32_T0_T1_T2
{ {
static const uint8 op_load_u32_T0_T1_T2_code[] = { static const uint8 op_load_u32_T0_T1_T2_code[] = {
0x43, 0x8d, 0x04, 0x2e, 0x8b, 0x00, 0x41, 0x89, 0xc4, 0x41, 0x0f, 0xcc 0x43, 0x8d, 0x04, 0x2e,
TRANS_RAX,
0x8b, 0x00,
0x41, 0x89, 0xc4, 0x41, 0x0f, 0xcc,
}; };
copy_block(op_load_u32_T0_T1_T2_code, 12); copy_block(op_load_u32_T0_T1_T2_code, 48);
inc_code_ptr(12); *(uint32_t *)(code_ptr() + 28) = (uint32_t)(uintptr)gKernelData;
*(uint32_t *)(code_ptr() + 36) = (uint32_t)(uintptr)gZeroPage;
inc_code_ptr(48);
} }
#endif #endif
@ -1593,12 +1702,17 @@ DEFINE_GEN(gen_op_load_u32_T0_T1_im,void,(long param1))
#define HAVE_gen_op_load_u32_T0_T1_im #define HAVE_gen_op_load_u32_T0_T1_im
{ {
static const uint8 op_load_u32_T0_T1_im_code[] = { static const uint8 op_load_u32_T0_T1_im_code[] = {
0x44, 0x89, 0xea, 0x48, 0x8d, 0x05, 0x00, 0x00, 0x00, 0x00, 0x8b, 0x04, 0x44, 0x89, 0xea, 0x48, 0x8d, 0x05, 0x00, 0x00, 0x00, 0x00,
0x02, 0x41, 0x89, 0xc4, 0x41, 0x0f, 0xcc ADD_RAX_RDX,
TRANS_RAX,
0x8b, 0x00,
0x41, 0x89, 0xc4, 0x41, 0x0f, 0xcc,
}; };
copy_block(op_load_u32_T0_T1_im_code, 19); copy_block(op_load_u32_T0_T1_im_code, 56);
*(uint32_t *)(code_ptr() + 36) = (uint32_t)(uintptr)gKernelData;
*(uint32_t *)(code_ptr() + 44) = (uint32_t)(uintptr)gZeroPage;
*(uint32_t *)(code_ptr() + 6) = (int32_t)((long)param1 - (long)(code_ptr() + 6 + 4)) + 0; *(uint32_t *)(code_ptr() + 6) = (int32_t)((long)param1 - (long)(code_ptr() + 6 + 4)) + 0;
inc_code_ptr(19); inc_code_ptr(56);
} }
#endif #endif
@ -1607,11 +1721,14 @@ DEFINE_GEN(gen_op_store_16_T0_T1_T2,void,(void))
#define HAVE_gen_op_store_16_T0_T1_T2 #define HAVE_gen_op_store_16_T0_T1_T2
{ {
static const uint8 op_store_16_T0_T1_T2_code[] = { static const uint8 op_store_16_T0_T1_T2_code[] = {
0x43, 0x8d, 0x14, 0x2e, 0x44, 0x89, 0xe0, 0x66, 0xc1, 0xc0, 0x08, 0x66, 0x43, 0x8d, 0x14, 0x2e, 0x44, 0x89, 0xe0, 0x66, 0xc1, 0xc0, 0x08,
0x89, 0x02 TRANS_RDX,
0x66, 0x89, 0x02,
}; };
copy_block(op_store_16_T0_T1_T2_code, 14); copy_block(op_store_16_T0_T1_T2_code, 55);
inc_code_ptr(14); *(uint32_t *)(code_ptr() + 39) = (uint32_t)(uintptr)gKernelData;
*(uint32_t *)(code_ptr() + 48) = (uint32_t)(uintptr)gZeroPage;
inc_code_ptr(55);
} }
#endif #endif
@ -1621,11 +1738,16 @@ DEFINE_GEN(gen_op_store_16_T0_T1_im,void,(long param1))
{ {
static const uint8 op_store_16_T0_T1_im_code[] = { static const uint8 op_store_16_T0_T1_im_code[] = {
0x44, 0x89, 0xe9, 0x44, 0x89, 0xe2, 0x66, 0xc1, 0xc2, 0x08, 0x48, 0x8d, 0x44, 0x89, 0xe9, 0x44, 0x89, 0xe2, 0x66, 0xc1, 0xc2, 0x08, 0x48, 0x8d,
0x05, 0x00, 0x00, 0x00, 0x00, 0x66, 0x89, 0x14, 0x01 0x05, 0x00, 0x00, 0x00, 0x00,
ADD_RAX_RCX,
TRANS_RAX,
0x66, 0x89, 0x10,
}; };
copy_block(op_store_16_T0_T1_im_code, 21); copy_block(op_store_16_T0_T1_im_code, 58);
*(uint32_t *)(code_ptr() + 43) = (uint32_t)(uintptr)gKernelData;
*(uint32_t *)(code_ptr() + 51) = (uint32_t)(uintptr)gZeroPage;
*(uint32_t *)(code_ptr() + 13) = (int32_t)((long)param1 - (long)(code_ptr() + 13 + 4)) + 0; *(uint32_t *)(code_ptr() + 13) = (int32_t)((long)param1 - (long)(code_ptr() + 13 + 4)) + 0;
inc_code_ptr(21); inc_code_ptr(58);
} }
#endif #endif
@ -1634,11 +1756,14 @@ DEFINE_GEN(gen_op_store_32_T0_T1_T2,void,(void))
#define HAVE_gen_op_store_32_T0_T1_T2 #define HAVE_gen_op_store_32_T0_T1_T2
{ {
static const uint8 op_store_32_T0_T1_T2_code[] = { static const uint8 op_store_32_T0_T1_T2_code[] = {
0x44, 0x89, 0xf2, 0x44, 0x89, 0xe1, 0x0f, 0xc9, 0x44, 0x01, 0xea, 0x89, 0x44, 0x89, 0xf2, 0x44, 0x89, 0xe1, 0x0f, 0xc9, 0x44, 0x01, 0xea,
0x0a TRANS_RDX,
0x89, 0x0a,
}; };
copy_block(op_store_32_T0_T1_T2_code, 13); copy_block(op_store_32_T0_T1_T2_code, 54);
inc_code_ptr(13); *(uint32_t *)(code_ptr() + 39) = (uint32_t)(uintptr)gKernelData;
*(uint32_t *)(code_ptr() + 48) = (uint32_t)(uintptr)gZeroPage;
inc_code_ptr(54);
} }
#endif #endif
@ -1648,11 +1773,16 @@ DEFINE_GEN(gen_op_store_32_T0_T1_im,void,(long param1))
{ {
static const uint8 op_store_32_T0_T1_im_code[] = { static const uint8 op_store_32_T0_T1_im_code[] = {
0x44, 0x89, 0xe1, 0x0f, 0xc9, 0x44, 0x89, 0xe8, 0x48, 0x8d, 0x15, 0x00, 0x44, 0x89, 0xe1, 0x0f, 0xc9, 0x44, 0x89, 0xe8, 0x48, 0x8d, 0x15, 0x00,
0x00, 0x00, 0x00, 0x89, 0x0c, 0x10 0x00, 0x00, 0x00,
ADD_RAX_RDX,
TRANS_RAX,
0x89, 0x08,
}; };
copy_block(op_store_32_T0_T1_im_code, 18); copy_block(op_store_32_T0_T1_im_code, 55);
*(uint32_t *)(code_ptr() + 41) = (uint32_t)(uintptr)gKernelData;
*(uint32_t *)(code_ptr() + 49) = (uint32_t)(uintptr)gZeroPage;
*(uint32_t *)(code_ptr() + 11) = (int32_t)((long)param1 - (long)(code_ptr() + 11 + 4)) + 0; *(uint32_t *)(code_ptr() + 11) = (int32_t)((long)param1 - (long)(code_ptr() + 11 + 4)) + 0;
inc_code_ptr(18); inc_code_ptr(55);
} }
#endif #endif

233
SheepShaver/src/Unix/dyngen_precompiled/ppc-dyngen-ops-x86_64.hpp
View File

@ -1,3 +1,30 @@
#define ADD_RAX_RCX 0x01,0xc8
#define ADD_RDX_RCX 0x01,0xca
#define ADD_RAX_RDX 0x01,0xd0
#define TRANS_RAX \
0x48,0x3D,0x00,0x30,0x00,0x00,\
0x72,0x16,\
0x48,0x3D,0x00,0xE0,0xFF,0x5F,\
0x72,0x14,\
0x48,0x25,0xFF,0x1F,0x00,0x00,\
0x48,0x05,0x00,0x00,0x00,0x00,\
0xEB,0x06,\
0x48,0x05,0x00,0x00,0x00,0x00
#define TRANS_RDX \
0x48,0x81,0xFA,0x00,0x30,0x00,0x00,\
0x72,0x19,\
0x48,0x81,0xFA,0x00,0xE0,0xFF,0x5F,\
0x72,0x17,\
0x48,0x81,0xE2,0xFF,0x1F,0x00,0x00,\
0x48,0x81,0xC2,0x00,0x00,0x00,0x00,\
0xEB,0x07,\
0x48,0x81,0xC2,0x00,0x00,0x00,0x00
#ifdef DYNGEN_IMPL
extern uint8 gZeroPage[0x3000], gKernelData[0x2000];
#endif
#ifndef DEFINE_CST #ifndef DEFINE_CST
#define DEFINE_CST(NAME, VALUE) #define DEFINE_CST(NAME, VALUE)
#endif #endif
@ -10417,14 +10444,25 @@ DEFINE_GEN(gen_op_load_vect_VD_T0,void,(void))
#define HAVE_gen_op_load_vect_VD_T0 #define HAVE_gen_op_load_vect_VD_T0
{ {
static const uint8 op_load_vect_VD_T0_code[] = { static const uint8 op_load_vect_VD_T0_code[] = {
0x44, 0x89, 0xe2, 0x83, 0xe2, 0xf0, 0x89, 0xd0, 0x8b, 0x00, 0x0f, 0xc8, 0x44, 0x89, 0xe2, 0x83, 0xe2, 0xf0, 0x89, 0xd0,
0x41, 0x89, 0x07, 0x8d, 0x42, 0x04, 0x89, 0xc0, 0x8b, 0x00, 0x0f, 0xc8, TRANS_RAX,
0x41, 0x89, 0x47, 0x04, 0x8d, 0x42, 0x08, 0x89, 0xc0, 0x8b, 0x00, 0x0f, 0x8b, 0x00,
0xc8, 0x41, 0x89, 0x47, 0x08, 0x83, 0xc2, 0x0c, 0x89, 0xd2, 0x8b, 0x02, 0x0f, 0xc8, 0x41, 0x89, 0x07, 0x8d, 0x42, 0x04, 0x89, 0xc0,
0x0f, 0xc8, 0x41, 0x89, 0x47, 0x0c TRANS_RAX,
0x8b, 0x00,
0x0f, 0xc8, 0x41, 0x89, 0x47, 0x04, 0x8d, 0x42, 0x08, 0x89, 0xc0,
TRANS_RAX,
0x8b, 0x00,
0x0f, 0xc8, 0x41, 0x89, 0x47, 0x08, 0x83, 0xc2, 0x0c, 0x89, 0xd2, 0x8b, 0x02, 0x0f, 0xc8, 0x41, 0x89, 0x47, 0x0c,
}; };
copy_block(op_load_vect_VD_T0_code, 54); copy_block(op_load_vect_VD_T0_code, 162);
inc_code_ptr(54); *(uint32_t *)(code_ptr() + 35) = (uint32_t)(uintptr)gKernelData;
*(uint32_t *)(code_ptr() + 34) = (uint32_t)(uintptr)gKernelData;
*(uint32_t *)(code_ptr() + 32) = (uint32_t)(uintptr)gKernelData;
*(uint32_t *)(code_ptr() + 43) = (uint32_t)(uintptr)gZeroPage;
*(uint32_t *)(code_ptr() + 42) = (uint32_t)(uintptr)gZeroPage;
*(uint32_t *)(code_ptr() + 40) = (uint32_t)(uintptr)gZeroPage;
inc_code_ptr(162);
} }
#endif #endif
@ -10433,11 +10471,15 @@ DEFINE_GEN(gen_op_load_word_VD_T0,void,(void))
#define HAVE_gen_op_load_word_VD_T0 #define HAVE_gen_op_load_word_VD_T0
{ {
static const uint8 op_load_word_VD_T0_code[] = { static const uint8 op_load_word_VD_T0_code[] = {
0x44, 0x89, 0xe2, 0x48, 0x89, 0xd0, 0x83, 0xe0, 0xfc, 0x8b, 0x00, 0x0f, 0x44, 0x89, 0xe2, 0x48, 0x89, 0xd0, 0x83, 0xe0, 0xfc,
0xc8, 0xc1, 0xea, 0x02, 0x83, 0xe2, 0x03, 0x41, 0x89, 0x04, 0x97 TRANS_RAX,
0x8b, 0x00,
0x0f, 0xc8, 0xc1, 0xea, 0x02, 0x83, 0xe2, 0x03, 0x41, 0x89, 0x04, 0x97,
}; };
copy_block(op_load_word_VD_T0_code, 23); copy_block(op_load_word_VD_T0_code, 59);
inc_code_ptr(23); *(uint32_t *)(code_ptr() + 33) = (uint32_t)(uintptr)gKernelData;
*(uint32_t *)(code_ptr() + 41) = (uint32_t)(uintptr)gZeroPage;
inc_code_ptr(59);
} }
#endif #endif
@ -10495,13 +10537,25 @@ DEFINE_GEN(gen_op_store_vect_VD_T0,void,(void))
{ {
static const uint8 op_store_vect_VD_T0_code[] = { static const uint8 op_store_vect_VD_T0_code[] = {
0x44, 0x89, 0xe1, 0x83, 0xe1, 0xf0, 0x41, 0x8b, 0x07, 0x0f, 0xc8, 0x89, 0x44, 0x89, 0xe1, 0x83, 0xe1, 0xf0, 0x41, 0x8b, 0x07, 0x0f, 0xc8, 0x89,
0xca, 0x89, 0x02, 0x41, 0x8b, 0x57, 0x04, 0x0f, 0xca, 0x8d, 0x41, 0x04, 0xca,
0x89, 0xc0, 0x89, 0x10, 0x41, 0x8b, 0x57, 0x08, 0x0f, 0xca, 0x8d, 0x41, TRANS_RDX,
0x08, 0x89, 0xc0, 0x89, 0x10, 0x41, 0x8b, 0x47, 0x0c, 0x0f, 0xc8, 0x83, 0x89, 0x02,
0xc1, 0x0c, 0x89, 0xc9, 0x89, 0x01 0x41, 0x8b, 0x57, 0x04, 0x0f, 0xca, 0x8d, 0x41, 0x04, 0x89, 0xc0,
TRANS_RAX,
0x89, 0x10,
0x41, 0x8b, 0x57, 0x08, 0x0f, 0xca, 0x8d, 0x41, 0x08, 0x89, 0xc0,
TRANS_RAX,
0x89, 0x10,
0x41, 0x8b, 0x47, 0x0c, 0x0f, 0xc8, 0x83, 0xc1, 0x0c, 0x89, 0xc9, 0x89, 0x01,
}; };
copy_block(op_store_vect_VD_T0_code, 54); copy_block(op_store_vect_VD_T0_code, 167);
inc_code_ptr(54); *(uint32_t *)(code_ptr() + 35) = (uint32_t)(uintptr)gKernelData;
*(uint32_t *)(code_ptr() + 35) = (uint32_t)(uintptr)gKernelData;
*(uint32_t *)(code_ptr() + 41) = (uint32_t)(uintptr)gKernelData;
*(uint32_t *)(code_ptr() + 43) = (uint32_t)(uintptr)gZeroPage;
*(uint32_t *)(code_ptr() + 43) = (uint32_t)(uintptr)gZeroPage;
*(uint32_t *)(code_ptr() + 50) = (uint32_t)(uintptr)gZeroPage;
inc_code_ptr(167);
} }
#endif #endif
@ -10511,10 +10565,14 @@ DEFINE_GEN(gen_op_store_word_VD_T0,void,(void))
{ {
static const uint8 op_store_word_VD_T0_code[] = { static const uint8 op_store_word_VD_T0_code[] = {
0x44, 0x89, 0xe0, 0x44, 0x89, 0xe2, 0xc1, 0xea, 0x02, 0x83, 0xe2, 0x03, 0x44, 0x89, 0xe0, 0x44, 0x89, 0xe2, 0xc1, 0xea, 0x02, 0x83, 0xe2, 0x03,
0x41, 0x8b, 0x14, 0x97, 0x0f, 0xca, 0x83, 0xe0, 0xfc, 0x89, 0x10 0x41, 0x8b, 0x14, 0x97, 0x0f, 0xca, 0x83, 0xe0, 0xfc,
TRANS_RAX,
0x89, 0x10,
}; };
copy_block(op_store_word_VD_T0_code, 23); copy_block(op_store_word_VD_T0_code, 59);
inc_code_ptr(23); *(uint32_t *)(code_ptr() + 45) = (uint32_t)(uintptr)gKernelData;
*(uint32_t *)(code_ptr() + 53) = (uint32_t)(uintptr)gZeroPage;
inc_code_ptr(59);
} }
#endif #endif
@ -10693,11 +10751,15 @@ DEFINE_GEN(gen_op_load_double_FD_T1_0,void,(void))
#define HAVE_gen_op_load_double_FD_T1_0 #define HAVE_gen_op_load_double_FD_T1_0
{ {
static const uint8 op_load_double_FD_T1_0_code[] = { static const uint8 op_load_double_FD_T1_0_code[] = {
0x44, 0x89, 0xe8, 0x48, 0x8b, 0x00, 0x48, 0x0f, 0xc8, 0x48, 0x89, 0x85, 0x44, 0x89, 0xe8,
0xa8, 0x08, 0x10, 0x00 TRANS_RAX,
0x48, 0x8b, 0x00,
0x48, 0x0f, 0xc8, 0x48, 0x89, 0x85, 0xa8, 0x08, 0x10, 0x00,
}; };
copy_block(op_load_double_FD_T1_0_code, 16); copy_block(op_load_double_FD_T1_0_code, 52);
inc_code_ptr(16); *(uint32_t *)(code_ptr() + 27) = (uint32_t)(uintptr)gKernelData;
*(uint32_t *)(code_ptr() + 35) = (uint32_t)(uintptr)gZeroPage;
inc_code_ptr(52);
} }
#endif #endif
@ -10706,13 +10768,15 @@ DEFINE_GEN(gen_op_load_single_FD_T1_0,void,(void))
#define HAVE_gen_op_load_single_FD_T1_0 #define HAVE_gen_op_load_single_FD_T1_0
{ {
static const uint8 op_load_single_FD_T1_0_code[] = { static const uint8 op_load_single_FD_T1_0_code[] = {
0x44, 0x89, 0xe8, 0x8b, 0x00, 0x0f, 0xc8, 0x89, 0x44, 0x24, 0xf4, 0xf3, 0x44, 0x89, 0xe8,
0x0f, 0x10, 0x44, 0x24, 0xf4, 0xf3, 0x0f, 0x5a, 0xc0, 0xf2, 0x0f, 0x11, TRANS_RAX,
0x44, 0x24, 0xf8, 0x48, 0x8b, 0x44, 0x24, 0xf8, 0x48, 0x89, 0x85, 0xa8, 0x8b, 0x00,
0x08, 0x10, 0x00 0x0f, 0xc8, 0x89, 0x44, 0x24, 0xf4, 0xf3, 0x0f, 0x10, 0x44, 0x24, 0xf4, 0xf3, 0x0f, 0x5a, 0xc0, 0xf2, 0x0f, 0x11, 0x44, 0x24, 0xf8, 0x48, 0x8b, 0x44, 0x24, 0xf8, 0x48, 0x89, 0x85, 0xa8, 0x08, 0x10, 0x00,
}; };
copy_block(op_load_single_FD_T1_0_code, 39); copy_block(op_load_single_FD_T1_0_code, 75);
inc_code_ptr(39); *(uint32_t *)(code_ptr() + 27) = (uint32_t)(uintptr)gKernelData;
*(uint32_t *)(code_ptr() + 35) = (uint32_t)(uintptr)gZeroPage;
inc_code_ptr(75);
} }
#endif #endif
@ -10875,11 +10939,15 @@ DEFINE_GEN(gen_op_load_double_FD_T1_T2,void,(void))
#define HAVE_gen_op_load_double_FD_T1_T2 #define HAVE_gen_op_load_double_FD_T1_T2
{ {
static const uint8 op_load_double_FD_T1_T2_code[] = { static const uint8 op_load_double_FD_T1_T2_code[] = {
0x43, 0x8d, 0x04, 0x2e, 0x48, 0x8b, 0x00, 0x48, 0x0f, 0xc8, 0x48, 0x89, 0x43, 0x8d, 0x04, 0x2e,
0x85, 0xa8, 0x08, 0x10, 0x00 TRANS_RAX,
0x48, 0x8b, 0x00,
0x48, 0x0f, 0xc8, 0x48, 0x89, 0x85, 0xa8, 0x08, 0x10, 0x00,
}; };
copy_block(op_load_double_FD_T1_T2_code, 17); copy_block(op_load_double_FD_T1_T2_code, 53);
inc_code_ptr(17); *(uint32_t *)(code_ptr() + 28) = (uint32_t)(uintptr)gKernelData;
*(uint32_t *)(code_ptr() + 36) = (uint32_t)(uintptr)gZeroPage;
inc_code_ptr(53);
} }
#endif #endif
@ -10888,12 +10956,17 @@ DEFINE_GEN(gen_op_load_double_FD_T1_im,void,(long param1))
#define HAVE_gen_op_load_double_FD_T1_im #define HAVE_gen_op_load_double_FD_T1_im
{ {
static const uint8 op_load_double_FD_T1_im_code[] = { static const uint8 op_load_double_FD_T1_im_code[] = {
0x44, 0x89, 0xea, 0x48, 0x8d, 0x05, 0x00, 0x00, 0x00, 0x00, 0x48, 0x8b, 0x44, 0x89, 0xea, 0x48, 0x8d, 0x05, 0x00, 0x00, 0x00, 0x00,
0x04, 0x02, 0x48, 0x0f, 0xc8, 0x48, 0x89, 0x85, 0xa8, 0x08, 0x10, 0x00 ADD_RAX_RDX,
TRANS_RAX,
0x48, 0x8b, 0x00,
0x48, 0x0f, 0xc8, 0x48, 0x89, 0x85, 0xa8, 0x08, 0x10, 0x00,
}; };
copy_block(op_load_double_FD_T1_im_code, 24); copy_block(op_load_double_FD_T1_im_code, 61);
*(uint32_t *)(code_ptr() + 36) = (uint32_t)(uintptr)gKernelData;
*(uint32_t *)(code_ptr() + 44) = (uint32_t)(uintptr)gZeroPage;
*(uint32_t *)(code_ptr() + 6) = (int32_t)((long)param1 - (long)(code_ptr() + 6 + 4)) + 0; *(uint32_t *)(code_ptr() + 6) = (int32_t)((long)param1 - (long)(code_ptr() + 6 + 4)) + 0;
inc_code_ptr(24); inc_code_ptr(61);
} }
#endif #endif
@ -10902,13 +10975,15 @@ DEFINE_GEN(gen_op_load_single_FD_T1_T2,void,(void))
#define HAVE_gen_op_load_single_FD_T1_T2 #define HAVE_gen_op_load_single_FD_T1_T2
{ {
static const uint8 op_load_single_FD_T1_T2_code[] = { static const uint8 op_load_single_FD_T1_T2_code[] = {
0x43, 0x8d, 0x04, 0x2e, 0x8b, 0x00, 0x0f, 0xc8, 0x89, 0x44, 0x24, 0xf4, 0x43, 0x8d, 0x04, 0x2e,
0xf3, 0x0f, 0x10, 0x44, 0x24, 0xf4, 0xf3, 0x0f, 0x5a, 0xc0, 0xf2, 0x0f, TRANS_RAX,
0x11, 0x44, 0x24, 0xf8, 0x48, 0x8b, 0x44, 0x24, 0xf8, 0x48, 0x89, 0x85, 0x8b, 0x00,
0xa8, 0x08, 0x10, 0x00 0x0f, 0xc8, 0x89, 0x44, 0x24, 0xf4, 0xf3, 0x0f, 0x10, 0x44, 0x24, 0xf4, 0xf3, 0x0f, 0x5a, 0xc0, 0xf2, 0x0f, 0x11, 0x44, 0x24, 0xf8, 0x48, 0x8b, 0x44, 0x24, 0xf8, 0x48, 0x89, 0x85, 0xa8, 0x08, 0x10, 0x00,
}; };
copy_block(op_load_single_FD_T1_T2_code, 40); copy_block(op_load_single_FD_T1_T2_code, 76);
inc_code_ptr(40); *(uint32_t *)(code_ptr() + 28) = (uint32_t)(uintptr)gKernelData;
*(uint32_t *)(code_ptr() + 36) = (uint32_t)(uintptr)gZeroPage;
inc_code_ptr(76);
} }
#endif #endif
@ -10917,14 +10992,17 @@ DEFINE_GEN(gen_op_load_single_FD_T1_im,void,(long param1))
#define HAVE_gen_op_load_single_FD_T1_im #define HAVE_gen_op_load_single_FD_T1_im
{ {
static const uint8 op_load_single_FD_T1_im_code[] = { static const uint8 op_load_single_FD_T1_im_code[] = {
0x44, 0x89, 0xea, 0x48, 0x8d, 0x05, 0x00, 0x00, 0x00, 0x00, 0x8b, 0x04, 0x44, 0x89, 0xea, 0x48, 0x8d, 0x05, 0x00, 0x00, 0x00, 0x00,
0x02, 0x0f, 0xc8, 0x89, 0x44, 0x24, 0xf4, 0xf3, 0x0f, 0x10, 0x44, 0x24, ADD_RAX_RDX,
0xf4, 0xf3, 0x0f, 0x5a, 0xc0, 0xf2, 0x0f, 0x11, 0x44, 0x24, 0xf8, 0x48, TRANS_RAX,
0x8b, 0x44, 0x24, 0xf8, 0x48, 0x89, 0x85, 0xa8, 0x08, 0x10, 0x00 0x8b, 0x00,
0x0f, 0xc8, 0x89, 0x44, 0x24, 0xf4, 0xf3, 0x0f, 0x10, 0x44, 0x24, 0xf4, 0xf3, 0x0f, 0x5a, 0xc0, 0xf2, 0x0f, 0x11, 0x44, 0x24, 0xf8, 0x48, 0x8b, 0x44, 0x24, 0xf8, 0x48, 0x89, 0x85, 0xa8, 0x08, 0x10, 0x00,
}; };
copy_block(op_load_single_FD_T1_im_code, 47); copy_block(op_load_single_FD_T1_im_code, 84);
*(uint32_t *)(code_ptr() + 36) = (uint32_t)(uintptr)gKernelData;
*(uint32_t *)(code_ptr() + 44) = (uint32_t)(uintptr)gZeroPage;
*(uint32_t *)(code_ptr() + 6) = (int32_t)((long)param1 - (long)(code_ptr() + 6 + 4)) + 0; *(uint32_t *)(code_ptr() + 6) = (int32_t)((long)param1 - (long)(code_ptr() + 6 + 4)) + 0;
inc_code_ptr(47); inc_code_ptr(84);
} }
#endif #endif
@ -10933,11 +11011,14 @@ DEFINE_GEN(gen_op_store_double_F0_T1_0,void,(void))
#define HAVE_gen_op_store_double_F0_T1_0 #define HAVE_gen_op_store_double_F0_T1_0
{ {
static const uint8 op_store_double_F0_T1_0_code[] = { static const uint8 op_store_double_F0_T1_0_code[] = {
0x49, 0x8b, 0x04, 0x24, 0x44, 0x89, 0xea, 0x48, 0x0f, 0xc8, 0x48, 0x89, 0x49, 0x8b, 0x04, 0x24, 0x44, 0x89, 0xea, 0x48, 0x0f, 0xc8,
0x02 TRANS_RDX,
0x48, 0x89, 0x02,
}; };
copy_block(op_store_double_F0_T1_0_code, 13); copy_block(op_store_double_F0_T1_0_code, 54);
inc_code_ptr(13); *(uint32_t *)(code_ptr() + 38) = (uint32_t)(uintptr)gKernelData;
*(uint32_t *)(code_ptr() + 47) = (uint32_t)(uintptr)gZeroPage;
inc_code_ptr(54);
} }
#endif #endif
@ -10952,11 +11033,14 @@ DEFINE_GEN(gen_op_store_single_F0_T1_0,void,(void))
0xff, 0x3f, 0x48, 0xc1, 0xe9, 0x03, 0x89, 0xc8, 0x25, 0x00, 0x00, 0x00, 0xff, 0x3f, 0x48, 0xc1, 0xe9, 0x03, 0x89, 0xc8, 0x25, 0x00, 0x00, 0x00,
0xc0, 0x09, 0xc2, 0xeb, 0x19, 0x48, 0x89, 0x4c, 0x24, 0xf0, 0xf2, 0x0f, 0xc0, 0x09, 0xc2, 0xeb, 0x19, 0x48, 0x89, 0x4c, 0x24, 0xf0, 0xf2, 0x0f,
0x10, 0x44, 0x24, 0xf0, 0xf2, 0x0f, 0x5a, 0xc0, 0xf3, 0x0f, 0x11, 0x44, 0x10, 0x44, 0x24, 0xf0, 0xf2, 0x0f, 0x5a, 0xc0, 0xf3, 0x0f, 0x11, 0x44,
0x24, 0xfc, 0x8b, 0x54, 0x24, 0xfc, 0x0f, 0xca, 0x44, 0x89, 0xe8, 0x89, 0x24, 0xfc, 0x8b, 0x54, 0x24, 0xfc, 0x0f, 0xca, 0x44, 0x89, 0xe8,
0x10 TRANS_RAX,
0x89, 0x10,
}; };
copy_block(op_store_single_F0_T1_0_code, 85); copy_block(op_store_single_F0_T1_0_code, 121);
inc_code_ptr(85); *(uint32_t *)(code_ptr() + 107) = (uint32_t)(uintptr)gKernelData;
*(uint32_t *)(code_ptr() + 115) = (uint32_t)(uintptr)gZeroPage;
inc_code_ptr(121);
} }
#endif #endif
@ -11025,11 +11109,14 @@ DEFINE_GEN(gen_op_store_double_F0_T1_T2,void,(void))
#define HAVE_gen_op_store_double_F0_T1_T2 #define HAVE_gen_op_store_double_F0_T1_T2
{ {
static const uint8 op_store_double_F0_T1_T2_code[] = { static const uint8 op_store_double_F0_T1_T2_code[] = {
0x49, 0x8b, 0x04, 0x24, 0x43, 0x8d, 0x14, 0x2e, 0x48, 0x0f, 0xc8, 0x48, 0x49, 0x8b, 0x04, 0x24, 0x43, 0x8d, 0x14, 0x2e, 0x48, 0x0f, 0xc8,
0x89, 0x02 TRANS_RDX,
0x48, 0x89, 0x02,
}; };
copy_block(op_store_double_F0_T1_T2_code, 14); copy_block(op_store_double_F0_T1_T2_code, 55);
inc_code_ptr(14); *(uint32_t *)(code_ptr() + 39) = (uint32_t)(uintptr)gKernelData;
*(uint32_t *)(code_ptr() + 48) = (uint32_t)(uintptr)gZeroPage;
inc_code_ptr(55);
} }
#endif #endif
@ -11039,11 +11126,16 @@ DEFINE_GEN(gen_op_store_double_F0_T1_im,void,(long param1))
{ {
static const uint8 op_store_double_F0_T1_im_code[] = { static const uint8 op_store_double_F0_T1_im_code[] = {
0x49, 0x8b, 0x04, 0x24, 0x44, 0x89, 0xe9, 0x48, 0x0f, 0xc8, 0x48, 0x8d, 0x49, 0x8b, 0x04, 0x24, 0x44, 0x89, 0xe9, 0x48, 0x0f, 0xc8, 0x48, 0x8d,
0x15, 0x00, 0x00, 0x00, 0x00, 0x48, 0x89, 0x04, 0x11 0x15, 0x00, 0x00, 0x00, 0x00,
ADD_RDX_RCX,
TRANS_RDX,
0x48, 0x89, 0x02,
}; };
copy_block(op_store_double_F0_T1_im_code, 21); copy_block(op_store_double_F0_T1_im_code, 63);
*(uint32_t *)(code_ptr() + 47) = (uint32_t)(uintptr)gKernelData;
*(uint32_t *)(code_ptr() + 56) = (uint32_t)(uintptr)gZeroPage;
*(uint32_t *)(code_ptr() + 13) = (int32_t)((long)param1 - (long)(code_ptr() + 13 + 4)) + 0; *(uint32_t *)(code_ptr() + 13) = (int32_t)((long)param1 - (long)(code_ptr() + 13 + 4)) + 0;
inc_code_ptr(21); inc_code_ptr(63);
} }
#endif #endif
@ -11078,11 +11170,16 @@ DEFINE_GEN(gen_op_store_single_F0_T1_im,void,(long param1))
0xc0, 0x09, 0xc1, 0xeb, 0x19, 0x48, 0x89, 0x54, 0x24, 0xf0, 0xf2, 0x0f, 0xc0, 0x09, 0xc1, 0xeb, 0x19, 0x48, 0x89, 0x54, 0x24, 0xf0, 0xf2, 0x0f,
0x10, 0x44, 0x24, 0xf0, 0xf2, 0x0f, 0x5a, 0xc0, 0xf3, 0x0f, 0x11, 0x44, 0x10, 0x44, 0x24, 0xf0, 0xf2, 0x0f, 0x5a, 0xc0, 0xf3, 0x0f, 0x11, 0x44,
0x24, 0xfc, 0x8b, 0x4c, 0x24, 0xfc, 0x0f, 0xc9, 0x44, 0x89, 0xe8, 0x48, 0x24, 0xfc, 0x8b, 0x4c, 0x24, 0xfc, 0x0f, 0xc9, 0x44, 0x89, 0xe8, 0x48,
0x8d, 0x15, 0x00, 0x00, 0x00, 0x00, 0x89, 0x0c, 0x10 0x8d, 0x15, 0x00, 0x00, 0x00, 0x00,
ADD_RAX_RDX,
TRANS_RAX,
0x89, 0x08,
}; };
copy_block(op_store_single_F0_T1_im_code, 93); copy_block(op_store_single_F0_T1_im_code, 130);
*(uint32_t *)(code_ptr() + 116) = (uint32_t)(uintptr)gKernelData;
*(uint32_t *)(code_ptr() + 124) = (uint32_t)(uintptr)gZeroPage;
*(uint32_t *)(code_ptr() + 86) = (int32_t)((long)param1 - (long)(code_ptr() + 86 + 4)) + 0; *(uint32_t *)(code_ptr() + 86) = (int32_t)((long)param1 - (long)(code_ptr() + 86 + 4)) + 0;
inc_code_ptr(93); inc_code_ptr(130);
} }
#endif #endif

5
SheepShaver/src/Unix/main_unix.cpp
View File

@ -190,6 +190,7 @@ int64 BusClockSpeed; // Bus clock speed (Hz)
int64 TimebaseSpeed; // Timebase clock speed (Hz) int64 TimebaseSpeed; // Timebase clock speed (Hz)
uint8 *RAMBaseHost; // Base address of Mac RAM (host address space) uint8 *RAMBaseHost; // Base address of Mac RAM (host address space)
uint8 *ROMBaseHost; // Base address of Mac ROM (host address space) uint8 *ROMBaseHost; // Base address of Mac ROM (host address space)
uint8 *ROMEndHost;
#if defined(__APPLE__) && defined(__x86_64__) #if defined(__APPLE__) && defined(__x86_64__)
uint8 gZeroPage[0x3000], gKernelData[0x2000]; uint8 gZeroPage[0x3000], gKernelData[0x2000];
@ -937,6 +938,8 @@ int main(int argc, char **argv)
RAMBase = Host2MacAddr(RAMBaseHost); RAMBase = Host2MacAddr(RAMBaseHost);
ROMBase = (RAMBase + RAMSize + ROM_ALIGNMENT -1) & -ROM_ALIGNMENT; ROMBase = (RAMBase + RAMSize + ROM_ALIGNMENT -1) & -ROM_ALIGNMENT;
ROMBaseHost = Mac2HostAddr(ROMBase); ROMBaseHost = Mac2HostAddr(ROMBase);
ROMEndHost = RAMBaseHost + RAMSize + ROM_AREA_SIZE + ROM_ALIGNMENT;
ram_rom_areas_contiguous = true; ram_rom_areas_contiguous = true;
#else #else
if (vm_mac_acquire_fixed(RAM_BASE, RAMSize) < 0) { if (vm_mac_acquire_fixed(RAM_BASE, RAMSize) < 0) {
@ -1001,7 +1004,7 @@ int main(int argc, char **argv)
#if !EMULATED_PPC #if !EMULATED_PPC
flush_icache_range(ROMBase, ROMBase + ROM_AREA_SIZE); flush_icache_range(ROMBase, ROMBase + ROM_AREA_SIZE);
#endif #endif
vm_protect(ROMBaseHost, ROM_AREA_SIZE, VM_PAGE_READ | VM_PAGE_EXECUTE); // vm_protect(ROMBaseHost, ROM_AREA_SIZE, VM_PAGE_READ | VM_PAGE_EXECUTE);
// Start 60Hz thread // Start 60Hz thread
tick_thread_cancel = false; tick_thread_cancel = false;

2
SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp
View File

@ -182,7 +182,7 @@ sheepshaver_cpu::sheepshaver_cpu()
{ {
init_decoder(); init_decoder();
#if PPC_ENABLE_JIT && !(defined(__APPLE__) && defined(__x86_64__)) #if PPC_ENABLE_JIT
if (PrefsFindBool("jit")) if (PrefsFindBool("jit"))
enable_jit(); enable_jit();
#endif #endif