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https://github.com/kanjitalk755/macemu.git
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- fixed compilation problems under AmigaOS
- fsave/frestore on AmigaOS and NetBSD/m68k always use a 68882/68040-style FPU frame, eliminating the need for 68060 FPU patches
This commit is contained in:
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@ -1,3 +1,8 @@
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V1.0 (snapshot) - <date>
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- added support for on-the-fly video resolution and depth seitching
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- fsave/frestore emulation under AmigaOS and NetBSD/m68k always behave
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like a 68882/68040 FPU, eliminating the need for 68060 FPU patches
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V0.9 (release 0.9-1) - 31.May 2001
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- final adjustments for 0.9 release
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@ -33,9 +33,6 @@
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XDEF _Execute68kTrap
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XDEF _TrapHandlerAsm
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XDEF _ExceptionHandlerAsm
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XDEF _Scod060Patch1
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XDEF _Scod060Patch2
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XDEF _ThInitFPUPatch
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XDEF _AsmTriggerNMI
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XREF _OldTrapHandler
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@ -243,63 +240,6 @@ _ExceptionHandlerAsm
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4$ move.l (sp)+,d0
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rts
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*
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* Process Manager 68060 FPU patches
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*
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_Scod060Patch1 fsave -(sp) ;Save FPU state
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tst.b 2(sp) ;Null?
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beq.s 1$
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fmovem.x fp0-fp7,-(sp) ;No, save FPU registers
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fmove.l fpiar,-(sp)
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fmove.l fpsr,-(sp)
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fmove.l fpcr,-(sp)
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pea -1 ;Push "FPU state saved" flag
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1$ move.l d1,-(sp)
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move.l d0,-(sp)
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bsr.s 3$ ;Switch integer registers and stack
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addq.l #8,sp
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tst.b 2(sp) ;New FPU state null or "FPU state saved" flag set?
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beq.s 2$
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addq.l #4,sp ;Flag set, skip it
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fmove.l (sp)+,fpcr ;Restore FPU registers and state
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fmove.l (sp)+,fpsr
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fmove.l (sp)+,fpiar
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fmovem.x (sp)+,fp0-fp7
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2$ frestore (sp)+
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movem.l (sp)+,d0-d1
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rts
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3$ move.l 4(sp),a0 ;Switch integer registers and stack
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move sr,-(sp)
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movem.l d2-d7/a2-a6,-(sp)
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cmp.w #0,a0
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beq.s 4$
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move.l sp,(a0)
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4$ move.l $36(sp),a0
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movem.l (a0)+,d2-d7/a2-a6
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move (a0)+,sr
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move.l a0,sp
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rts
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_Scod060Patch2 move.l d0,-(sp) ;Create 68060 null frame on stack
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move.l d0,-(sp)
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move.l d0,-(sp)
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frestore (sp)+ ;and load it
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rts
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*
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* Thread Manager 68060 FPU patches
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*
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_ThInitFPUPatch tst.b $40(a4)
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bne.s 1$
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moveq #0,d0 ;Create 68060 null frame on stack
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move.l d0,-(a3)
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move.l d0,-(a3)
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move.l d0,-(a3)
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1$ rts
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*
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* Trap handler of main task
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*
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@ -695,38 +635,35 @@ movefromsrsp move.l a0,-(sp) ;Save a0
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fsavepush move.l (sp),d0 ;Restore d0
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move.l a0,(sp) ;Save a0
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move.l usp,a0 ;Get user stack pointer
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fsave -(a0) ;Push FP state
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move.l #$41000000,-(a0) ;Push idle frame
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move.l a0,usp ;Update USP
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move.l (sp)+,a0 ;Restore a0
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addq.l #2,2(sp) ;Skip instruction
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rte
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; fsave xxx(a5)
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fsavea5 move.l (sp),d0 ;Restore d0
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move.l a0,(sp) ;Save a0
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move.l a5,a0 ;Get base register
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add.w ([6,sp],2),a0 ;Add offset to base register
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move.l #$41000000,(a0) ;Push idle frame
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move.l (sp)+,a0 ;Restore a0
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addq.l #4,2(sp) ;Skip instruction
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rte
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; frestore (sp)+
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frestorepop move.l (sp),d0 ;Restore d0
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move.l a0,(sp) ;Save a0
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move.l usp,a0 ;Get user stack pointer
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frestore (a0)+ ;Restore FP state
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addq.l #4,a0 ;Nothing to do...
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move.l a0,usp ;Update USP
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move.l (sp)+,a0 ;Restore a0
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addq.l #2,2(sp) ;Skip instruction
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rte
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; frestore xxx(a5) +jl+
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; frestore xxx(a5)
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frestorea5 move.l (sp),d0 ;Restore d0
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move.l a0,(sp) ;Save a0
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move.l a5,a0 ;Get base register
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add.w ([6,sp],2),a0 ;Add offset to base register
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frestore (a0) ;Restore FP state from (a0)
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move.l (sp)+,a0 ;Restore a0
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addq.l #4,2(sp) ;Skip instruction
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rte
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; fsave xxx(a5) +jl+
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fsavea5 move.l (sp),d0 ;Restore d0
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move.l a0,(sp) ;Save a0
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move.l a5,a0 ;Get base register
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add.w ([6,sp],2),a0 ;Add offset to base register
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fsave (a0) ;Push FP state to (a0)
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move.l (sp)+,a0 ;Restore a0
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addq.l #4,2(sp) ;Skip instruction
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rte
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@ -276,7 +276,7 @@ int main(int argc, char **argv)
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// Load Mac ROM
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BPTR rom_fh = Open(rom_path ? (char *)rom_path : (char *)ROM_FILE_NAME, MODE_OLDFILE);
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if (rom_fh == NULL) {
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if (rom_fh == 0) {
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ErrorAlert(GetString(STR_NO_ROM_FILE_ERR));
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QuitEmulator();
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}
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@ -119,8 +119,6 @@ static void set_video_monitor(uint32 width, uint32 height, uint32 bytes_per_row,
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mode.depth = VDEPTH_8BIT;
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break;
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case 15:
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mode.depth = VDEPTH_16BIT;
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break;
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case 16:
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mode.depth = VDEPTH_16BIT;
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break;
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@ -216,8 +214,8 @@ static bool init_pip(int width, int height)
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p96PIP_GetTags(the_win, P96PIP_SourceBitMap, (ULONG)&the_bitmap, TAG_END);
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// Add resolution and set VideoMonitor
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set_video_monitor(width, height, p96GetBitMapAttr(the_bitmap, P96BMA_BYTESPERROW), 16);
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VideoMonitor.mac_frame_base = p96GetBitMapAttr(the_bitmap, P96BMA_MEMORY);
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set_video_monitor(width, height, p96GetBitMapAttr(the_bitmap, P96BMA_BYTESPERROW), 16);
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return true;
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}
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@ -540,7 +538,8 @@ void VideoExit(void)
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void video_set_palette(uint8 *pal)
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{
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if (display_type == DISPLAY_SCREEN_P96 || display_type == DISPLAY_SCREEN_CGFX) {
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if ((display_type == DISPLAY_SCREEN_P96 || display_type == DISPLAY_SCREEN_CGFX)
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&& !IsDirectMode(VideoMonitor.mode)) {
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// Convert palette to 32 bits
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ULONG table[2 + 256 * 3];
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@ -27,9 +27,6 @@
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.globl _ClearInterruptFlag__FUi
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.globl _Execute68k
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.globl _Execute68kTrap
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.globl _Scod060Patch1
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.globl _Scod060Patch2
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.globl _ThInitFPUPatch
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.globl _EmulOpTrampoline
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.globl _RAMBaseHost
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@ -181,66 +178,3 @@ _EmulOpTrampoline:
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eot1: moveml sp@+,d0-d7/a0-a6 |Restore registers
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addql #4,sp |Skip saved SP
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rtr
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/*
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* Process Manager 68060 FPU patches
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*/
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.type _Scod060Patch1,@function
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_Scod060Patch1: fsave sp@- |Save FPU state
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tstb sp@(2) |Null?
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beqs sc1
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fmovemx fp0-fp7,sp@- |No, save FPU registers
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fmovel fpi,sp@-
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fmovel fpsr,sp@-
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fmovel fpcr,sp@-
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pea -1 |Push "FPU state saved" flag
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sc1: movl d1,sp@-
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movl d0,sp@-
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bsrs sc3 |Switch integer registers and stack
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addql #8,sp
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tstb sp@(2) |New FPU state null or "FPU state saved" flag set?
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beqs sc2
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addql #4,sp |Flag set, skip it
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fmovel sp@+,fpcr |Restore FPU registers and state
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fmovel sp@+,fpsr
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fmovel sp@+,fpi
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fmovemx sp@+,fp0-fp7
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sc2: frestore sp@+
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movml sp@+,d0-d1
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rts
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sc3: movl sp@(4),a0 |Switch integer registers and stack
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movw sr,sp@-
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movml d2-d7/a2-a6,sp@-
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cmpw #0,a0
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beqs sc4
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movl sp,a0@
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sc4: movl sp@(0x36),a0
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movml a0@+,d2-d7/a2-a6
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movw a0@+,sr
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movl a0,sp
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rts
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.type _Scod060Patch2,@function
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_Scod060Patch2: movl d0,sp@- |Create 68060 null frame on stack
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movl d0,sp@-
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movl d0,sp@-
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frestore sp@+ |and load it
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rts
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/*
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* Thread Manager 68060 FPU patches
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*/
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.type _ThInitFPUPatch,@function
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_ThInitFPUPatch:
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tstb a4@(0x40)
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bnes th1
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moveq #0,d0 |Create 68060 null frame on stack
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movl d0,a3@-
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movl d0,a3@-
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movl d0,a3@-
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th1: rts
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@ -1094,25 +1094,13 @@ static void sigill_handler(int sig, int code, struct sigcontext *scp)
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}
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case 0xf327: // fsave -(sp)
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if (CPUIs68060) {
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regs->a[7] -= 4;
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WriteMacInt32(regs->a[7], 0x60000000); // Idle frame
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regs->a[7] -= 4;
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WriteMacInt32(regs->a[7], 0);
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regs->a[7] -= 4;
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WriteMacInt32(regs->a[7], 0);
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} else {
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regs->a[7] -= 4;
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WriteMacInt32(regs->a[7], 0x41000000); // Idle frame
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}
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scp->sc_sp = regs->a[7];
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INC_PC(2);
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break;
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case 0xf35f: // frestore (sp)+
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if (CPUIs68060)
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regs->a[7] += 12;
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else
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regs->a[7] += 4;
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scp->sc_sp = regs->a[7];
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INC_PC(2);
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@ -37,14 +37,6 @@
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#include "debug.h"
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#if !EMULATED_68K
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// Assembly functions
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extern "C" void Scod060Patch1(void);
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extern "C" void Scod060Patch2(void);
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extern "C" void ThInitFPUPatch(void);
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#endif
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/*
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* Search resource for byte string, return offset (or 0)
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*/
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@ -90,7 +82,7 @@ void CheckLoad(uint32 type, int16 id, uint8 *p, uint32 size)
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if (base) {
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p16 = (uint16 *)(p + base);
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#if defined(AMIGA) || defined(__NetBSD__) || defined(USE_SCRATCHMEM_SUBTERFUGE)
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#if defined(USE_SCRATCHMEM_SUBTERFUGE)
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// Set 0x0000 to scratch memory area
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extern uint8 *ScratchMem;
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const uint32 ScratchMemBase = Host2MacAddr(ScratchMem);
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@ -197,266 +189,6 @@ void CheckLoad(uint32 type, int16 id, uint8 *p, uint32 size)
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D(bug(" patch 2 applied\n"));
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}
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#if !EMULATED_68K
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} else if (CPUIs68060 && (type == FOURCC('g','p','c','h') && id == 669 || type == FOURCC('l','p','c','h') && id == 63)) {
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D(bug(" gpch 669/lpch 63 found\n"));
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static uint16 ThPatchSpace[1024]; // Replacement routines are constructed here
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uint16 *q = ThPatchSpace;
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uint32 start;
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int i;
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// Patch Thread Manager thread switcher for 68060 FPU (7.5, 8.0)
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static const uint8 dat[] = {0x22, 0x6f, 0x00, 0x08, 0x20, 0x2f, 0x00, 0x04, 0x67, 0x18};
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base = find_rsrc_data(p, size, dat, sizeof(dat));
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if (base) { // Skip first routine (no FPU -> no FPU)
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base = find_rsrc_data(p, size - base - 2, dat, sizeof(dat), base + 2);
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if (base) { // no FPU -> FPU
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p16 = (uint16 *)(p + base);
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start = (uint32)q;
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for (i=0; i<28; i++) *q++ = *p16++;
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*q++ = htons(0x4a2f); // tst.b 2(sp) (null FPU state or "FPU state saved" flag set?)
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*q++ = htons(2);
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*q++ = htons(0x6712); // beq
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*q++ = htons(0x588f); // addq.l #2,sp (flag set, skip it)
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*q++ = htons(0xf21f); // fmove.l (sp)+,fpcr (restore FPU registers)
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*q++ = htons(0x9000);
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*q++ = htons(0xf21f); // fmove.l (sp)+,fpsr
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*q++ = htons(0x8800);
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*q++ = htons(0xf21f); // fmove.l (sp)+,fpiar
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*q++ = htons(0x8400);
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*q++ = htons(0xf21f); // fmovem.x (sp)+,fp0-fp7
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*q++ = htons(0xd0ff);
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*q++ = htons(0xf35f); // frestore (sp)+
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*q++ = htons(0x4e75); // rts
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p16 = (uint16 *)(p + base);
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*p16++ = htons(M68K_JMP);
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*p16++ = htons(start >> 16);
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*p16 = htons(start & 0xffff);
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FlushCodeCache(p + base, 6);
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D(bug(" patch 1 applied\n"));
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static const uint8 dat2[] = {0x22, 0x6f, 0x00, 0x08, 0x20, 0x2f, 0x00, 0x04, 0x67, 0x28};
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base = find_rsrc_data(p, size, dat2, sizeof(dat2));
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if (base) { // FPU -> FPU
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p16 = (uint16 *)(p + base);
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start = (uint32)q;
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for (i=0; i<4; i++) *q++ = *p16++;
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*q++ = htons(0x6736); // beq
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*q++ = htons(0xf327); // fsave -(sp) (save FPU state frame)
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*q++ = htons(0x4a2f); // tst.b 2(sp) (null FPU state?)
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*q++ = htons(2);
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*q++ = htons(0x6716); // beq
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*q++ = htons(0xf227); // fmovem.x fp0-fp7,-(sp) (no, save FPU registers)
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*q++ = htons(0xe0ff);
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*q++ = htons(0xf227); // fmove.l fpiar,-(sp)
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*q++ = htons(0xa400);
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*q++ = htons(0xf227); // fmove.l fpsr,-(sp)
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*q++ = htons(0xa800);
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*q++ = htons(0xf227); // fmove.l fpcr,-(sp)
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*q++ = htons(0xb000);
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*q++ = htons(0x4879); // pea -1 (push "FPU state saved" flag)
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*q++ = htons(0xffff);
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*q++ = htons(0xffff);
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p16 += 9;
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for (i=0; i<23; i++) *q++ = *p16++;
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*q++ = htons(0x4a2f); // tst.b 2(sp) (null FPU state or "FPU state saved" flag set?)
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*q++ = htons(2);
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*q++ = htons(0x6712); // beq
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*q++ = htons(0x588f); // addq.l #2,sp (flag set, skip it)
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*q++ = htons(0xf21f); // fmove.l (sp)+,fpcr (restore FPU registers)
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*q++ = htons(0x9000);
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*q++ = htons(0xf21f); // fmove.l (sp)+,fpsr
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*q++ = htons(0x8800);
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*q++ = htons(0xf21f); // fmove.l (sp)+,fpiar
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*q++ = htons(0x8400);
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*q++ = htons(0xf21f); // fmovem.x (sp)+,fp0-fp7
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*q++ = htons(0xd0ff);
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*q++ = htons(0xf35f); // frestore (sp)+
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*q++ = htons(0x4e75); // rts
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p16 = (uint16 *)(p + base);
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*p16++ = htons(M68K_JMP);
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*p16++ = htons(start >> 16);
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*p16 = htons(start & 0xffff);
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FlushCodeCache(p + base, 6);
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D(bug(" patch 2 applied\n"));
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base = find_rsrc_data(p, size - base - 2, dat2, sizeof(dat2), base + 2);
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if (base) { // FPU -> no FPU
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p16 = (uint16 *)(p + base);
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start = (uint32)q;
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for (i=0; i<4; i++) *q++ = *p16++;
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*q++ = htons(0x6736); // beq
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*q++ = htons(0xf327); // fsave -(sp) (save FPU state frame)
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*q++ = htons(0x4a2f); // tst.b 2(sp) (null FPU state?)
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*q++ = htons(2);
|
||||
*q++ = htons(0x6716); // beq
|
||||
*q++ = htons(0xf227); // fmovem.x fp0-fp7,-(sp) (no, save FPU registers)
|
||||
*q++ = htons(0xe0ff);
|
||||
*q++ = htons(0xf227); // fmove.l fpiar,-(sp)
|
||||
*q++ = htons(0xa400);
|
||||
*q++ = htons(0xf227); // fmove.l fpsr,-(sp)
|
||||
*q++ = htons(0xa800);
|
||||
*q++ = htons(0xf227); // fmove.l fpcr,-(sp)
|
||||
*q++ = htons(0xb000);
|
||||
*q++ = htons(0x4879); // pea -1 (push "FPU state saved" flag)
|
||||
*q++ = htons(0xffff);
|
||||
*q++ = htons(0xffff);
|
||||
p16 += 9;
|
||||
for (i=0; i<24; i++) *q++ = *p16++;
|
||||
|
||||
p16 = (uint16 *)(p + base);
|
||||
*p16++ = htons(M68K_JMP);
|
||||
*p16++ = htons(start >> 16);
|
||||
*p16 = htons(start & 0xffff);
|
||||
FlushCodeCache(p + base, 6);
|
||||
D(bug(" patch 3 applied\n"));
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
// Patch Thread Manager thread switcher for 68060 FPU (additional routines under 8.0 for Mixed Mode Manager)
|
||||
static const uint8 dat3[] = {0x22, 0x6f, 0x00, 0x08, 0x20, 0x2f, 0x00, 0x04, 0x67, 0x40};
|
||||
base = find_rsrc_data(p, size, dat3, sizeof(dat3));
|
||||
if (base) { // Skip first routine (no FPU -> no FPU)
|
||||
|
||||
base = find_rsrc_data(p, size - base - 2, dat3, sizeof(dat3), base + 2);
|
||||
if (base) { // no FPU -> FPU
|
||||
|
||||
p16 = (uint16 *)(p + base);
|
||||
start = (uint32)q;
|
||||
for (i=0; i<48; i++) *q++ = *p16++;
|
||||
*q++ = htons(0x4a2f); // tst.b 2(sp) (null FPU state or "FPU state saved" flag set?)
|
||||
*q++ = htons(2);
|
||||
*q++ = htons(0x6712); // beq
|
||||
*q++ = htons(0x588f); // addq.l #2,sp (flag set, skip it)
|
||||
*q++ = htons(0xf21f); // fmove.l (sp)+,fpcr (restore FPU registers)
|
||||
*q++ = htons(0x9000);
|
||||
*q++ = htons(0xf21f); // fmove.l (sp)+,fpsr
|
||||
*q++ = htons(0x8800);
|
||||
*q++ = htons(0xf21f); // fmove.l (sp)+,fpiar
|
||||
*q++ = htons(0x8400);
|
||||
*q++ = htons(0xf21f); // fmovem.x (sp)+,fp0-fp7
|
||||
*q++ = htons(0xd0ff);
|
||||
p16 += 7;
|
||||
for (i=0; i<20; i++) *q++ = *p16++;
|
||||
|
||||
p16 = (uint16 *)(p + base);
|
||||
*p16++ = htons(M68K_JMP);
|
||||
*p16++ = htons(start >> 16);
|
||||
*p16 = htons(start & 0xffff);
|
||||
FlushCodeCache(p + base, 6);
|
||||
D(bug(" patch 4 applied\n"));
|
||||
|
||||
static const uint8 dat4[] = {0x22, 0x6f, 0x00, 0x08, 0x20, 0x2f, 0x00, 0x04, 0x67, 0x50};
|
||||
base = find_rsrc_data(p, size, dat4, sizeof(dat4));
|
||||
if (base) { // FPU -> FPU
|
||||
|
||||
p16 = (uint16 *)(p + base);
|
||||
start = (uint32)q;
|
||||
for (i=0; i<4; i++) *q++ = *p16++;
|
||||
*q++ = htons(0x675e); // beq
|
||||
p16++;
|
||||
for (i=0; i<21; i++) *q++ = *p16++;
|
||||
*q++ = htons(0x4a2f); // tst.b 2(sp) (null FPU state?)
|
||||
*q++ = htons(2);
|
||||
*q++ = htons(0x6716); // beq
|
||||
*q++ = htons(0xf227); // fmovem.x fp0-fp7,-(sp) (no, save FPU registers)
|
||||
*q++ = htons(0xe0ff);
|
||||
*q++ = htons(0xf227); // fmove.l fpiar,-(sp)
|
||||
*q++ = htons(0xa400);
|
||||
*q++ = htons(0xf227); // fmove.l fpsr,-(sp)
|
||||
*q++ = htons(0xa800);
|
||||
*q++ = htons(0xf227); // fmove.l fpcr,-(sp)
|
||||
*q++ = htons(0xb000);
|
||||
*q++ = htons(0x4879); // pea -1 (push "FPU state saved" flag)
|
||||
*q++ = htons(0xffff);
|
||||
*q++ = htons(0xffff);
|
||||
p16 += 7;
|
||||
for (i=0; i<23; i++) *q++ = *p16++;
|
||||
*q++ = htons(0x4a2f); // tst.b 2(sp) (null FPU state or "FPU state saved" flag set?)
|
||||
*q++ = htons(2);
|
||||
*q++ = htons(0x6712); // beq
|
||||
*q++ = htons(0x588f); // addq.l #2,sp (flag set, skip it)
|
||||
*q++ = htons(0xf21f); // fmove.l (sp)+,fpcr (restore FPU registers)
|
||||
*q++ = htons(0x9000);
|
||||
*q++ = htons(0xf21f); // fmove.l (sp)+,fpsr
|
||||
*q++ = htons(0x8800);
|
||||
*q++ = htons(0xf21f); // fmove.l (sp)+,fpiar
|
||||
*q++ = htons(0x8400);
|
||||
*q++ = htons(0xf21f); // fmovem.x (sp)+,fp0-fp7
|
||||
*q++ = htons(0xd0ff);
|
||||
p16 += 7;
|
||||
for (i=0; i<20; i++) *q++ = *p16++;
|
||||
|
||||
p16 = (uint16 *)(p + base);
|
||||
*p16++ = htons(M68K_JMP);
|
||||
*p16++ = htons(start >> 16);
|
||||
*p16 = htons(start & 0xffff);
|
||||
FlushCodeCache(p + base, 6);
|
||||
D(bug(" patch 5 applied\n"));
|
||||
|
||||
base = find_rsrc_data(p, size - base - 2, dat4, sizeof(dat4), base + 2);
|
||||
if (base) { // FPU -> no FPU
|
||||
|
||||
p16 = (uint16 *)(p + base);
|
||||
start = (uint32)q;
|
||||
for (i=0; i<4; i++) *q++ = *p16++;
|
||||
*q++ = htons(0x675e); // beq
|
||||
p16++;
|
||||
for (i=0; i<21; i++) *q++ = *p16++;
|
||||
*q++ = htons(0x4a2f); // tst.b 2(sp) (null FPU state?)
|
||||
*q++ = htons(2);
|
||||
*q++ = htons(0x6716); // beq
|
||||
*q++ = htons(0xf227); // fmovem.x fp0-fp7,-(sp) (no, save FPU registers)
|
||||
*q++ = htons(0xe0ff);
|
||||
*q++ = htons(0xf227); // fmove.l fpiar,-(sp)
|
||||
*q++ = htons(0xa400);
|
||||
*q++ = htons(0xf227); // fmove.l fpsr,-(sp)
|
||||
*q++ = htons(0xa800);
|
||||
*q++ = htons(0xf227); // fmove.l fpcr,-(sp)
|
||||
*q++ = htons(0xb000);
|
||||
*q++ = htons(0x4879); // pea -1 (push "FPU state saved" flag)
|
||||
*q++ = htons(0xffff);
|
||||
*q++ = htons(0xffff);
|
||||
p16 += 7;
|
||||
for (i=0; i<42; i++) *q++ = *p16++;
|
||||
|
||||
p16 = (uint16 *)(p + base);
|
||||
*p16++ = htons(M68K_JMP);
|
||||
*p16++ = htons(start >> 16);
|
||||
*p16 = htons(start & 0xffff);
|
||||
FlushCodeCache(p + base, 6);
|
||||
D(bug(" patch 6 applied\n"));
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
FlushCodeCache(ThPatchSpace, 1024);
|
||||
|
||||
// Patch Thread Manager FPU init for 68060 FPU (7.5, 8.0)
|
||||
static const uint8 dat5[] = {0x4a, 0x28, 0x00, 0xa4, 0x67, 0x0a, 0x4a, 0x2c, 0x00, 0x40};
|
||||
base = find_rsrc_data(p, size, dat5, sizeof(dat5));
|
||||
if (base) {
|
||||
p16 = (uint16 *)(p + base + 6);
|
||||
*p16++ = htons(M68K_JSR);
|
||||
*p16++ = htons((uint32)ThInitFPUPatch >> 16);
|
||||
*p16++ = htons((uint32)ThInitFPUPatch & 0xffff);
|
||||
*p16++ = htons(M68K_NOP);
|
||||
*p16 = htons(M68K_NOP);
|
||||
FlushCodeCache(p + base + 6, 10);
|
||||
D(bug(" patch 7 applied\n"));
|
||||
}
|
||||
#endif
|
||||
|
||||
} else if (type == FOURCC('g','p','c','h') && id == 750) {
|
||||
D(bug(" gpch 750 found\n"));
|
||||
|
||||
@ -514,35 +246,6 @@ void CheckLoad(uint32 type, int16 id, uint8 *p, uint32 size)
|
||||
D(bug(" patch 2 applied\n"));
|
||||
}
|
||||
|
||||
#if !EMULATED_68K
|
||||
} else if (CPUIs68060 && type == FOURCC('s','c','o','d') && (id == -16463 || id == -16464)) {
|
||||
D(bug(" scod -16463/-16464 found\n"));
|
||||
|
||||
// Correct 68060 FP frame handling in Process Manager task switches (7.1, 7.5, 8.0)
|
||||
static const uint8 dat[] = {0xf3, 0x27, 0x4a, 0x17};
|
||||
base = find_rsrc_data(p, size, dat, sizeof(dat));
|
||||
if (base) {
|
||||
p16 = (uint16 *)(p + base);
|
||||
*p16++ = htons(M68K_JMP);
|
||||
*p16++ = htons((uint32)Scod060Patch1 >> 16);
|
||||
*p16 = htons((uint32)Scod060Patch1 & 0xffff);
|
||||
FlushCodeCache(p + base, 6);
|
||||
D(bug(" patch 1 applied\n"));
|
||||
}
|
||||
|
||||
// Even a null FP frame is 3 longwords on the 68060 (7.1, 7.5, 8.0)
|
||||
static const uint8 dat2[] = {0xf3, 0x5f, 0x4e, 0x75};
|
||||
base = find_rsrc_data(p, size, dat2, sizeof(dat2));
|
||||
if (base) {
|
||||
p16 = (uint16 *)(p + base - 2);
|
||||
*p16++ = htons(M68K_JMP);
|
||||
*p16++ = htons((uint32)Scod060Patch2 >> 16);
|
||||
*p16 = htons((uint32)Scod060Patch2 & 0xffff);
|
||||
FlushCodeCache(p + base - 2, 6);
|
||||
D(bug(" patch 2 applied\n"));
|
||||
}
|
||||
#endif
|
||||
|
||||
} else if (type == FOURCC('t','h','n','g') && id == -16563) {
|
||||
D(bug(" thng -16563 found\n"));
|
||||
|
||||
|
Loading…
Reference in New Issue
Block a user