Merge pull request #1 from kanjitalk755/zydeco_rootless

To improve stability
This commit is contained in:
Jesús A. Álvarez 2019-12-31 16:53:58 +01:00 committed by GitHub
commit fed9bb2a32
No known key found for this signature in database
GPG Key ID: 4AEE18F83AFDEB23
8 changed files with 47 additions and 230 deletions

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PRECOMPS_INCLUDE_HEADERS_FROM_BUILT_PRODUCTS_DIR = NO;
PRODUCT_BUNDLE_IDENTIFIER = net.cebix.basilisk;
PRODUCT_NAME = "$(TARGET_NAME)";
@ -1533,38 +1389,6 @@
};
name = Release;
};
E47303BB235743B900A68BC2 /* Debug */ = {
isa = XCBuildConfiguration;
buildSettings = {
CLANG_CXX_LIBRARY = "libc++";
GCC_WARN_INHIBIT_ALL_WARNINGS = YES;
PRODUCT_NAME = "$(TARGET_NAME)";
};
name = Debug;
};
E47303BC235743B900A68BC2 /* Release */ = {
isa = XCBuildConfiguration;
buildSettings = {
CLANG_CXX_LIBRARY = "libc++";
GCC_WARN_INHIBIT_ALL_WARNINGS = YES;
PRODUCT_NAME = "$(TARGET_NAME)";
};
name = Release;
};
E47303C2235743E200A68BC2 /* Debug */ = {
isa = XCBuildConfiguration;
buildSettings = {
PRODUCT_NAME = "$(TARGET_NAME)";
};
name = Debug;
};
E47303C3235743E200A68BC2 /* Release */ = {
isa = XCBuildConfiguration;
buildSettings = {
PRODUCT_NAME = "$(TARGET_NAME)";
};
name = Release;
};
/* End XCBuildConfiguration section */
/* Begin XCConfigurationList section */
@ -1622,24 +1446,6 @@
defaultConfigurationIsVisible = 0;
defaultConfigurationName = Release;
};
E47303BA235743B900A68BC2 /* Build configuration list for PBXNativeTarget "gencomp" */ = {
isa = XCConfigurationList;
buildConfigurations = (
E47303BB235743B900A68BC2 /* Debug */,
E47303BC235743B900A68BC2 /* Release */,
);
defaultConfigurationIsVisible = 0;
defaultConfigurationName = Release;
};
E47303C1235743E200A68BC2 /* Build configuration list for PBXLegacyTarget "run_gencomp" */ = {
isa = XCConfigurationList;
buildConfigurations = (
E47303C2235743E200A68BC2 /* Debug */,
E47303C3235743E200A68BC2 /* Release */,
);
defaultConfigurationIsVisible = 0;
defaultConfigurationName = Release;
};
/* End XCConfigurationList section */
};
rootObject = 7539DFAA1F23B17E006B2DF2 /* Project object */;

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@ -815,11 +815,6 @@
<inttypes.h> don't define. */
/* #undef uintmax_t */
#define DIRECT_ADDRESSING 1
#define USE_JIT 1
#define USE_JIT_FPU
#define X86_64_ASSEMBLY
#define OPTIMIZED_FLAGS
#define FPU_IEEE
#define VIDEO_ROOTLESS

View File

@ -1,6 +1,6 @@
#### BasiliskII
```
macOS 64-bit JIT
macOS 64-bit ---
Linux 32-bit JIT
MinGW 32-bit JIT
```
@ -16,6 +16,7 @@ These builds need to be installed SDL2.0.10+ framework/library.
##### macOS
1. Open BasiliskII/src/MacOSX/BasiliskII.xcodeproj
1. Set Build Configuration to Release
1. If building with Xcode10+, set File -> Project Settings -> Build System to Legacy Build System.
1. Build
##### Linux(x86)

View File

@ -57,6 +57,8 @@ template void powerpc_cpu::execute_fp_arith<double, op_fnmadds, operand_fp_RD, o
template void powerpc_cpu::execute_fp_arith<double, op_fnmsub, operand_fp_RD, operand_fp_RA, operand_fp_RC, operand_fp_RB, RC_BIT_G, true>(uint32);
template void powerpc_cpu::execute_fp_arith<double, op_fnmsubs, operand_fp_RD, operand_fp_RA, operand_fp_RC, operand_fp_RB, RC_BIT_G, true>(uint32);
template void powerpc_cpu::execute_fp_round<RC_BIT_G>(uint32);
template void powerpc_cpu::execute_fp_arith<double, op_fres, operand_fp_RD, operand_fp_RB, operand_fp_NONE, operand_fp_NONE, RC_BIT_G, true>(uint32);
template void powerpc_cpu::execute_fp_arith<double, op_frsqrte, operand_fp_RD, operand_fp_RB, operand_fp_NONE, operand_fp_NONE, RC_BIT_G, true>(uint32);
template void powerpc_cpu::execute_fp_arith<double, op_fsel, operand_fp_RD, operand_fp_RA, operand_fp_RC, operand_fp_RB, RC_BIT_G, false>(uint32);
template void powerpc_cpu::execute_fp_arith<double, op_fsub, operand_fp_RD, operand_fp_RA, operand_fp_RB, operand_fp_NONE, RC_BIT_G, true>(uint32);
template void powerpc_cpu::execute_fp_arith<float, op_fsub, operand_fp_RD, operand_fp_RA, operand_fp_RB, operand_fp_NONE, RC_BIT_G, true>(uint32);
@ -258,7 +260,7 @@ template void powerpc_cpu::execute_vector_arith<op_frsiz, operand_vD_V4SF, opera
template void powerpc_cpu::execute_vector_arith<op_vrl<uint8>, operand_vD_V16QI, operand_vA_V16QI, operand_vB_V16QI, operand_vC_NONE, fake_bit_field< bool, false >, 0 >(uint32);
template void powerpc_cpu::execute_vector_arith<op_vrl<uint16>, operand_vD_V8HI, operand_vA_V8HI, operand_vB_V8HI, operand_vC_NONE, fake_bit_field< bool, false >, 0 >(uint32);
template void powerpc_cpu::execute_vector_arith<op_vrl<uint32>, operand_vD_V4SI, operand_vA_V4SI, operand_vB_V4SI, operand_vC_NONE, fake_bit_field< bool, false >, 0 >(uint32);
template void powerpc_cpu::execute_vector_arith<op_frsqrt, operand_vD_V4SF, operand_vA_NONE, operand_vB_V4SF, operand_vC_NONE, fake_bit_field< bool, false >, 0 >(uint32);
template void powerpc_cpu::execute_vector_arith<op_frsqrte, operand_vD_V4SF, operand_vA_NONE, operand_vB_V4SF, operand_vC_NONE, fake_bit_field< bool, false >, 0 >(uint32);
template void powerpc_cpu::execute_vector_arith<op_vsel, operand_vD_V4SI, operand_vA_V4SI, operand_vB_V4SI, operand_vC_V4SI, fake_bit_field< bool, false >, 0 >(uint32);
template void powerpc_cpu::execute_vector_shift<-1>(uint32);
template void powerpc_cpu::execute_vector_arith<op_vsl<uint8>, operand_vD_V16QI, operand_vA_V16QI, operand_vB_V16QI, operand_vC_NONE, fake_bit_field< bool, false >, 0 >(uint32);

View File

@ -470,11 +470,21 @@ const powerpc_cpu::instr_info_t powerpc_cpu::powerpc_ii_table[] = {
PPC_I(FNMSUBS),
A_form, 59, 30, CFLOW_NORMAL
},
{ "fres",
EXECUTE_FP_ARITH(double, fres, RD, RB, NONE, NONE, RC_BIT_G, true),
PPC_I(FRES),
A_form, 59, 24, CFLOW_NORMAL
},
{ "frsp",
EXECUTE_1(fp_round, RC_BIT_G),
PPC_I(FRSP),
X_form, 63, 12, CFLOW_NORMAL
},
{ "frsqrte",
EXECUTE_FP_ARITH(double, frsqrte, RD, RB, NONE, NONE, RC_BIT_G, true),
PPC_I(FRSQRTE),
A_form, 63, 26, CFLOW_NORMAL
},
{ "fsel",
EXECUTE_FP_ARITH(double, fsel, RD, RA, RC, RB, RC_BIT_G, false),
PPC_I(FSEL),
@ -1551,7 +1561,7 @@ const powerpc_cpu::instr_info_t powerpc_cpu::powerpc_ii_table[] = {
VX_form, 4, 132, CFLOW_NORMAL
},
{ "vrsqrtefp",
EXECUTE_VECTOR_ARITH(frsqrt, V4SF, NONE, V4SF, NONE),
EXECUTE_VECTOR_ARITH(frsqrte, V4SF, NONE, V4SF, NONE),
PPC_I(VRSQRTEFP),
VX_form, 4, 330, CFLOW_NORMAL
},

View File

@ -481,6 +481,7 @@ DEFINE_OP(fmov_FD_F2, FD_dw = F2_dw);
DEFINE_OP(fabs_FD_F0, FD = do_fabs(F0));
DEFINE_OP(fneg_FD_F0, FD = do_fneg(F0));
DEFINE_OP(fnabs_FD_F0, FD = do_fnabs(F0));
DEFINE_OP(frsqrte_FD_F0, FD = do_frsqrte(F0));
DEFINE_OP(fadd_FD_F0_F1, FD = do_fadd(F0, F1));
DEFINE_OP(fsub_FD_F0_F1, FD = do_fsub(F0, F1));

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@ -99,7 +99,9 @@ enum powerpc_instruction {
PPC_I(FNMADDS),
PPC_I(FNMSUB),
PPC_I(FNMSUBS),
PPC_I(FRES),
PPC_I(FRSP),
PPC_I(FRSQRTE),
PPC_I(FSEL),
PPC_I(FSUB),
PPC_I(FSUBS),

View File

@ -153,7 +153,7 @@ DEFINE_OP2(fsubs, float, x - y);
DEFINE_OP1(exp2, float, exp2f(x));
DEFINE_OP1(log2, float, log2f(x));
DEFINE_OP1(fres, float, 1 / x);
DEFINE_OP1(frsqrt, float, 1 / sqrt(x));
DEFINE_OP1(frsqrte, float, 1 / sqrt(x));
DEFINE_OP1(frsim, float, floorf(x));
DEFINE_OP1(frsin, float, roundf(x));
DEFINE_OP1(frsip, float, ceilf(x));