gbeauche
69d3fcba95
Update for new instr_info_t format
2007-01-17 06:56:09 +00:00
gbeauche
5b0b60da76
Remove specialised decoders. This will be done differently, if necessary.
2007-01-17 06:20:36 +00:00
gbeauche
e4af8a1909
Report SSSE3 instead of SSE4 (to be released later).
2007-01-15 07:00:16 +00:00
gbeauche
3c100abdb2
Fix CMOV emulation on x86_64 in case the CPU doesn't support that instruction
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(which is very unlikely).
2007-01-14 13:23:36 +00:00
gbeauche
8d2f2a335b
The older code generator is now deprecated on x86-32 too.
2007-01-14 13:07:22 +00:00
gbeauche
1f2e561a6f
Use SAHF_SETO_PROFITABLE wherever possible on x86-64, it's faster. This can't
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be the default because some very ancient CPUs don't support LAHF in long mode
2007-01-14 12:23:29 +00:00
gbeauche
2e95c43bf2
Remove the 33-bit addressing hack as it's overly complex for not much gain.
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Rather, use an address override prefix (0x67) though Intel Core optimization
reference guide says to avoid LCP prefixes. In practise, impact on performance
is measurably marginal on e.g. Speedometer tests.
2007-01-13 18:21:30 +00:00
gbeauche
9e252b413e
Fix 64-bit builds in REAL_ADDRESSING mode with gcc4.1.
2007-01-13 17:21:08 +00:00
gbeauche
9dfecc4279
Update CPU table to kernel 2.6.17+ code (POWER6, Cell, PA6T). Fix detection
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of the CPU string (separator is actually ','). Fix detection of CPU clock
frequency when it is expressed as a float.
2006-10-26 05:25:19 +00:00
nigel
a8e7114df2
Do'h. Checked in and shipped a DEBUG=1. Thanks to Steve Green for his fast eyes.
2006-08-01 03:31:46 +00:00
nigel
9a3097705d
Clarify CD insertion state, add widescreen suggestion
2006-07-31 11:10:59 +00:00
nigel
1b25d07fd6
Final doco changes before a new release
2006-07-31 10:51:24 +00:00
nigel
acb3384366
Sound done, VOSF pointless, Cut/paste half working, CD insert
2006-07-31 10:10:48 +00:00
nigel
9e9e20325e
Use Gwenole's clip_macosx.cpp instead of the dummy version
2006-07-31 08:52:33 +00:00
nigel
ecf2403c46
ether_unix.cpp somehow pulls something in that needs mem_banks.
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If it isn't compiled in this directory, the wrong config.h is used.
2006-07-31 08:47:52 +00:00
gbeauche
954593d1c0
Generate spcflags checks at the start of the block. This makes better
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opportunities when CR cache is implemented.
2006-07-30 16:29:10 +00:00
gbeauche
bcf7f9a2cd
Add throw() specs for Linux glibc platforms
2006-07-30 09:49:21 +00:00
nigel
1dad46a8ad
Project file updates for the new audio source files.
2006-07-29 02:24:15 +00:00
nigel
c68e5d916d
Working audio output by Daniel Sumorok.
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Not quite the way I wanted to do it but it will do for now.
(on a real Mac, the real audio hardware should be able to pull/grab the data
from our buffers - an extra thread with its own set of buffers is wasteful!)
2006-07-28 13:42:29 +00:00
nigel
938c61485c
Resync with latest src/Unix/configure.ac
2006-07-28 13:28:54 +00:00
nigel
3e21f0377b
Giving up on the Objective-C version, also need to remove it from the makefile
2006-07-28 13:18:12 +00:00
nigel
f44d37bac8
Working audio output by Daniel Sumorok.
...
Not quite the way I wanted to do it but it will do for now.
(on a real Mac, the real audio hardware should be able to pull/grab the data
from our buffers - an extra thread with its own set of buffers is wasteful!)
2006-07-28 13:15:18 +00:00
gbeauche
7af6665619
icc9.1 & gcc4.1 warning fixes
2006-07-23 10:20:23 +00:00
gbeauche
2c27914196
Fix op_record_cr6_VD() to use less branches (gcc 4.1.2 build fix on x86-32)
2006-07-19 22:21:46 +00:00
gbeauche
87e1518e96
A few fixlets to the SIGSEGV library:
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- Don't export transfer types definitions (formerly used by older API)
- Handle ADD instructions in ix86_skip_instruction() (generated by icc 9.1)
- Use "%p" format for EIP/RIP addresses
2006-07-19 21:31:10 +00:00
gbeauche
d1d7d5bd4c
Fix remove_shm_range() to actually return something
2006-07-19 21:23:41 +00:00
gbeauche
f39c252fbd
Fix 33-bit addressing mode check when compiling with icc 9.1
2006-07-19 21:22:41 +00:00
gbeauche
874bab017c
Fix for parallel build (make -j20 here)
2006-07-19 06:00:26 +00:00
gbeauche
7705f85655
Add missing implementations for VAVGUB & VAVGUH. Optimize VSEL too.
2006-07-17 21:47:18 +00:00
gbeauche
07bf6fe6c1
Fix typo for ANDPS, ANDPD, ANDSS, ANDSD
2006-07-17 21:46:15 +00:00
gbeauche
a23f846bec
symlink codegen_x86.h
2006-07-17 07:43:54 +00:00
gbeauche
c8a273332f
Fix for 32-bit x86, was generating setcc CC,%dh instead of %dl.
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i.e. force use of ecx & edx -- though it was fine in 64-bit mode, of course
2006-07-17 07:34:33 +00:00
gbeauche
e07e2196e3
Use new code generator. The gain is only 10%, bottlenecks are elsewhere.
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Optimize Altivec vector splat instructions after Agner's guide.
2006-07-17 06:56:38 +00:00
gbeauche
ceb43ce19a
Define global XMM registers for SIMD & FPU (64-bit mode)
2006-07-17 06:52:13 +00:00
gbeauche
4e624209d3
Add new code generator for testing purposes (i386, x86_64) -- It's to be
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used for mid-level optimizations
2006-07-17 06:49:07 +00:00
gbeauche
c306dfc4fd
Make VSCR an uint32, don't bother splitting it into NJ, SAT values since
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the gain is almost nil and actually hurts performance in JIT mode.
2006-07-17 06:46:56 +00:00
gbeauche
53f79caf8c
Add LEALQmr, EMMS, SSE CMP and a series of new SSE opcodes (auto-generated)
2006-07-17 04:07:41 +00:00
gbeauche
cc12787047
Prepare for new code generator and mid-level optimizations.
2006-07-16 12:47:38 +00:00
gbeauche
7cfee5a2be
Move processor capability information to utils-cpuinfo.[ch]hpp. Add new
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utils-sentinel.hpp for helper functions to be called at program initialization
and termination.
2006-07-16 12:28:01 +00:00
gbeauche
9bc307c3fd
Fix for new code generator -- FIXME: backend macros should be enabled only
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in ppc-jit.cpp (e.g. define a new ENABLE_JIT_TARGET_ASM macro?)
2006-07-16 12:23:03 +00:00
gbeauche
6113436ea4
Remove obsolete code (HAVE_STATIC_DATA_EXEC).
2006-07-16 12:18:59 +00:00
gbeauche
a2e0cc10c0
forgot to commit this __op_PARAM? change
2006-07-16 12:09:40 +00:00
gbeauche
9e64c3af94
Add more SSE templates for new SheepShaver's code generator -- though it
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should be made independent of this file.
2006-07-14 16:53:48 +00:00
gbeauche
b4768fc62c
Run-time assembler fixes:
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- Check for RIP register only in 64-bit mode
- Add missing macros and arguments (BT*im)
- MOVSWQ/MOVZWQ are 64-bit mode instructions only
2006-07-14 09:09:12 +00:00
gbeauche
5d7ef13a9c
Fix gen_op_invoke*() for 64-bit offsets on x86-64. Drop CPUPARAM since it's
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now cached to a host register.
2006-07-09 15:19:32 +00:00
gbeauche
a5296875f1
Optimize alignment routine for x86 & x86_64.
2006-07-09 15:18:08 +00:00
gbeauche
d75a91497d
Fix debugging of generated code to include the block chainer trampoline.
2006-07-09 15:17:15 +00:00
gbeauche
7d5898f97a
Some minor optimizations: xchg (unused), movdqa in sse2 code.
2006-07-09 12:19:50 +00:00
gbeauche
abc911eaa7
Remove use of global register A0 (now aliased to T0). This makes it possible
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to cache the CPU context pointer to a register and thus rendering generated
code CPU context independent. Not useful to SheepShaver, but it is for
another project for threads emulation on plain x86-32.
Note: AltiVec performance may drop a little on x86 but this will be restored
(and even improved) in the future.
2006-07-09 12:15:48 +00:00
gbeauche
d0a64733ef
Use -fno-align-functions to really disable function alignment (a value of 0
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used the default alignment, e.g. 16 bytes on x86_64). This is purely cosmetics
and only helps reading the resulting disassembly.
2006-07-06 00:07:47 +00:00
