889 lines
16 KiB
ArmAsm
889 lines
16 KiB
ArmAsm
/*
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* asm_linux.S - Assembly routines
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*
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* SheepShaver (C) 1997-2002 Christian Bauer and Marc Hellwig
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include <ppc_asm.tmpl>
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#include <xlowmem.h>
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#define SAVE_FP_EXEC_68K 1
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/*
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* void *get_toc(void) - Get TOC pointer (small data pointer r13 under Linux)
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*/
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.globl get_toc
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get_toc:
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mr r3,r13
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blr
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/*
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* void *get_sp(void) - Get stack pointer
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*/
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.globl get_sp
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get_sp:
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mr r3,r1
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blr
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/*
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* void set_r2(uint32 val {r3}) - Set r2
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*/
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.globl set_r2
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set_r2:
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mr r2,r3
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blr
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/*
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* void flush_icache_range(void *start {r3}, void *end {r3}) - Flush D and I cache
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*/
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CACHE_LINE_SIZE = 32
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LG_CACHE_LINE_SIZE = 5
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.globl flush_icache_range
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flush_icache_range:
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li r5,CACHE_LINE_SIZE-1
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andc r3,r3,r5
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subf r4,r3,r4
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add r4,r4,r5
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srwi. r4,r4,LG_CACHE_LINE_SIZE
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beqlr
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mtctr r4
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mr r6,r3
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1: dcbst 0,r3
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addi r3,r3,CACHE_LINE_SIZE
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bdnz 1b
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sync /* wait for dcbst's to get to ram */
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mtctr r4
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2: icbi 0,r6
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addi r6,r6,CACHE_LINE_SIZE
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bdnz 2b
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sync
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isync
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blr
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/*
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* long atomic_add(long *var{r3}, long add{r4}) - Atomic add operation
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* long atomic_and(long *var{r3}, long and{r4}) - Atomic and operation
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* long atomic_or(long *var{r3}, long or{r4}) - Atomic or operation
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* int test_and_set(int *var{r3}, int val{r4}) - Atomic test-and-set
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*/
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.globl atomic_add
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atomic_add:
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10: dcbf r0,r3
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sync
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ori r0,r0,1
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ori r0,r0,1
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ori r0,r0,1
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ori r0,r0,1
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ori r0,r0,1
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ori r0,r0,1
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isync
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lwarx r5,r0,r3
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add r0,r4,r5
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stwcx. r0,r0,r3
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bne- 10b
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mr r3,r5
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isync
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blr
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.globl atomic_and
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atomic_and:
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10: dcbf r0,r3
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sync
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ori r0,r0,1
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ori r0,r0,1
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ori r0,r0,1
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ori r0,r0,1
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ori r0,r0,1
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ori r0,r0,1
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isync
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lwarx r5,r0,r3
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and r0,r4,r5
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stwcx. r0,r0,r3
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bne- 10b
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mr r3,r5
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isync
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blr
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.globl atomic_or
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atomic_or:
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10: dcbf r0,r3
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sync
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ori r0,r0,1
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ori r0,r0,1
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ori r0,r0,1
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ori r0,r0,1
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ori r0,r0,1
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ori r0,r0,1
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isync
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lwarx r5,r0,r3
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or r0,r4,r5
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stwcx. r0,r0,r3
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bne- 10b
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mr r3,r5
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isync
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blr
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.globl test_and_set
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test_and_set:
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10: dcbf r0,r3
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sync
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ori r0,r0,1
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ori r0,r0,1
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ori r0,r0,1
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ori r0,r0,1
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ori r0,r0,1
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ori r0,r0,1
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isync
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lwarx r5,r0,r3
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cmpi 0,r5,0x0000
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beq 1f
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stwcx. r4,r0,r3
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bne- 10b
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1: isync
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mr r3,r5
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blr
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/*
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* void quit_emulator(void) - Jump to XLM_EMUL_RETURN_PROC
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*/
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.globl quit_emulator
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quit_emulator:
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lwz r0,XLM_EMUL_RETURN_PROC(r0)
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mtlr r0
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blr
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/*
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* void jump_to_rom(uint32 entry {r3}, uint32 emulator_data {r4}) - Jump to Mac ROM
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*/
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.globl jump_to_rom
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jump_to_rom:
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// Create stack frame
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mflr r0
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stw r0,4(r1)
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stwu r1,-(20+19*4+18*8)(r1) // maintain 16 byte alignment
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// Save PowerPC registers
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stmw r13,20(r1)
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stfd f14,20+19*4+0*8(r1)
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stfd f15,20+19*4+1*8(r1)
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stfd f16,20+19*4+2*8(r1)
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stfd f17,20+19*4+3*8(r1)
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stfd f18,20+19*4+4*8(r1)
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stfd f19,20+19*4+5*8(r1)
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stfd f20,20+19*4+6*8(r1)
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stfd f21,20+19*4+7*8(r1)
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stfd f22,20+19*4+8*8(r1)
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stfd f23,20+19*4+9*8(r1)
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stfd f24,20+19*4+10*8(r1)
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stfd f25,20+19*4+11*8(r1)
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stfd f26,20+19*4+12*8(r1)
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stfd f27,20+19*4+13*8(r1)
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stfd f28,20+19*4+14*8(r1)
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stfd f29,20+19*4+15*8(r1)
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stfd f30,20+19*4+16*8(r1)
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stfd f31,20+19*4+17*8(r1)
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// Move entry address to ctr
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mtctr r3
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// Skip over EMUL_RETURN routine and get its address
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bl 1f
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/*
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* EMUL_RETURN: Returned from emulator
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*/
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// Restore PowerPC registers
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lwz r1,XLM_EMUL_RETURN_STACK(r0)
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lmw r13,20(r1)
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lfd f14,20+19*4+0*8(r1)
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lfd f15,20+19*4+1*8(r1)
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lfd f16,20+19*4+2*8(r1)
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lfd f17,20+19*4+3*8(r1)
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lfd f18,20+19*4+4*8(r1)
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lfd f19,20+19*4+5*8(r1)
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lfd f20,20+19*4+6*8(r1)
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lfd f21,20+19*4+7*8(r1)
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lfd f22,20+19*4+8*8(r1)
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lfd f23,20+19*4+9*8(r1)
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lfd f24,20+19*4+10*8(r1)
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lfd f25,20+19*4+11*8(r1)
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lfd f26,20+19*4+12*8(r1)
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lfd f27,20+19*4+13*8(r1)
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lfd f28,20+19*4+14*8(r1)
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lfd f29,20+19*4+15*8(r1)
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lfd f30,20+19*4+16*8(r1)
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lfd f31,20+19*4+17*8(r1)
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// Exiting from 68k emulator
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li r0,1
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stw r0,XLM_IRQ_NEST(r0)
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li r0,MODE_NATIVE
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stw r0,XLM_RUN_MODE(r0)
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// Return to caller of jump_to_rom()
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lwz r0,20+19*4+18*8+4(r1)
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mtlr r0
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addi r1,r1,20+19*4+18*8
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blr
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// Save address of EMUL_RETURN routine for 68k emulator patch
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1: mflr r0
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stw r0,XLM_EMUL_RETURN_PROC(r0)
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// Skip over EXEC_RETURN routine and get its address
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bl 2f
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/*
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* EXEC_RETURN: Returned from 68k routine executed with Execute68k()
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*/
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// Save r25 (contains current 68k interrupt level)
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stw r25,XLM_68K_R25(r0)
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// Reentering EMUL_OP mode
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li r0,MODE_EMUL_OP
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stw r0,XLM_RUN_MODE(r0)
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// Save 68k registers
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lwz r4,48(r1) // Pointer to M68kRegisters
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stw r8,0*4(r4) // d[0]...d[7]
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stw r9,1*4(r4)
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stw r10,2*4(r4)
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stw r11,3*4(r4)
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stw r12,4*4(r4)
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stw r13,5*4(r4)
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stw r14,6*4(r4)
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stw r15,7*4(r4)
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stw r16,8*4(r4) // a[0]..a[6]
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stw r17,9*4(r4)
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stw r18,10*4(r4)
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stw r19,11*4(r4)
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stw r20,12*4(r4)
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stw r21,13*4(r4)
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stw r22,14*4(r4)
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// Restore PowerPC registers
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lmw r13,56(r1)
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#if SAVE_FP_EXEC_68K
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lfd f14,56+19*4+0*8(r1)
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lfd f15,56+19*4+1*8(r1)
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lfd f16,56+19*4+2*8(r1)
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lfd f17,56+19*4+3*8(r1)
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lfd f18,56+19*4+4*8(r1)
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lfd f19,56+19*4+5*8(r1)
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lfd f20,56+19*4+6*8(r1)
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lfd f21,56+19*4+7*8(r1)
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lfd f22,56+19*4+8*8(r1)
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lfd f23,56+19*4+9*8(r1)
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lfd f24,56+19*4+10*8(r1)
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lfd f25,56+19*4+11*8(r1)
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lfd f26,56+19*4+12*8(r1)
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lfd f27,56+19*4+13*8(r1)
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lfd f28,56+19*4+14*8(r1)
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lfd f29,56+19*4+15*8(r1)
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lfd f30,56+19*4+16*8(r1)
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lfd f31,56+19*4+17*8(r1)
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#endif
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// Return to caller
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lwz r0,52(r1)
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mtcrf 0xff,r0
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lwz r0,56+19*4+18*8+4(r1)
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mtlr r0
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addi r1,r1,56+19*4+18*8
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blr
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// Save address of EXEC_RETURN routine for 68k emulator patch
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2: mflr r0
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stw r0,XLM_EXEC_RETURN_PROC(r0)
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// Skip over EMUL_BREAK/EMUL_OP routine and get its address
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bl 3f
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/*
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* EMUL_BREAK/EMUL_OP: Execute native routine, selector in r5 (my own private mode switch)
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*
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* 68k registers are stored in a M68kRegisters struct on the stack
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* which the native routine may read and modify
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*/
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// Save r25 (contains current 68k interrupt level)
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stw r25,XLM_68K_R25(r0)
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// Entering EMUL_OP mode within 68k emulator
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li r0,MODE_EMUL_OP
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stw r0,XLM_RUN_MODE(r0)
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// Create PowerPC stack frame, reserve space for M68kRegisters
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mr r3,r1
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subi r1,r1,64 // Fake "caller" frame
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rlwinm r1,r1,0,0,27 // Align stack
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mfcr r0
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rlwinm r0,r0,0,11,8
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stw r0,4(r1)
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mfxer r0
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stw r0,16(r1)
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stw r2,12(r1)
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stwu r1,-(8+16*4+15*8)(r1)
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// Save 68k registers (M68kRegisters)
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stw r8,8+0*4(r1) // d[0]..d[7]
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stw r9,8+1*4(r1)
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stw r10,8+2*4(r1)
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stw r11,8+3*4(r1)
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stw r12,8+4*4(r1)
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stw r13,8+5*4(r1)
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stw r14,8+6*4(r1)
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stw r15,8+7*4(r1)
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stw r16,8+8*4(r1) // a[0]..a[7]
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stw r17,8+9*4(r1)
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stw r18,8+10*4(r1)
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stw r19,8+11*4(r1)
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stw r20,8+12*4(r1)
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stw r21,8+13*4(r1)
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stw r22,8+14*4(r1)
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stw r3,8+15*4(r1)
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stfd f0,8+16*4+0*8(r1)
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stfd f1,8+16*4+1*8(r1)
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stfd f2,8+16*4+2*8(r1)
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stfd f3,8+16*4+3*8(r1)
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stfd f4,8+16*4+4*8(r1)
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stfd f5,8+16*4+5*8(r1)
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stfd f6,8+16*4+6*8(r1)
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stfd f7,8+16*4+7*8(r1)
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mffs f0
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stfd f8,8+16*4+8*8(r1)
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stfd f9,8+16*4+9*8(r1)
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stfd f10,8+16*4+10*8(r1)
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stfd f11,8+16*4+11*8(r1)
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stfd f12,8+16*4+12*8(r1)
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stfd f13,8+16*4+13*8(r1)
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stfd f0,8+16*4+14*8(r1)
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// Execute native routine
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lwz r13,XLM_TOC(r0)
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addi r3,r1,8
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mr r4,r24
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bl EmulOp__FP13M68kRegistersUii
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// Restore 68k registers (M68kRegisters)
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lwz r8,8+0*4(r1) // d[0]..d[7]
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lwz r9,8+1*4(r1)
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lwz r10,8+2*4(r1)
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lwz r11,8+3*4(r1)
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lwz r12,8+4*4(r1)
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lwz r13,8+5*4(r1)
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lwz r14,8+6*4(r1)
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lwz r15,8+7*4(r1)
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lwz r16,8+8*4(r1) // a[0]..a[7]
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lwz r17,8+9*4(r1)
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lwz r18,8+10*4(r1)
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lwz r19,8+11*4(r1)
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lwz r20,8+12*4(r1)
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lwz r21,8+13*4(r1)
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lwz r22,8+14*4(r1)
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lwz r3,8+15*4(r1)
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lfd f13,8+16*4+14*8(r1)
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lfd f0,8+16*4+0*8(r1)
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lfd f1,8+16*4+1*8(r1)
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lfd f2,8+16*4+2*8(r1)
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lfd f3,8+16*4+3*8(r1)
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lfd f4,8+16*4+4*8(r1)
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lfd f5,8+16*4+5*8(r1)
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lfd f6,8+16*4+6*8(r1)
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lfd f7,8+16*4+7*8(r1)
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mtfsf 0xff,f13
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lfd f8,8+16*4+8*8(r1)
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lfd f9,8+16*4+9*8(r1)
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lfd f10,8+16*4+10*8(r1)
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lfd f11,8+16*4+11*8(r1)
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lfd f12,8+16*4+12*8(r1)
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lfd f13,8+16*4+13*8(r1)
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// Delete PowerPC stack frame
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lwz r2,8+16*4+15*8+12(r1)
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lwz r0,8+16*4+15*8+16(r1)
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mtxer r0
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lwz r0,8+16*4+15*8+4(r1)
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mtcrf 0xff,r0
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mr r1,r3
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// Reentering 68k emulator
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li r0,MODE_68K
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stw r0,XLM_RUN_MODE(r0)
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// Set r0 to 0 for 68k emulator
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li r0,0
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// Execute next 68k opcode
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rlwimi r29,r27,3,13,28
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lhau r27,2(r24)
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mtlr r29
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blr
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// Save address of EMUL_BREAK/EMUL_OP routine for 68k emulator patch
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3: mflr r0
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stw r0,XLM_EMUL_OP_PROC(r0)
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// Save stack pointer for EMUL_RETURN
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stw r1,XLM_EMUL_RETURN_STACK(r0)
|
|
|
|
// Preset registers for ROM boot routine
|
|
lis r3,0x40b0 // Pointer to ROM boot structure
|
|
ori r3,r3,0xd000
|
|
|
|
// 68k emulator is now active
|
|
li r0,MODE_68K
|
|
stw r0,XLM_RUN_MODE(r0)
|
|
|
|
// Jump to ROM
|
|
bctr
|
|
|
|
|
|
/*
|
|
* void execute_68k(uint32 pc {r3}, M68kRegisters *r {r4}) - Execute 68k routine
|
|
*/
|
|
|
|
.globl execute_68k
|
|
execute_68k:
|
|
// Create MacOS stack frame
|
|
mflr r0
|
|
stw r0,4(r1)
|
|
stwu r1,-(56+19*4+18*8)(r1)
|
|
mfcr r0
|
|
stw r4,48(r1) // save pointer to M68kRegisters for EXEC_RETURN
|
|
stw r0,52(r1) // save CR
|
|
|
|
// Save PowerPC registers
|
|
stmw r13,56(r1)
|
|
#if SAVE_FP_EXEC_68K
|
|
stfd f14,56+19*4+0*8(r1)
|
|
stfd f15,56+19*4+1*8(r1)
|
|
stfd f16,56+19*4+2*8(r1)
|
|
stfd f17,56+19*4+3*8(r1)
|
|
stfd f18,56+19*4+4*8(r1)
|
|
stfd f19,56+19*4+5*8(r1)
|
|
stfd f20,56+19*4+6*8(r1)
|
|
stfd f21,56+19*4+7*8(r1)
|
|
stfd f22,56+19*4+8*8(r1)
|
|
stfd f23,56+19*4+9*8(r1)
|
|
stfd f24,56+19*4+10*8(r1)
|
|
stfd f25,56+19*4+11*8(r1)
|
|
stfd f26,56+19*4+12*8(r1)
|
|
stfd f27,56+19*4+13*8(r1)
|
|
stfd f28,56+19*4+14*8(r1)
|
|
stfd f29,56+19*4+15*8(r1)
|
|
stfd f30,56+19*4+16*8(r1)
|
|
stfd f31,56+19*4+17*8(r1)
|
|
#endif
|
|
|
|
// Set up registers for 68k emulator
|
|
lwz r31,XLM_KERNEL_DATA(r0) // Pointer to Kernel Data
|
|
addi r31,r31,0x1000
|
|
li r0,0
|
|
mtcrf 0xff,r0
|
|
creqv 11,11,11 // Supervisor mode
|
|
lwz r8,0*4(r4) // d[0]..d[7]
|
|
lwz r9,1*4(r4)
|
|
lwz r10,2*4(r4)
|
|
lwz r11,3*4(r4)
|
|
lwz r12,4*4(r4)
|
|
lwz r13,5*4(r4)
|
|
lwz r14,6*4(r4)
|
|
lwz r15,7*4(r4)
|
|
lwz r16,8*4(r4) // a[0]..a[6]
|
|
lwz r17,9*4(r4)
|
|
lwz r18,10*4(r4)
|
|
lwz r19,11*4(r4)
|
|
lwz r20,12*4(r4)
|
|
lwz r21,13*4(r4)
|
|
lwz r22,14*4(r4)
|
|
li r23,0
|
|
mr r24,r3
|
|
lwz r25,XLM_68K_R25(r0) // MSB of SR
|
|
li r26,0
|
|
li r28,0 // VBR
|
|
lwz r29,0x74(r31) // Pointer to opcode table
|
|
lwz r30,0x78(r31) // Address of emulator
|
|
|
|
// Push return address (points to EXEC_RETURN opcode) on stack
|
|
li r0,XLM_EXEC_RETURN_OPCODE
|
|
stwu r0,-4(r1)
|
|
|
|
// Reentering 68k emulator
|
|
li r0,MODE_68K
|
|
stw r0,XLM_RUN_MODE(r0)
|
|
|
|
// Set r0 to 0 for 68k emulator
|
|
li r0,0
|
|
|
|
// Execute 68k opcode
|
|
lha r27,0(r24)
|
|
rlwimi r29,r27,3,13,28
|
|
lhau r27,2(r24)
|
|
mtlr r29
|
|
blr
|
|
|
|
|
|
/*
|
|
* uint32 call_macos1(uint32 tvect{r3}, uint32 arg1{r4}) ... - Call MacOS routines
|
|
*/
|
|
|
|
#define prolog \
|
|
mflr r0; \
|
|
stw r0,4(r1); \
|
|
stwu r1,-64(r1)
|
|
|
|
#define epilog \
|
|
lwz r13,XLM_TOC(r0);\
|
|
lwz r0,64+4(r1); \
|
|
mtlr r0; \
|
|
addi r1,r1,64; \
|
|
blr
|
|
|
|
.globl call_macos
|
|
call_macos:
|
|
prolog
|
|
lwz r0,0(r3) // Get routine address
|
|
lwz r2,4(r3) // Load TOC pointer
|
|
mtctr r0
|
|
bctrl
|
|
epilog
|
|
|
|
.globl call_macos1
|
|
call_macos1:
|
|
prolog
|
|
lwz r0,0(r3) // Get routine address
|
|
lwz r2,4(r3) // Load TOC pointer
|
|
mtctr r0
|
|
mr r3,r4
|
|
bctrl
|
|
epilog
|
|
|
|
.globl call_macos2
|
|
call_macos2:
|
|
prolog
|
|
lwz r0,0(r3) // Get routine address
|
|
lwz r2,4(r3) // Load TOC pointer
|
|
mtctr r0
|
|
mr r3,r4
|
|
mr r4,r5
|
|
bctrl
|
|
epilog
|
|
|
|
.globl call_macos3
|
|
call_macos3:
|
|
prolog
|
|
lwz r0,0(r3) // Get routine address
|
|
lwz r2,4(r3) // Load TOC pointer
|
|
mtctr r0
|
|
mr r3,r4
|
|
mr r4,r5
|
|
mr r5,r6
|
|
bctrl
|
|
epilog
|
|
|
|
.globl call_macos4
|
|
call_macos4:
|
|
prolog
|
|
lwz r0,0(r3) // Get routine address
|
|
lwz r2,4(r3) // Load TOC pointer
|
|
mtctr r0
|
|
mr r3,r4
|
|
mr r4,r5
|
|
mr r5,r6
|
|
mr r6,r7
|
|
bctrl
|
|
epilog
|
|
|
|
.globl call_macos5
|
|
call_macos5:
|
|
prolog
|
|
lwz r0,0(r3) // Get routine address
|
|
lwz r2,4(r3) // Load TOC pointer
|
|
mtctr r0
|
|
mr r3,r4
|
|
mr r4,r5
|
|
mr r5,r6
|
|
mr r6,r7
|
|
mr r7,r8
|
|
bctrl
|
|
epilog
|
|
|
|
.globl call_macos6
|
|
call_macos6:
|
|
prolog
|
|
lwz r0,0(r3) // Get routine address
|
|
lwz r2,4(r3) // Load TOC pointer
|
|
mtctr r0
|
|
mr r3,r4
|
|
mr r4,r5
|
|
mr r5,r6
|
|
mr r6,r7
|
|
mr r7,r8
|
|
mr r8,r9
|
|
bctrl
|
|
epilog
|
|
|
|
.globl call_macos7
|
|
call_macos7:
|
|
prolog
|
|
lwz r0,0(r3) // Get routine address
|
|
lwz r2,4(r3) // Load TOC pointer
|
|
mtctr r0
|
|
mr r3,r4
|
|
mr r4,r5
|
|
mr r5,r6
|
|
mr r6,r7
|
|
mr r7,r8
|
|
mr r8,r9
|
|
mr r9,r10
|
|
bctrl
|
|
epilog
|
|
|
|
|
|
/*
|
|
* Native resource manager patches
|
|
*/
|
|
|
|
.globl get_resource
|
|
get_resource:
|
|
// Create stack frame
|
|
mflr r0
|
|
stw r0,8(r1)
|
|
stwu r1,-(56+12)(r1)
|
|
|
|
// Save type/ID
|
|
stw r3,56(r1)
|
|
stw r4,56+4(r1)
|
|
|
|
// Call old routine
|
|
lwz r0,XLM_GET_RESOURCE(r0)
|
|
lwz r2,XLM_RES_LIB_TOC(r0)
|
|
mtctr r0
|
|
bctrl
|
|
stw r3,56+8(r1) // Save handle
|
|
|
|
// Call CheckLoad
|
|
lwz r3,56(r1)
|
|
lwz r4,56+4(r1)
|
|
lwz r5,56+8(r1)
|
|
bl check_load_invoc__FUisPPUs
|
|
lwz r3,56+8(r1) // Restore handle
|
|
|
|
// Return to caller
|
|
lwz r0,56+12+8(r1)
|
|
mtlr r0
|
|
addi r1,r1,56+12
|
|
blr
|
|
|
|
.globl get_1_resource
|
|
get_1_resource:
|
|
// Create stack frame
|
|
mflr r0
|
|
stw r0,8(r1)
|
|
stwu r1,-(56+12)(r1)
|
|
|
|
// Save type/ID
|
|
stw r3,56(r1)
|
|
stw r4,56+4(r1)
|
|
|
|
// Call old routine
|
|
lwz r0,XLM_GET_1_RESOURCE(r0)
|
|
lwz r2,XLM_RES_LIB_TOC(r0)
|
|
mtctr r0
|
|
bctrl
|
|
stw r3,56+8(r1) // Save handle
|
|
|
|
// Call CheckLoad
|
|
lwz r3,56(r1)
|
|
lwz r4,56+4(r1)
|
|
lwz r5,56+8(r1)
|
|
bl check_load_invoc__FUisPPUs
|
|
lwz r3,56+8(r1) // Restore handle
|
|
|
|
// Return to caller
|
|
lwz r0,56+12+8(r1)
|
|
mtlr r0
|
|
addi r1,r1,56+12
|
|
blr
|
|
|
|
.globl get_ind_resource
|
|
get_ind_resource:
|
|
// Create stack frame
|
|
mflr r0
|
|
stw r0,8(r1)
|
|
stwu r1,-(56+12)(r1)
|
|
|
|
// Save type/index
|
|
stw r3,56(r1)
|
|
stw r4,56+4(r1)
|
|
|
|
// Call old routine
|
|
lwz r0,XLM_GET_IND_RESOURCE(r0)
|
|
lwz r2,XLM_RES_LIB_TOC(r0)
|
|
mtctr r0
|
|
bctrl
|
|
stw r3,56+8(r1) // Save handle
|
|
|
|
// Call CheckLoad
|
|
lwz r3,56(r1)
|
|
lwz r4,56+4(r1)
|
|
lwz r5,56+8(r1)
|
|
bl check_load_invoc__FUisPPUs
|
|
lwz r3,56+8(r1) // Restore handle
|
|
|
|
// Return to caller
|
|
lwz r0,56+12+8(r1)
|
|
mtlr r0
|
|
addi r1,r1,56+12
|
|
blr
|
|
|
|
.globl get_1_ind_resource
|
|
get_1_ind_resource:
|
|
// Create stack frame
|
|
mflr r0
|
|
stw r0,8(r1)
|
|
stwu r1,-(56+12)(r1)
|
|
|
|
// Save type/index
|
|
stw r3,56(r1)
|
|
stw r4,56+4(r1)
|
|
|
|
// Call old routine
|
|
lwz r0,XLM_GET_1_IND_RESOURCE(r0)
|
|
lwz r2,XLM_RES_LIB_TOC(r0)
|
|
mtctr r0
|
|
bctrl
|
|
stw r3,56+8(r1) // Save handle
|
|
|
|
// Call CheckLoad
|
|
lwz r3,56(r1)
|
|
lwz r4,56+4(r1)
|
|
lwz r5,56+8(r1)
|
|
bl check_load_invoc__FUisPPUs
|
|
lwz r3,56+8(r1) // Restore handle
|
|
|
|
// Return to caller
|
|
lwz r0,56+12+8(r1)
|
|
mtlr r0
|
|
addi r1,r1,56+12
|
|
blr
|
|
|
|
.globl r_get_resource
|
|
r_get_resource:
|
|
// Create stack frame
|
|
mflr r0
|
|
stw r0,8(r1)
|
|
stwu r1,-(56+12)(r1)
|
|
|
|
// Save type/ID
|
|
stw r3,56(r1)
|
|
stw r4,56+4(r1)
|
|
|
|
// Call old routine
|
|
lwz r0,XLM_R_GET_RESOURCE(r0)
|
|
lwz r2,XLM_RES_LIB_TOC(r0)
|
|
mtctr r0
|
|
bctrl
|
|
stw r3,56+8(r1) // Save handle
|
|
|
|
// Call CheckLoad
|
|
lwz r3,56(r1)
|
|
lwz r4,56+4(r1)
|
|
lwz r5,56+8(r1)
|
|
bl check_load_invoc__FUisPPUs
|
|
lwz r3,56+8(r1) // Restore handle
|
|
|
|
// Return to caller
|
|
lwz r0,56+12+8(r1)
|
|
mtlr r0
|
|
addi r1,r1,56+12
|
|
blr
|
|
|
|
|
|
/*
|
|
* void ppc_interrupt(uint32 entry{r3}, uint32 kernel_data{r4}) - Execute PPC interrupt
|
|
*/
|
|
|
|
.globl ppc_interrupt
|
|
ppc_interrupt:
|
|
mflr r0
|
|
stw r0,4(r1)
|
|
stwu r1,-64(r1)
|
|
|
|
// Get address of return routine
|
|
bl 1f
|
|
|
|
// Return routine
|
|
lwz r0,64+4(r1)
|
|
mtlr r0
|
|
addi r1,r1,64
|
|
blr
|
|
|
|
// Prepare registers for nanokernel interrupt routine
|
|
1: mtctr r1
|
|
mr r1,r4
|
|
stw r6,0x018(r1)
|
|
mfctr r6
|
|
stw r6,0x004(r1)
|
|
lwz r6,0x65c(r1)
|
|
stw r7,0x13c(r6)
|
|
stw r8,0x144(r6)
|
|
stw r9,0x14c(r6)
|
|
stw r10,0x154(r6)
|
|
stw r11,0x15c(r6)
|
|
stw r12,0x164(r6)
|
|
stw r13,0x16c(r6)
|
|
|
|
mflr r10
|
|
mfcr r13
|
|
lwz r7,0x660(r1)
|
|
mflr r12
|
|
rlwimi. r7,r7,8,0,0
|
|
li r11,0
|
|
ori r11,r11,0xf072 // MSR (SRR1)
|
|
mtcrf 0x70,r11
|
|
li r8,0
|
|
|
|
// Enter nanokernel
|
|
mtlr r3
|
|
blr
|