/*
PMUEMDEV.c
Copyright (C) 2008 Paul C. Pratt
You can redistribute this file and/or modify it under the terms
of version 2 of the GNU General Public License as published by
the Free Software Foundation. You should have received a copy
of the license along with this file; see the file COPYING.
This file is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
license for more details.
*//*
Power Management Unit EMulated DEVice
*/#ifndef AllFiles#include"SYSDEPNS.h"#include"MYOSGLUE.h"#include"EMCONFIG.h"#include"GLOBGLUE.h"#include"VIAEMDEV.h"#endif#include"PMUEMDEV.h"/*
ReportAbnormalID unused 0x0E0E - 0x0EFF
*/enum{kPMUStateReadyForCommand,kPMUStateRecievingLength,kPMUStateRecievingBuffer,kPMUStateRecievedCommand,kPMUStateSendLength,kPMUStateSendBuffer,kPMUStates};#define PMU_BuffSz 8LOCALVARui3bPMU_BuffA[PMU_BuffSz];LOCALVARui3pPMU_p;LOCALVARui3rPMU_rem;LOCALVARui3rPMU_i;LOCALVARintPMUState=kPMUStateReadyForCommand;LOCALVARui3rPMU_CurCommand;LOCALVARui3rPMU_SendNext;LOCALVARui3rPMU_BuffL;LOCALPROCPmuStartSendResult(ui3rResultCode,ui3rL){PMU_SendNext=ResultCode;PMU_BuffL=L;PMUState=kPMUStateSendLength;}LOCALVARui3bPARAMRAM[128];LOCALPROCPmuCheckCommandOp(void){switch(PMU_CurCommand){case0x10:/* kPMUpowerCntl - power plane/clock control */break;case0x32:/* kPMUxPramWrite - write extended PRAM byte(s) */if(kPMUStateRecievingBuffer==PMUState){if(0==PMU_i){if(PMU_BuffL>=2){PMU_p=PMU_BuffA;PMU_rem=2;}else{ReportAbnormalID(0x0E01,"PMU_BuffL too small for kPMUxPramWrite");}}elseif(2==PMU_i){if((PMU_BuffA[1]+2==PMU_BuffL)&&(PMU_BuffA[0]+PMU_BuffA[1]<=0x80)){PMU_p=&PARAMRAM[PMU_BuffA[0]];PMU_rem=PMU_BuffA[1];}else{ReportAbnormalID(0x0E02,"bad range for kPMUxPramWrite");}}else{ReportAbnormalID(0x0E03,"Wrong PMU_i for kPMUpramWrite");}}elseif(kPMUStateRecievedCommand==PMUState){/* already done */}break;#if 0 case 0xE2: /* kPMUdownloadStatus - PRAM status */
break;
#endif
case0xE0:/* kPMUwritePmgrRAM - write to internal PMGR RAM */break;case0x21:/* kPMUpMgrADBoff - turn ADB auto-poll off */if(kPMUStateRecievedCommand==PMUState){if(0!=PMU_BuffL){ReportAbnormalID(0x0E04,"kPMUpMgrADBoff nonzero length");}}break;case0xEC:/* kPMUPmgrSelfTest - run the PMGR selftest */if(kPMUStateRecievedCommand==PMUState){PmuStartSendResult(0,0);}break;case0x78:/* kPMUreadINT - get PMGR interrupt data */case0x68:/*
kPMUbatteryRead - read battery/charger level and status
*/case0x7F:/*
kPMUsleepReq - put the system to sleep (sleepSig='MATT')
*/if(kPMUStateRecievedCommand==PMUState){PMU_BuffA[0]=0;PmuStartSendResult(0,1);}break;case0xE8:/* kPMUreadPmgrRAM - read from internal PMGR RAM */if(kPMUStateRecievedCommand==PMUState){if((3==PMU_BuffL)&&(0==PMU_BuffA[0])&&(0xEE==PMU_BuffA[1])&&(1==PMU_BuffA[2])){PMU_BuffA[0]=1<<5;PmuStartSendResult(0,1);}else{PMU_BuffA[0]=0;PmuStartSendResult(0,1);/* ReportAbnormal("Unknown kPMUreadPmgrRAM op"); */}}break;case0x3A:/* kPMUxPramRead - read extended PRAM byte(s) */if(kPMUStateRecievedCommand==PMUState){if((2==PMU_BuffL)&&(PMU_BuffA[0]+PMU_BuffA[1]<=0x80)){PMU_p=&PARAMRAM[PMU_BuffA[0]];PMU_rem=PMU_BuffA[1];PmuStartSendResult(0,PMU_rem);}else{ReportAbnormalID(0x0E05,"Unknown kPMUxPramRead op");}}break;case0x38:/* kPMUtimeRead - read the time from the clock chip */if(kPMUStateRecievedCommand==PMUState)