2021-09-30 00:11:48 +00:00
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2021-10-07 18:35:15 +00:00
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pub mod state;
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Added MUL, DIV, NEG, DBcc, and Scc instructions, and fixed issue with ADD/SUB flags
With ADDA, SUBA, and ADDQ/SUBQ when the target is an address register, the condition
flags should not be changed, but the code was changing them, which caused problems.
I've fixed it by making the ADD/SUB executions check for an address target and
will not update flags in that case. This should only occur when the actual instruction
was an ADDA or ADDQ with an address register target
2021-10-03 04:59:28 +00:00
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pub mod decode;
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pub mod execute;
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pub mod debugger;
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2021-10-18 19:05:10 +00:00
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pub mod instructions;
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2021-12-15 05:13:01 +00:00
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pub mod timing;
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Added MUL, DIV, NEG, DBcc, and Scc instructions, and fixed issue with ADD/SUB flags
With ADDA, SUBA, and ADDQ/SUBQ when the target is an address register, the condition
flags should not be changed, but the code was changing them, which caused problems.
I've fixed it by making the ADD/SUB executions check for an address target and
will not update flags in that case. This should only occur when the actual instruction
was an ADDA or ADDQ with an address register target
2021-10-03 04:59:28 +00:00
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pub mod tests;
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2021-12-15 05:13:01 +00:00
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//pub mod testcases;
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2021-09-30 00:11:48 +00:00
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2021-10-10 21:26:54 +00:00
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pub use self::state::{M68k, M68kType};
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2021-09-30 00:11:48 +00:00
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