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Changed msp to ssp to match docs

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This commit is contained in:
transistor 2021-11-18 12:13:36 -08:00
parent 812f6800a8
commit 02b10c5b32
5 changed files with 101 additions and 96 deletions
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7
frontends/moa-minifb/src/lib.rs
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@ -22,10 +22,11 @@ pub fn new(name: &str) -> App {
App::new(name) App::new(name)
.arg("-s, --scale=[1,2,4] 'Scale the screen'") .arg("-s, --scale=[1,2,4] 'Scale the screen'")
.arg("-t, --threaded 'Run the simulation in a separate thread'") .arg("-t, --threaded 'Run the simulation in a separate thread'")
.arg("-d, --debugger 'Start the debugger before running machine'")
} }
pub fn run<I>(matches: ArgMatches, init: I) where I: FnOnce(&mut MiniFrontendBuilder) -> Result<System, Error> + Send + 'static { pub fn run<I>(matches: ArgMatches, init: I) where I: FnOnce(&mut MiniFrontendBuilder) -> Result<System, Error> + Send + 'static {
if matches.value_of("threaded").is_some() { if matches.occurrences_of("threaded") > 0 {
run_threaded(matches, init); run_threaded(matches, init);
} else { } else {
run_inline(matches, init); run_inline(matches, init);
@ -146,6 +147,10 @@ impl MiniFrontend {
} }
pub fn start(&mut self, matches: ArgMatches, mut system: Option<System>) { pub fn start(&mut self, matches: ArgMatches, mut system: Option<System>) {
if matches.occurrences_of("debugger") > 0 {
system.as_mut().map(|system| system.enable_debugging());
}
let mut options = minifb::WindowOptions::default(); let mut options = minifb::WindowOptions::default();
options.scale = match matches.value_of("scale").map(|s| u8::from_str_radix(s, 10).unwrap()) { options.scale = match matches.value_of("scale").map(|s| u8::from_str_radix(s, 10).unwrap()) {
Some(1) => minifb::Scale::X1, Some(1) => minifb::Scale::X1,

8
src/cpus/m68k/execute.rs
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@ -80,7 +80,7 @@ impl M68k {
} }
pub fn init(&mut self) -> Result<(), Error> { pub fn init(&mut self) -> Result<(), Error> {
self.state.msp = self.port.read_beu32(0)?; self.state.ssp = self.port.read_beu32(0)?;
self.state.pc = self.port.read_beu32(4)?; self.state.pc = self.port.read_beu32(4)?;
self.state.status = Status::Running; self.state.status = Status::Running;
Ok(()) Ok(())
@ -964,7 +964,7 @@ impl M68k {
match base_reg { match base_reg {
BaseRegister::None => 0, BaseRegister::None => 0,
BaseRegister::PC => self.decoder.start + 2, BaseRegister::PC => self.decoder.start + 2,
BaseRegister::AReg(reg) if reg == 7 => if self.is_supervisor() { self.state.msp } else { self.state.usp }, BaseRegister::AReg(reg) if reg == 7 => if self.is_supervisor() { self.state.ssp } else { self.state.usp },
BaseRegister::AReg(reg) => self.state.a_reg[reg as usize], BaseRegister::AReg(reg) => self.state.a_reg[reg as usize],
} }
} }
@ -986,13 +986,13 @@ impl M68k {
#[inline(always)] #[inline(always)]
fn get_stack_pointer_mut(&mut self) -> &mut u32 { fn get_stack_pointer_mut(&mut self) -> &mut u32 {
if self.is_supervisor() { &mut self.state.msp } else { &mut self.state.usp } if self.is_supervisor() { &mut self.state.ssp } else { &mut self.state.usp }
} }
#[inline(always)] #[inline(always)]
fn get_a_reg_mut(&mut self, reg: Register) -> &mut u32 { fn get_a_reg_mut(&mut self, reg: Register) -> &mut u32 {
if reg == 7 { if reg == 7 {
if self.is_supervisor() { &mut self.state.msp } else { &mut self.state.usp } if self.is_supervisor() { &mut self.state.ssp } else { &mut self.state.usp }
} else { } else {
&mut self.state.a_reg[reg as usize] &mut self.state.a_reg[reg as usize]
} }

8
src/cpus/m68k/state.rs
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@ -93,7 +93,7 @@ pub struct M68kState {
pub sr: u16, pub sr: u16,
pub d_reg: [u32; 8], pub d_reg: [u32; 8],
pub a_reg: [u32; 7], pub a_reg: [u32; 7],
pub msp: u32, pub ssp: u32,
pub usp: u32, pub usp: u32,
pub vbr: u32, pub vbr: u32,
@ -110,7 +110,7 @@ impl M68kState {
sr: FLAGS_ON_RESET, sr: FLAGS_ON_RESET,
d_reg: [0; 8], d_reg: [0; 8],
a_reg: [0; 7], a_reg: [0; 7],
msp: 0, ssp: 0,
usp: 0, usp: 0,
vbr: 0, vbr: 0,
@ -156,12 +156,12 @@ impl M68k {
println!("D{}: {:#010x} A{}: {:#010x}", i, self.state.d_reg[i as usize], i, self.state.a_reg[i as usize]); println!("D{}: {:#010x} A{}: {:#010x}", i, self.state.d_reg[i as usize], i, self.state.a_reg[i as usize]);
} }
println!("D7: {:#010x}", self.state.d_reg[7]); println!("D7: {:#010x}", self.state.d_reg[7]);
println!("MSP: {:#010x}", self.state.msp); println!("SSP: {:#010x}", self.state.ssp);
println!("USP: {:#010x}", self.state.usp); println!("USP: {:#010x}", self.state.usp);
println!("Current Instruction: {:#010x} {:?}", self.decoder.start, self.decoder.instruction); println!("Current Instruction: {:#010x} {:?}", self.decoder.start, self.decoder.instruction);
println!(""); println!("");
self.port.dump_memory(self.state.msp as Address, 0x40); self.port.dump_memory(self.state.ssp as Address, 0x40);
println!(""); println!("");
} }
} }

172
src/cpus/m68k/tests.rs
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@ -72,7 +72,7 @@ mod decode_tests {
let mut cpu = M68k::new(cputype, 10_000_000, port); let mut cpu = M68k::new(cputype, 10_000_000, port);
cpu.init().unwrap(); cpu.init().unwrap();
assert_eq!(cpu.state.pc, INIT_ADDR as u32); assert_eq!(cpu.state.pc, INIT_ADDR as u32);
assert_eq!(cpu.state.msp, INIT_STACK as u32); assert_eq!(cpu.state.ssp, INIT_STACK as u32);
cpu.decoder.init(INIT_ADDR as u32); cpu.decoder.init(INIT_ADDR as u32);
assert_eq!(cpu.decoder.start, INIT_ADDR as u32); assert_eq!(cpu.decoder.start, INIT_ADDR as u32);
@ -362,7 +362,7 @@ mod execute_tests {
struct TestState { struct TestState {
pc: u32, pc: u32,
msp: u32, ssp: u32,
usp: u32, usp: u32,
d0: u32, d0: u32,
d1: u32, d1: u32,
@ -400,7 +400,7 @@ mod execute_tests {
cpu.step(&system).unwrap(); cpu.step(&system).unwrap();
cpu.decoder.init(cpu.state.pc); cpu.decoder.init(cpu.state.pc);
assert_eq!(cpu.state.pc, INIT_ADDR as u32); assert_eq!(cpu.state.pc, INIT_ADDR as u32);
assert_eq!(cpu.state.msp, INIT_STACK as u32); assert_eq!(cpu.state.ssp, INIT_STACK as u32);
assert_eq!(cpu.decoder.instruction, Instruction::NOP); assert_eq!(cpu.decoder.instruction, Instruction::NOP);
(cpu, system) (cpu, system)
} }
@ -408,7 +408,7 @@ mod execute_tests {
fn build_state(state: &TestState) -> M68kState { fn build_state(state: &TestState) -> M68kState {
let mut new_state = M68kState::new(); let mut new_state = M68kState::new();
new_state.pc = state.pc; new_state.pc = state.pc;
new_state.msp = state.msp; new_state.ssp = state.ssp;
new_state.usp = state.usp; new_state.usp = state.usp;
new_state.d_reg[0] = state.d0; new_state.d_reg[0] = state.d0;
new_state.d_reg[1] = state.d1; new_state.d_reg[1] = state.d1;
@ -455,264 +455,264 @@ mod execute_tests {
ins: Instruction::NOP, ins: Instruction::NOP,
data: &[ 0x4e71 ], data: &[ 0x4e71 ],
cputype: M68kType::MC68010, cputype: M68kType::MC68010,
init: TestState { pc: 0x00000000, msp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 }, init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 },
fini: TestState { pc: 0x00000002, msp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 }, fini: TestState { pc: 0x00000002, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 },
}, },
TestCase { TestCase {
name: "addi with no overflow or carry", name: "addi with no overflow or carry",
ins: Instruction::ADD(Target::Immediate(0x7f), Target::DirectDReg(0), Size::Byte), ins: Instruction::ADD(Target::Immediate(0x7f), Target::DirectDReg(0), Size::Byte),
data: &[ 0x0600, 0x007F ], data: &[ 0x0600, 0x007F ],
cputype: M68kType::MC68010, cputype: M68kType::MC68010,
init: TestState { pc: 0x00000000, msp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 }, init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 },
fini: TestState { pc: 0x00000004, msp: 0x00000000, usp: 0x00000000, d0: 0x0000007f, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 }, fini: TestState { pc: 0x00000004, ssp: 0x00000000, usp: 0x00000000, d0: 0x0000007f, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 },
}, },
TestCase { TestCase {
name: "addi with no overflow but negative", name: "addi with no overflow but negative",
ins: Instruction::ADD(Target::Immediate(0x80), Target::DirectDReg(0), Size::Byte), ins: Instruction::ADD(Target::Immediate(0x80), Target::DirectDReg(0), Size::Byte),
data: &[ 0x0600, 0x0080 ], data: &[ 0x0600, 0x0080 ],
cputype: M68kType::MC68010, cputype: M68kType::MC68010,
init: TestState { pc: 0x00000000, msp: 0x00000000, usp: 0x00000000, d0: 0x00000001, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 }, init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000001, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 },
fini: TestState { pc: 0x00000004, msp: 0x00000000, usp: 0x00000000, d0: 0x00000081, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2708 }, fini: TestState { pc: 0x00000004, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000081, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2708 },
}, },
TestCase { TestCase {
name: "addi with overflow", name: "addi with overflow",
ins: Instruction::ADD(Target::Immediate(0x7f), Target::DirectDReg(0), Size::Byte), ins: Instruction::ADD(Target::Immediate(0x7f), Target::DirectDReg(0), Size::Byte),
data: &[ 0x0600, 0x007F ], data: &[ 0x0600, 0x007F ],
cputype: M68kType::MC68010, cputype: M68kType::MC68010,
init: TestState { pc: 0x00000000, msp: 0x00000000, usp: 0x00000000, d0: 0x00000001, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 }, init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000001, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 },
fini: TestState { pc: 0x00000004, msp: 0x00000000, usp: 0x00000000, d0: 0x00000080, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x270A }, fini: TestState { pc: 0x00000004, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000080, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x270A },
}, },
TestCase { TestCase {
name: "addi with carry", name: "addi with carry",
ins: Instruction::ADD(Target::Immediate(0x80), Target::DirectDReg(0), Size::Byte), ins: Instruction::ADD(Target::Immediate(0x80), Target::DirectDReg(0), Size::Byte),
data: &[ 0x0600, 0x0080 ], data: &[ 0x0600, 0x0080 ],
cputype: M68kType::MC68010, cputype: M68kType::MC68010,
init: TestState { pc: 0x00000000, msp: 0x00000000, usp: 0x00000000, d0: 0x00000080, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 }, init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000080, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 },
fini: TestState { pc: 0x00000004, msp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2717 }, fini: TestState { pc: 0x00000004, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2717 },
}, },
TestCase { TestCase {
name: "adda immediate", name: "adda immediate",
ins: Instruction::ADDA(Target::Immediate(0xF800), 0, Size::Word), ins: Instruction::ADDA(Target::Immediate(0xF800), 0, Size::Word),
data: &[ 0xD0FC, 0xF800 ], data: &[ 0xD0FC, 0xF800 ],
cputype: M68kType::MC68010, cputype: M68kType::MC68010,
init: TestState { pc: 0x00000000, msp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x27FF }, init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x27FF },
fini: TestState { pc: 0x00000004, msp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x00000000, a0: 0xFFFFF800, a1: 0x00000000, sr: 0x27FF }, fini: TestState { pc: 0x00000004, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x00000000, a0: 0xFFFFF800, a1: 0x00000000, sr: 0x27FF },
}, },
TestCase { TestCase {
name: "adda register", name: "adda register",
ins: Instruction::ADDA(Target::DirectDReg(0), 0, Size::Word), ins: Instruction::ADDA(Target::DirectDReg(0), 0, Size::Word),
data: &[ 0xD0C0 ], data: &[ 0xD0C0 ],
cputype: M68kType::MC68010, cputype: M68kType::MC68010,
init: TestState { pc: 0x00000000, msp: 0x00000000, usp: 0x00000000, d0: 0x0000F800, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x27FF }, init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0x0000F800, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x27FF },
fini: TestState { pc: 0x00000002, msp: 0x00000000, usp: 0x00000000, d0: 0x0000F800, d1: 0x00000000, a0: 0xFFFFF800, a1: 0x00000000, sr: 0x27FF }, fini: TestState { pc: 0x00000002, ssp: 0x00000000, usp: 0x00000000, d0: 0x0000F800, d1: 0x00000000, a0: 0xFFFFF800, a1: 0x00000000, sr: 0x27FF },
}, },
TestCase { TestCase {
name: "andi with sr", name: "andi with sr",
ins: Instruction::ANDtoSR(0xF8FF), ins: Instruction::ANDtoSR(0xF8FF),
data: &[ 0x027C, 0xF8FF ], data: &[ 0x027C, 0xF8FF ],
cputype: M68kType::MC68010, cputype: M68kType::MC68010,
init: TestState { pc: 0x00000000, msp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0xA7AA }, init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0xA7AA },
fini: TestState { pc: 0x00000004, msp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0xA0AA }, fini: TestState { pc: 0x00000004, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0xA0AA },
}, },
TestCase { TestCase {
name: "asl", name: "asl",
ins: Instruction::ASd(Target::Immediate(1), Target::DirectDReg(0), Size::Byte, ShiftDirection::Left), ins: Instruction::ASd(Target::Immediate(1), Target::DirectDReg(0), Size::Byte, ShiftDirection::Left),
data: &[ 0xE300 ], data: &[ 0xE300 ],
cputype: M68kType::MC68010, cputype: M68kType::MC68010,
init: TestState { pc: 0x00000000, msp: 0x00000000, usp: 0x00000000, d0: 0x00000001, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 }, init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000001, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 },
fini: TestState { pc: 0x00000002, msp: 0x00000000, usp: 0x00000000, d0: 0x00000002, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 }, fini: TestState { pc: 0x00000002, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000002, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 },
}, },
TestCase { TestCase {
name: "asr", name: "asr",
ins: Instruction::ASd(Target::Immediate(1), Target::DirectDReg(0), Size::Byte, ShiftDirection::Right), ins: Instruction::ASd(Target::Immediate(1), Target::DirectDReg(0), Size::Byte, ShiftDirection::Right),
data: &[ 0xE200 ], data: &[ 0xE200 ],
cputype: M68kType::MC68010, cputype: M68kType::MC68010,
init: TestState { pc: 0x00000000, msp: 0x00000000, usp: 0x00000000, d0: 0x00000081, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 }, init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000081, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 },
fini: TestState { pc: 0x00000002, msp: 0x00000000, usp: 0x00000000, d0: 0x000000C0, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2719 }, fini: TestState { pc: 0x00000002, ssp: 0x00000000, usp: 0x00000000, d0: 0x000000C0, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2719 },
}, },
TestCase { TestCase {
name: "blt with jump", name: "blt with jump",
ins: Instruction::Bcc(Condition::LessThan, 8), ins: Instruction::Bcc(Condition::LessThan, 8),
data: &[ 0x6D08 ], data: &[ 0x6D08 ],
cputype: M68kType::MC68010, cputype: M68kType::MC68010,
init: TestState { pc: 0x00000000, msp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2709 }, init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2709 },
fini: TestState { pc: 0x0000000A, msp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2709 }, fini: TestState { pc: 0x0000000A, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2709 },
}, },
TestCase { TestCase {
name: "blt with jump", name: "blt with jump",
ins: Instruction::Bcc(Condition::LessThan, 8), ins: Instruction::Bcc(Condition::LessThan, 8),
data: &[ 0x6D08 ], data: &[ 0x6D08 ],
cputype: M68kType::MC68010, cputype: M68kType::MC68010,
init: TestState { pc: 0x00000000, msp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 }, init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 },
fini: TestState { pc: 0x00000002, msp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 }, fini: TestState { pc: 0x00000002, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 },
}, },
TestCase { TestCase {
name: "bchg not zero", name: "bchg not zero",
ins: Instruction::BCHG(Target::Immediate(7), Target::DirectDReg(1), Size::Long), ins: Instruction::BCHG(Target::Immediate(7), Target::DirectDReg(1), Size::Long),
data: &[ 0x0841, 0x0007 ], data: &[ 0x0841, 0x0007 ],
cputype: M68kType::MC68010, cputype: M68kType::MC68010,
init: TestState { pc: 0x00000000, msp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x000000FF, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 }, init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x000000FF, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 },
fini: TestState { pc: 0x00000004, msp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x0000007F, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 }, fini: TestState { pc: 0x00000004, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x0000007F, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 },
}, },
TestCase { TestCase {
name: "bchg zero", name: "bchg zero",
ins: Instruction::BCHG(Target::Immediate(7), Target::DirectDReg(1), Size::Long), ins: Instruction::BCHG(Target::Immediate(7), Target::DirectDReg(1), Size::Long),
data: &[ 0x0841, 0x0007 ], data: &[ 0x0841, 0x0007 ],
cputype: M68kType::MC68010, cputype: M68kType::MC68010,
init: TestState { pc: 0x00000000, msp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 }, init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 },
fini: TestState { pc: 0x00000004, msp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x00000080, a0: 0x00000000, a1: 0x00000000, sr: 0x2704 }, fini: TestState { pc: 0x00000004, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x00000080, a0: 0x00000000, a1: 0x00000000, sr: 0x2704 },
}, },
TestCase { TestCase {
name: "bra 8-bit", name: "bra 8-bit",
ins: Instruction::BRA(-32), ins: Instruction::BRA(-32),
data: &[ 0x60E0 ], data: &[ 0x60E0 ],
cputype: M68kType::MC68010, cputype: M68kType::MC68010,
init: TestState { pc: 0x00000000, msp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 }, init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 },
fini: TestState { pc: 0xFFFFFFE2, msp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 }, fini: TestState { pc: 0xFFFFFFE2, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 },
}, },
TestCase { TestCase {
name: "cmpi equal", name: "cmpi equal",
ins: Instruction::CMP(Target::Immediate(0x20), Target::DirectDReg(0), Size::Byte), ins: Instruction::CMP(Target::Immediate(0x20), Target::DirectDReg(0), Size::Byte),
data: &[ 0x0C00, 0x0020 ], data: &[ 0x0C00, 0x0020 ],
cputype: M68kType::MC68010, cputype: M68kType::MC68010,
init: TestState { pc: 0x00000000, msp: 0x00000000, usp: 0x00000000, d0: 0x00000020, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 }, init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000020, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 },
fini: TestState { pc: 0x00000004, msp: 0x00000000, usp: 0x00000000, d0: 0x00000020, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2704 }, fini: TestState { pc: 0x00000004, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000020, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2704 },
}, },
TestCase { TestCase {
name: "cmpi greater than", name: "cmpi greater than",
ins: Instruction::CMP(Target::Immediate(0x30), Target::DirectDReg(0), Size::Byte), ins: Instruction::CMP(Target::Immediate(0x30), Target::DirectDReg(0), Size::Byte),
data: &[ 0x0C00, 0x0030 ], data: &[ 0x0C00, 0x0030 ],
cputype: M68kType::MC68010, cputype: M68kType::MC68010,
init: TestState { pc: 0x00000000, msp: 0x00000000, usp: 0x00000000, d0: 0x00000020, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 }, init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000020, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 },
fini: TestState { pc: 0x00000004, msp: 0x00000000, usp: 0x00000000, d0: 0x00000020, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2709 }, fini: TestState { pc: 0x00000004, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000020, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2709 },
}, },
TestCase { TestCase {
name: "cmpi less than", name: "cmpi less than",
ins: Instruction::CMP(Target::Immediate(0x10), Target::DirectDReg(0), Size::Byte), ins: Instruction::CMP(Target::Immediate(0x10), Target::DirectDReg(0), Size::Byte),
data: &[ 0x0C00, 0x0010 ], data: &[ 0x0C00, 0x0010 ],
cputype: M68kType::MC68010, cputype: M68kType::MC68010,
init: TestState { pc: 0x00000000, msp: 0x00000000, usp: 0x00000000, d0: 0x00000020, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 }, init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000020, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 },
fini: TestState { pc: 0x00000004, msp: 0x00000000, usp: 0x00000000, d0: 0x00000020, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 }, fini: TestState { pc: 0x00000004, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000020, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 },
}, },
TestCase { TestCase {
name: "cmpi no overflow", name: "cmpi no overflow",
ins: Instruction::CMP(Target::Immediate(0x7F), Target::DirectDReg(0), Size::Byte), ins: Instruction::CMP(Target::Immediate(0x7F), Target::DirectDReg(0), Size::Byte),
data: &[ 0x0C00, 0x007F ], data: &[ 0x0C00, 0x007F ],
cputype: M68kType::MC68010, cputype: M68kType::MC68010,
init: TestState { pc: 0x00000000, msp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 }, init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 },
fini: TestState { pc: 0x00000004, msp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2709 }, fini: TestState { pc: 0x00000004, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2709 },
}, },
TestCase { TestCase {
name: "cmpi no overflow, already negative", name: "cmpi no overflow, already negative",
ins: Instruction::CMP(Target::Immediate(0x8001), Target::DirectDReg(0), Size::Word), ins: Instruction::CMP(Target::Immediate(0x8001), Target::DirectDReg(0), Size::Word),
data: &[ 0x0C40, 0x8001 ], data: &[ 0x0C40, 0x8001 ],
cputype: M68kType::MC68010, cputype: M68kType::MC68010,
init: TestState { pc: 0x00000000, msp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 }, init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 },
fini: TestState { pc: 0x00000004, msp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2701 }, fini: TestState { pc: 0x00000004, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2701 },
}, },
TestCase { TestCase {
name: "cmpi with overflow", name: "cmpi with overflow",
ins: Instruction::CMP(Target::Immediate(0x80), Target::DirectDReg(0), Size::Byte), ins: Instruction::CMP(Target::Immediate(0x80), Target::DirectDReg(0), Size::Byte),
data: &[ 0x0C00, 0x0080 ], data: &[ 0x0C00, 0x0080 ],
cputype: M68kType::MC68010, cputype: M68kType::MC68010,
init: TestState { pc: 0x00000000, msp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 }, init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 },
fini: TestState { pc: 0x00000004, msp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x270B }, fini: TestState { pc: 0x00000004, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x270B },
}, },
TestCase { TestCase {
name: "cmpi with overflow 2", name: "cmpi with overflow 2",
ins: Instruction::CMP(Target::Immediate(0x8001), Target::DirectDReg(0), Size::Word), ins: Instruction::CMP(Target::Immediate(0x8001), Target::DirectDReg(0), Size::Word),
data: &[ 0x0C40, 0x8001 ], data: &[ 0x0C40, 0x8001 ],
cputype: M68kType::MC68010, cputype: M68kType::MC68010,
init: TestState { pc: 0x00000000, msp: 0x00000000, usp: 0x00000000, d0: 0x00000001, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 }, init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000001, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 },
fini: TestState { pc: 0x00000004, msp: 0x00000000, usp: 0x00000000, d0: 0x00000001, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x270B }, fini: TestState { pc: 0x00000004, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000001, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x270B },
}, },
TestCase { TestCase {
name: "cmpi no carry", name: "cmpi no carry",
ins: Instruction::CMP(Target::Immediate(0x01), Target::DirectDReg(0), Size::Byte), ins: Instruction::CMP(Target::Immediate(0x01), Target::DirectDReg(0), Size::Byte),
data: &[ 0x0C00, 0x0001 ], data: &[ 0x0C00, 0x0001 ],
cputype: M68kType::MC68010, cputype: M68kType::MC68010,
init: TestState { pc: 0x00000000, msp: 0x00000000, usp: 0x00000000, d0: 0x000000FF, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 }, init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0x000000FF, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 },
fini: TestState { pc: 0x00000004, msp: 0x00000000, usp: 0x00000000, d0: 0x000000FF, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2708 }, fini: TestState { pc: 0x00000004, ssp: 0x00000000, usp: 0x00000000, d0: 0x000000FF, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2708 },
}, },
TestCase { TestCase {
name: "cmpi with carry", name: "cmpi with carry",
ins: Instruction::CMP(Target::Immediate(0xFF), Target::DirectDReg(0), Size::Byte), ins: Instruction::CMP(Target::Immediate(0xFF), Target::DirectDReg(0), Size::Byte),
data: &[ 0x0C00, 0x00FF ], data: &[ 0x0C00, 0x00FF ],
cputype: M68kType::MC68010, cputype: M68kType::MC68010,
init: TestState { pc: 0x00000000, msp: 0x00000000, usp: 0x00000000, d0: 0x00000001, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 }, init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000001, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 },
fini: TestState { pc: 0x00000004, msp: 0x00000000, usp: 0x00000000, d0: 0x00000001, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2701 }, fini: TestState { pc: 0x00000004, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000001, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2701 },
}, },
TestCase { TestCase {
name: "divu", name: "divu",
ins: Instruction::DIVW(Target::Immediate(0x0245), 0, Sign::Unsigned), ins: Instruction::DIVW(Target::Immediate(0x0245), 0, Sign::Unsigned),
data: &[ 0x80FC, 0x0245 ], data: &[ 0x80FC, 0x0245 ],
cputype: M68kType::MC68010, cputype: M68kType::MC68010,
init: TestState { pc: 0x00000000, msp: 0x00000000, usp: 0x00000000, d0: 0x00040000, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 }, init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0x00040000, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 },
fini: TestState { pc: 0x00000004, msp: 0x00000000, usp: 0x00000000, d0: 0x007101C3, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 }, fini: TestState { pc: 0x00000004, ssp: 0x00000000, usp: 0x00000000, d0: 0x007101C3, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 },
}, },
TestCase { TestCase {
name: "eori", name: "eori",
ins: Instruction::EOR(Target::DirectDReg(1), Target::DirectDReg(0), Size::Long), ins: Instruction::EOR(Target::DirectDReg(1), Target::DirectDReg(0), Size::Long),
data: &[ 0xB380 ], data: &[ 0xB380 ],
cputype: M68kType::MC68010, cputype: M68kType::MC68010,
init: TestState { pc: 0x00000000, msp: 0x00000000, usp: 0x00000000, d0: 0xAAAA5555, d1: 0x55AA55AA, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 }, init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0xAAAA5555, d1: 0x55AA55AA, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 },
fini: TestState { pc: 0x00000002, msp: 0x00000000, usp: 0x00000000, d0: 0xFF0000FF, d1: 0x55AA55AA, a0: 0x00000000, a1: 0x00000000, sr: 0x2708 }, fini: TestState { pc: 0x00000002, ssp: 0x00000000, usp: 0x00000000, d0: 0xFF0000FF, d1: 0x55AA55AA, a0: 0x00000000, a1: 0x00000000, sr: 0x2708 },
}, },
TestCase { TestCase {
name: "exg", name: "exg",
ins: Instruction::EXG(Target::DirectDReg(0), Target::DirectAReg(1)), ins: Instruction::EXG(Target::DirectDReg(0), Target::DirectAReg(1)),
data: &[ 0xC189 ], data: &[ 0xC189 ],
cputype: M68kType::MC68010, cputype: M68kType::MC68010,
init: TestState { pc: 0x00000000, msp: 0x00000000, usp: 0x00000000, d0: 0x12345678, d1: 0x00000000, a0: 0x00000000, a1: 0x87654321, sr: 0x2700 }, init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0x12345678, d1: 0x00000000, a0: 0x00000000, a1: 0x87654321, sr: 0x2700 },
fini: TestState { pc: 0x00000002, msp: 0x00000000, usp: 0x00000000, d0: 0x87654321, d1: 0x00000000, a0: 0x00000000, a1: 0x12345678, sr: 0x2700 }, fini: TestState { pc: 0x00000002, ssp: 0x00000000, usp: 0x00000000, d0: 0x87654321, d1: 0x00000000, a0: 0x00000000, a1: 0x12345678, sr: 0x2700 },
}, },
TestCase { TestCase {
name: "ext", name: "ext",
ins: Instruction::EXT(0, Size::Byte, Size::Word), ins: Instruction::EXT(0, Size::Byte, Size::Word),
data: &[ 0x4880 ], data: &[ 0x4880 ],
cputype: M68kType::MC68010, cputype: M68kType::MC68010,
init: TestState { pc: 0x00000000, msp: 0x00000000, usp: 0x00000000, d0: 0x000000CB, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x27FF }, init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0x000000CB, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x27FF },
fini: TestState { pc: 0x00000002, msp: 0x00000000, usp: 0x00000000, d0: 0x0000FFCB, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x27F8 }, fini: TestState { pc: 0x00000002, ssp: 0x00000000, usp: 0x00000000, d0: 0x0000FFCB, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x27F8 },
}, },
TestCase { TestCase {
name: "ext", name: "ext",
ins: Instruction::EXT(0, Size::Word, Size::Long), ins: Instruction::EXT(0, Size::Word, Size::Long),
data: &[ 0x48C0 ], data: &[ 0x48C0 ],
cputype: M68kType::MC68010, cputype: M68kType::MC68010,
init: TestState { pc: 0x00000000, msp: 0x00000000, usp: 0x00000000, d0: 0x000000CB, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x27FF }, init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0x000000CB, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x27FF },
fini: TestState { pc: 0x00000002, msp: 0x00000000, usp: 0x00000000, d0: 0x000000CB, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x27F0 }, fini: TestState { pc: 0x00000002, ssp: 0x00000000, usp: 0x00000000, d0: 0x000000CB, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x27F0 },
}, },
TestCase { TestCase {
name: "muls", name: "muls",
ins: Instruction::MULW(Target::Immediate(0x0276), 0, Sign::Signed), ins: Instruction::MULW(Target::Immediate(0x0276), 0, Sign::Signed),
data: &[ 0xC1FC, 0x0276 ], data: &[ 0xC1FC, 0x0276 ],
cputype: M68kType::MC68010, cputype: M68kType::MC68010,
init: TestState { pc: 0x00000000, msp: 0x00000000, usp: 0x00000000, d0: 0x00000200, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 }, init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000200, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 },
fini: TestState { pc: 0x00000004, msp: 0x00000000, usp: 0x00000000, d0: 0x0004ec00, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 }, fini: TestState { pc: 0x00000004, ssp: 0x00000000, usp: 0x00000000, d0: 0x0004ec00, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 },
}, },
TestCase { TestCase {
name: "movel", name: "movel",
ins: Instruction::MOVE(Target::DirectDReg(0), Target::DirectDReg(1), Size::Long), ins: Instruction::MOVE(Target::DirectDReg(0), Target::DirectDReg(1), Size::Long),
data: &[ 0x2200 ], data: &[ 0x2200 ],
cputype: M68kType::MC68010, cputype: M68kType::MC68010,
init: TestState { pc: 0x00000000, msp: 0x00000000, usp: 0x00000000, d0: 0xFEDCBA98, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 }, init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0xFEDCBA98, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 },
fini: TestState { pc: 0x00000002, msp: 0x00000000, usp: 0x00000000, d0: 0xFEDCBA98, d1: 0xFEDCBA98, a0: 0x00000000, a1: 0x00000000, sr: 0x2708 }, fini: TestState { pc: 0x00000002, ssp: 0x00000000, usp: 0x00000000, d0: 0xFEDCBA98, d1: 0xFEDCBA98, a0: 0x00000000, a1: 0x00000000, sr: 0x2708 },
}, },
TestCase { TestCase {
name: "movea", name: "movea",
ins: Instruction::MOVEA(Target::DirectDReg(0), 0, Size::Long), ins: Instruction::MOVEA(Target::DirectDReg(0), 0, Size::Long),
data: &[ 0x2040 ], data: &[ 0x2040 ],
cputype: M68kType::MC68010, cputype: M68kType::MC68010,
init: TestState { pc: 0x00000000, msp: 0x00000000, usp: 0x00000000, d0: 0xFEDCBA98, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x27FF }, init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0xFEDCBA98, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x27FF },
fini: TestState { pc: 0x00000002, msp: 0x00000000, usp: 0x00000000, d0: 0xFEDCBA98, d1: 0x00000000, a0: 0xFEDCBA98, a1: 0x00000000, sr: 0x27FF }, fini: TestState { pc: 0x00000002, ssp: 0x00000000, usp: 0x00000000, d0: 0xFEDCBA98, d1: 0x00000000, a0: 0xFEDCBA98, a1: 0x00000000, sr: 0x27FF },
}, },
TestCase { TestCase {
name: "neg", name: "neg",
ins: Instruction::NEG(Target::DirectDReg(0), Size::Word), ins: Instruction::NEG(Target::DirectDReg(0), Size::Word),
data: &[ 0x4440 ], data: &[ 0x4440 ],
cputype: M68kType::MC68010, cputype: M68kType::MC68010,
init: TestState { pc: 0x00000000, msp: 0x00000000, usp: 0x00000000, d0: 0x00000080, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 }, init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000080, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 },
fini: TestState { pc: 0x00000002, msp: 0x00000000, usp: 0x00000000, d0: 0x0000FF80, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2719 }, fini: TestState { pc: 0x00000002, ssp: 0x00000000, usp: 0x00000000, d0: 0x0000FF80, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2719 },
}, },
@ -721,16 +721,16 @@ mod execute_tests {
ins: Instruction::OR(Target::Immediate(0xFF), Target::DirectAReg(0), Size::Byte), ins: Instruction::OR(Target::Immediate(0xFF), Target::DirectAReg(0), Size::Byte),
data: &[ 0x0008, 0x00FF ], data: &[ 0x0008, 0x00FF ],
cputype: M68kType::MC68010, cputype: M68kType::MC68010,
init: TestState { pc: 0x00000000, msp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 }, init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 },
fini: TestState { pc: 0x00000004, msp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x00000000, a0: 0x000000FF, a1: 0x00000000, sr: 0x2708 }, fini: TestState { pc: 0x00000004, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x00000000, a0: 0x000000FF, a1: 0x00000000, sr: 0x2708 },
}, },
TestCase { TestCase {
name: "ori with sr", name: "ori with sr",
ins: Instruction::ORtoSR(0x00AA), ins: Instruction::ORtoSR(0x00AA),
data: &[ 0x007C, 0x00AA ], data: &[ 0x007C, 0x00AA ],
cputype: M68kType::MC68010, cputype: M68kType::MC68010,
init: TestState { pc: 0x00000000, msp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0xA755 }, init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0xA755 },
fini: TestState { pc: 0x00000004, msp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0xA7FF }, fini: TestState { pc: 0x00000004, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0xA7FF },
}, },
@ -740,48 +740,48 @@ mod execute_tests {
ins: Instruction::ROd(Target::Immediate(1), Target::DirectDReg(0), Size::Byte, ShiftDirection::Left), ins: Instruction::ROd(Target::Immediate(1), Target::DirectDReg(0), Size::Byte, ShiftDirection::Left),
data: &[ 0xE318 ], data: &[ 0xE318 ],
cputype: M68kType::MC68010, cputype: M68kType::MC68010,
init: TestState { pc: 0x00000000, msp: 0x00000000, usp: 0x00000000, d0: 0x00000080, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 }, init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000080, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 },
fini: TestState { pc: 0x00000002, msp: 0x00000000, usp: 0x00000000, d0: 0x00000001, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2701 }, fini: TestState { pc: 0x00000002, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000001, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2701 },
}, },
TestCase { TestCase {
name: "ror", name: "ror",
ins: Instruction::ROd(Target::Immediate(1), Target::DirectDReg(0), Size::Byte, ShiftDirection::Right), ins: Instruction::ROd(Target::Immediate(1), Target::DirectDReg(0), Size::Byte, ShiftDirection::Right),
data: &[ 0xE218 ], data: &[ 0xE218 ],
cputype: M68kType::MC68010, cputype: M68kType::MC68010,
init: TestState { pc: 0x00000000, msp: 0x00000000, usp: 0x00000000, d0: 0x00000001, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 }, init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000001, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 },
fini: TestState { pc: 0x00000002, msp: 0x00000000, usp: 0x00000000, d0: 0x00000080, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2709 }, fini: TestState { pc: 0x00000002, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000080, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2709 },
}, },
TestCase { TestCase {
name: "roxl", name: "roxl",
ins: Instruction::ROXd(Target::Immediate(1), Target::DirectDReg(0), Size::Byte, ShiftDirection::Left), ins: Instruction::ROXd(Target::Immediate(1), Target::DirectDReg(0), Size::Byte, ShiftDirection::Left),
data: &[ 0xE310 ], data: &[ 0xE310 ],
cputype: M68kType::MC68010, cputype: M68kType::MC68010,
init: TestState { pc: 0x00000000, msp: 0x00000000, usp: 0x00000000, d0: 0x00000080, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 }, init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000080, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 },
fini: TestState { pc: 0x00000002, msp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2715 }, fini: TestState { pc: 0x00000002, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2715 },
}, },
TestCase { TestCase {
name: "roxr", name: "roxr",
ins: Instruction::ROXd(Target::Immediate(1), Target::DirectDReg(0), Size::Byte, ShiftDirection::Right), ins: Instruction::ROXd(Target::Immediate(1), Target::DirectDReg(0), Size::Byte, ShiftDirection::Right),
data: &[ 0xE210 ], data: &[ 0xE210 ],
cputype: M68kType::MC68010, cputype: M68kType::MC68010,
init: TestState { pc: 0x00000000, msp: 0x00000000, usp: 0x00000000, d0: 0x00000001, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 }, init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000001, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 },
fini: TestState { pc: 0x00000002, msp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2715 }, fini: TestState { pc: 0x00000002, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2715 },
}, },
TestCase { TestCase {
name: "roxl two bits", name: "roxl two bits",
ins: Instruction::ROXd(Target::Immediate(2), Target::DirectDReg(0), Size::Byte, ShiftDirection::Left), ins: Instruction::ROXd(Target::Immediate(2), Target::DirectDReg(0), Size::Byte, ShiftDirection::Left),
data: &[ 0xE510 ], data: &[ 0xE510 ],
cputype: M68kType::MC68010, cputype: M68kType::MC68010,
init: TestState { pc: 0x00000000, msp: 0x00000000, usp: 0x00000000, d0: 0x00000080, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 }, init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000080, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 },
fini: TestState { pc: 0x00000002, msp: 0x00000000, usp: 0x00000000, d0: 0x00000001, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 }, fini: TestState { pc: 0x00000002, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000001, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 },
}, },
TestCase { TestCase {
name: "roxr two bits", name: "roxr two bits",
ins: Instruction::ROXd(Target::Immediate(2), Target::DirectDReg(0), Size::Byte, ShiftDirection::Right), ins: Instruction::ROXd(Target::Immediate(2), Target::DirectDReg(0), Size::Byte, ShiftDirection::Right),
data: &[ 0xE410 ], data: &[ 0xE410 ],
cputype: M68kType::MC68010, cputype: M68kType::MC68010,
init: TestState { pc: 0x00000000, msp: 0x00000000, usp: 0x00000000, d0: 0x00000001, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 }, init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000001, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 },
fini: TestState { pc: 0x00000002, msp: 0x00000000, usp: 0x00000000, d0: 0x00000080, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2708 }, fini: TestState { pc: 0x00000002, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000080, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2708 },
}, },
]; ];

2
src/debugger.rs
View File

@ -111,7 +111,7 @@ impl Debugger {
let len = if args.len() > 2 { u32::from_str_radix(args[2], 16).map_err(|_| Error::new("Unable to parse length"))? } else { 0x20 }; let len = if args.len() > 2 { u32::from_str_radix(args[2], 16).map_err(|_| Error::new("Unable to parse length"))? } else { 0x20 };
system.get_bus().dump_memory(addr as Address, len as Address); system.get_bus().dump_memory(addr as Address, len as Address);
} else { } else {
//self.port.dump_memory(self.state.msp as Address, 0x40 as Address); //self.port.dump_memory(self.state.ssp as Address, 0x40 as Address);
} }
}, },
"dis" | "disassemble" => { "dis" | "disassemble" => {