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Added decode for ABCD and SBCD

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This commit is contained in:
transistor 2021-10-10 20:47:51 -07:00
parent 94141e112e
commit 39ecd1b0d9
3 changed files with 26 additions and 10 deletions
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28
src/cpus/m68k/decode.rs
View File

@ -100,7 +100,7 @@ pub enum Target {
#[derive(Clone, Debug, PartialEq)]
pub enum Instruction {
//ABCD
ABCD(Target, Target),
ADD(Target, Target, Size),
AND(Target, Target, Size),
ANDtoCCR(u8),
@ -173,7 +173,7 @@ pub enum Instruction {
RTS,
RTD(i16),
//SBCD
SBCD(Target, Target),
Scc(Condition, Target),
STOP(u16),
SUB(Target, Target, Size),
@ -532,9 +532,14 @@ impl M68kDecoder {
let data_reg = Target::DirectDReg(get_high_reg(ins));
let effective_addr = self.decode_lower_effective_address(system, ins, size)?;
Ok(Instruction::DIV(effective_addr, data_reg, Size::Word, sign))
} else if (ins & 0b000111110000) == 0b000100000000 {
// TODO SBCD
panic!("Not Implemented");
} else if (ins & 0x1F0) == 0x100 {
let regx = get_high_reg(ins);
let regy = get_low_reg(ins);
match (ins & 0x08) == 0 {
false => Ok(Instruction::SBCD(Target::DirectDReg(regy), Target::DirectDReg(regx))),
true => Ok(Instruction::SBCD(Target::IndirectARegDec(regy), Target::IndirectARegDec(regx))),
}
} else {
let data_reg = Target::DirectDReg(get_high_reg(ins));
let effective_addr = self.decode_lower_effective_address(system, ins, size)?;
@ -549,6 +554,8 @@ impl M68kDecoder {
match size {
Some(size) => {
if (ins & 0b100110000) == 0b100000000 {
let mode = (ins & 0x08) == 0;
// TODO implement SUBX
panic!("Not Implemented");
} else {
@ -596,8 +603,13 @@ impl M68kDecoder {
let size = get_size(ins);
if (ins & 0b000111110000) == 0b000100000000 {
// TODO ABCD
panic!("Not Implemented");
let regx = get_high_reg(ins);
let regy = get_low_reg(ins);
match (ins & 0x08) == 0 {
false => Ok(Instruction::ABCD(Target::DirectDReg(regy), Target::DirectDReg(regx))),
true => Ok(Instruction::ABCD(Target::IndirectARegDec(regy), Target::IndirectARegDec(regx))),
}
} else if (ins & 0b000100110000) == 0b000100000000 {
let regx = get_high_reg(ins);
let regy = get_low_reg(ins);
@ -626,6 +638,8 @@ impl M68kDecoder {
match size {
Some(size) => {
if (ins & 0b100110000) == 0b100000000 {
let mode = (ins & 0x08) == 0;
// TODO implement ADDX
panic!("Not Implemented");
} else {

4
src/cpus/m68k/tests.rs
View File

@ -29,8 +29,10 @@ fn init_test() -> (M68k, System) {
#[cfg(test)]
mod tests {
use super::{init_test, INIT_ADDR};
use crate::devices::Steppable;
use crate::memory::{Address, Addressable};
use super::{init_test, INIT_ADDR};
use super::super::decode::{Instruction, Target, Size, Sign, ShiftDirection};
#[test]

4
todo.txt
View File

@ -3,8 +3,8 @@
* how can you add 68030 support? Should it be all one module that checks maybe during decode if the instruction is supported? Should it 'inherit' from the MC68010 object
* make tests for each instruction
* unimplemented: ADDX, BKPT, CHK, EXG, ILLEGAL, MOVEfromCCR, MOVEP, RTR, RTD, SUBX
* undecoded: ADDX, SUBX, ABCD, SBCD
* unimplemented: ABCD, ADDX, BKPT, CHK, EXG, ILLEGAL, MOVEfromCCR, MOVEP, RTR, RTD, SBCD, SUBX
* undecoded: ADDX, SUBX
* modify execution for >=MC68020: DIVSL, DIVUL, EXTB, LINK, MOVEM, MULSL, MULUL, RTM, TRAPcc, UNPK
* implement the full extension word for MC68020+