Fixed part of the problem in RTE test failures with Address Error

The I/N bit in the special status word on the stack should be set
when returning from RTE results in a PC that isn't word aligned.
Every other case pretty much, it should be clear
This commit is contained in:
transistor 2022-09-17 21:29:04 -07:00
parent 914ddb17dd
commit 481dd0d7f7
3 changed files with 28 additions and 29 deletions

View File

@ -297,7 +297,6 @@ impl M68k {
// Adjust flags
self.set_logic_flags(pair.0, size);
self.set_flag(Flags::Overflow, overflow);
if count != 0 {
self.set_flag(Flags::Extend, pair.1);
self.set_flag(Flags::Carry, pair.1);
@ -633,7 +632,7 @@ impl M68k {
Instruction::MOVEP(dreg, areg, offset, size, dir) => {
match dir {
Direction::ToTarget => {
let mut shift = (size.in_bytes() as i32 * 8) - 8;
let mut shift = (size.in_bits() as i32) - 8;
let mut addr = ((*self.get_a_reg_mut(areg) as i32) + (offset as i32)) as Address;
while shift >= 0 {
let byte = (self.state.d_reg[dreg as usize] >> shift) as u8;
@ -643,7 +642,7 @@ impl M68k {
}
},
Direction::FromTarget => {
let mut shift = (size.in_bytes() as i32 * 8) - 8;
let mut shift = (size.in_bits() as i32) - 8;
let mut addr = ((*self.get_a_reg_mut(areg) as i32) + (offset as i32)) as Address;
while shift >= 0 {
let byte = self.port.read_u8(addr)?;
@ -1150,7 +1149,7 @@ impl M68k {
}
pub fn get_address_sized(&mut self, addr: Address, size: Size) -> Result<u32, Error> {
self.start_request(addr as u32, size, MemAccess::Read, MemType::Data)?;
self.start_request(addr as u32, size, MemAccess::Read, MemType::Data, false)?;
match size {
Size::Byte => self.port.read_u8(addr).map(|value| value as u32),
Size::Word => self.port.read_beu16(addr).map(|value| value as u32),
@ -1159,7 +1158,7 @@ impl M68k {
}
pub fn set_address_sized(&mut self, addr: Address, value: u32, size: Size) -> Result<(), Error> {
self.start_request(addr as u32, size, MemAccess::Write, MemType::Data)?;
self.start_request(addr as u32, size, MemAccess::Write, MemType::Data, false)?;
match size {
Size::Byte => self.port.write_u8(addr, value as u8),
Size::Word => self.port.write_beu16(addr, value as u16),
@ -1176,8 +1175,8 @@ impl M68k {
validate_address(addr)
}
pub fn start_request(&mut self, addr: u32, size: Size, access: MemAccess, mtype: MemType) -> Result<u32, Error> {
self.state.request.i_n_bit = false;
pub fn start_request(&mut self, addr: u32, size: Size, access: MemAccess, mtype: MemType, i_n_bit: bool) -> Result<u32, Error> {
self.state.request.i_n_bit = i_n_bit;
self.state.request.code = match mtype {
MemType::Program => FunctionCode::program(self.state.sr),
MemType::Data => FunctionCode::data(self.state.sr),
@ -1196,14 +1195,14 @@ impl M68k {
fn push_word(&mut self, value: u16) -> Result<(), Error> {
*self.get_stack_pointer_mut() -= 2;
let addr = *self.get_stack_pointer_mut();
self.start_request(addr, Size::Word, MemAccess::Write, MemType::Data)?;
self.start_request(addr, Size::Word, MemAccess::Write, MemType::Data, false)?;
self.port.write_beu16(addr as Address, value)
}
fn pop_word(&mut self) -> Result<u16, Error> {
let addr = *self.get_stack_pointer_mut();
let value = self.port.read_beu16(addr as Address)?;
self.start_request(addr, Size::Word, MemAccess::Read, MemType::Data)?;
self.start_request(addr, Size::Word, MemAccess::Read, MemType::Data, false)?;
*self.get_stack_pointer_mut() += 2;
Ok(value)
}
@ -1211,21 +1210,21 @@ impl M68k {
fn push_long(&mut self, value: u32) -> Result<(), Error> {
*self.get_stack_pointer_mut() -= 4;
let addr = *self.get_stack_pointer_mut();
self.start_request(addr, Size::Long, MemAccess::Write, MemType::Data)?;
self.start_request(addr, Size::Long, MemAccess::Write, MemType::Data, false)?;
self.port.write_beu32(addr as Address, value)
}
fn pop_long(&mut self) -> Result<u32, Error> {
let addr = *self.get_stack_pointer_mut();
let value = self.port.read_beu32(addr as Address)?;
self.start_request(addr, Size::Long, MemAccess::Read, MemType::Data)?;
self.start_request(addr, Size::Long, MemAccess::Read, MemType::Data, false)?;
*self.get_stack_pointer_mut() += 4;
Ok(value)
}
fn set_pc(&mut self, value: u32) -> Result<(), Error> {
self.state.pc = value;
self.start_request(self.state.pc, Size::Word, MemAccess::Read, MemType::Program)?;
self.start_request(self.state.pc, Size::Word, MemAccess::Read, MemType::Program, true)?;
Ok(())
}

View File

@ -1,4 +1,4 @@
Last run on 2022-09-16 at commit ef6fde2a4f7e79310a749d2e10e470bca435e90c
Last run on 2022-09-17 at commit 914ddb17dd5179f14e61e95154c2a42a79717ec8
ABCD.json completed: 301 passed, 7764 FAILED
ADD.b.json completed, all passed!
@ -36,8 +36,8 @@ CMP.w.json completed, all passed!
CMPA.l.json completed, all passed!
CMPA.w.json completed, all passed!
DBcc.json completed: 6101 passed, 1964 FAILED
DIVS.json completed: 3685 passed, 4380 FAILED
DIVU.json completed: 5595 passed, 2470 FAILED
DIVS.json completed: 6833 passed, 1232 FAILED
DIVU.json completed: 8064 passed, 1 FAILED
EOR.b.json completed, all passed!
EOR.l.json completed: 7519 passed, 546 FAILED
EOR.w.json completed: 7525 passed, 540 FAILED
@ -125,5 +125,5 @@ TST.l.json completed, all passed!
TST.w.json completed, all passed!
UNLINK.json completed, all passed!
passed: 899449, failed: 100611, total 90%
completed in 14m 6s
passed: 905066, failed: 94994, total 91%
completed in 18m 56s

View File

@ -1,4 +1,4 @@
Last run on 2022-09-14 at commit a3fbcc7c16f80dd7801ceacf1d4a22a7bf88e9e1
Last run on 2022-09-16 at commit ef6fde2a4f7e79310a749d2e10e470bca435e90c
ABCD.json completed: 301 passed, 7764 FAILED
ADD.b.json completed, all passed!
@ -28,8 +28,8 @@ BTST.json completed: 8052 passed, 13 FAILED
Bcc.json completed: 5865 passed, 2200 FAILED
CHK.json completed: 7744 passed, 321 FAILED
CLR.b.json completed, all passed!
CLR.l.json completed: 6882 passed, 1183 FAILED
CLR.w.json completed: 6862 passed, 1203 FAILED
CLR.l.json completed: 7472 passed, 593 FAILED
CLR.w.json completed: 7465 passed, 600 FAILED
CMP.b.json completed, all passed!
CMP.l.json completed, all passed!
CMP.w.json completed, all passed!
@ -50,12 +50,12 @@ JMP.json completed: 4259 passed, 3806 FAILED
JSR.json completed: 4183 passed, 3882 FAILED
LEA.json completed, all passed!
LINK.json completed, all passed!
LSL.b.json completed: 7774 passed, 291 FAILED
LSL.l.json completed: 7017 passed, 1048 FAILED
LSL.w.json completed: 7494 passed, 571 FAILED
LSR.b.json completed: 7797 passed, 268 FAILED
LSR.l.json completed: 7044 passed, 1021 FAILED
LSR.w.json completed: 7512 passed, 553 FAILED
LSL.b.json completed: 7809 passed, 256 FAILED
LSL.l.json completed: 7056 passed, 1009 FAILED
LSL.w.json completed: 7523 passed, 542 FAILED
LSR.b.json completed: 7817 passed, 248 FAILED
LSR.l.json completed: 7072 passed, 993 FAILED
LSR.w.json completed: 7541 passed, 524 FAILED
MOVE.b.json completed, all passed!
MOVE.l.json completed: 5827 passed, 2238 FAILED
MOVE.q.json completed, all passed!
@ -103,7 +103,7 @@ ROXL.w.json completed: 7892 passed, 173 FAILED
ROXR.b.json completed: 8037 passed, 28 FAILED
ROXR.l.json completed: 8022 passed, 43 FAILED
ROXR.w.json completed: 7880 passed, 185 FAILED
RTE.json completed: 2047 passed, 6018 FAILED
RTE.json completed: 4011 passed, 4054 FAILED
RTR.json completed: 4038 passed, 4027 FAILED
RTS.json completed: 4008 passed, 4057 FAILED
SBCD.json completed: 884 passed, 7181 FAILED
@ -125,5 +125,5 @@ TST.l.json completed, all passed!
TST.w.json completed, all passed!
UNLINK.json completed, all passed!
passed: 896112, failed: 103948, total 90%
completed in 15m 7s
passed: 899449, failed: 100611, total 90%
completed in 14m 6s